BETA_ICDCON
- Address
0xBF801130- Reset
0x00000000- Access
- read/write
- Size
- 32-bit
8 fields
| Field | Bits | What it does |
|---|---|---|
| FRZ | 14 | |
| DMTEN | 6 | |
| DMTBKEN | 5 | |
| RSTBUG | 4 | |
| WDTEN | 3 | |
| WDTBKEN | 2 | |
| SLPBKEN | 1 | |
| CKSWBKEN | 0 |
PIC32MZ1024ECM100 SFR registers
The 1 register of SFR (Other special function registers), from 0xBF801130, with their reset value and every field. The PIC32MZ1024ECM100 has 1565 registers in 92 peripherals, one page each.
Most PIC32 SFRs have three more registers right after them: CLR at +4, SET at +8 and INV at +C (T1CONCLR, T1CONSET, T1CONINV), which clear, set or flip just the bits written as 1, in one write.