The 13 registers of PORTF (I/O port F), from 0xBF860510, with their reset value and every field. The PIC32MZ1024EFG064 has 1143 registers in 83 peripherals, one page each.
Most PIC32 SFRs have three more registers right after them: CLR at +4, SET at +8 and INV at +C (T1CONCLR, T1CONSET, T1CONINV), which clear, set or flip just the bits written as 1, in one write.
PORTF I/O port F
TRISF
Address
0xBF860510
Reset
0x0000003B
Access
read/write
Size
32-bit
5 fields
Field
Bits
What it does
TRISF5
5
TRISF4
4
TRISF3
3
TRISF1
1
TRISF0
0
PORTF
Address
0xBF860520
Reset
0x00000000
Access
read/write
Size
32-bit
5 fields
Field
Bits
What it does
RF5
5
RF4
4
RF3
3
RF1
1
RF0
0
LATF
Address
0xBF860530
Reset
0x00000000
Access
read/write
Size
32-bit
5 fields
Field
Bits
What it does
LATF5
5
LATF4
4
LATF3
3
LATF1
1
LATF0
0
ODCF
Address
0xBF860540
Reset
0x00000000
Access
read/write
Size
32-bit
5 fields
Field
Bits
What it does
ODCF5
5
ODCF4
4
ODCF3
3
ODCF1
1
ODCF0
0
CNPUF
Address
0xBF860550
Reset
0x00000000
Access
read/write
Size
32-bit
5 fields
Field
Bits
What it does
CNPUF5
5
CNPUF4
4
CNPUF3
3
CNPUF1
1
CNPUF0
0
CNPDF
Address
0xBF860560
Reset
0x00000000
Access
read/write
Size
32-bit
5 fields
Field
Bits
What it does
CNPDF5
5
CNPDF4
4
CNPDF3
3
CNPDF1
1
CNPDF0
0
CNCONFChange Notice control for PORTx Register
Address
0xBF860570
Reset
0x00000000
Access
read/write
Size
32-bit
2 fields
Field
Bits
What it does
ON
15
Change Notice Control ON bit
0 CN is disabled
1 CN is enabled
EDGEDETECT
11
Change Notification Style bit
0 Mismatch Style. Detect change from last PORTx read (CNSTATx used for CN Event).
1 Edge Style. Detect edge transitions (CNFx used for CN Event).
BETA