PIC32MZ1024EFM144 TMR5 registers

The 3 registers of TMR5 (Timer 5), from 0xBF840800, with their reset value and every field. The PIC32MZ1024EFM144 has 1692 registers in 94 peripherals, one page each.

Most PIC32 SFRs have three more registers right after them: CLR at +4, SET at +8 and INV at +C (T1CONCLR, T1CONSET, T1CONINV), which clear, set or flip just the bits written as 1, in one write.

TMR5 Timer 5

T5CONType B Timer Control Register

Address
0xBF840800
Reset
0x00000000
Access
read/write
Size
32-bit
5 fields
FieldBitsWhat it does
ON15Timer On bit
  • 0 Module is disabled
  • 1 Module is enabled
SIDL13Stop in Idle Mode bit
  • 0 Continue operation even in Idle mode
  • 1 Discontinue operation when device enters Idle mode
TGATE7Timer Gated Time Accumulation Enable bit
  • 0 (When TCS is 0): Gated time accumulation is disabled / (When TCS=0): bit is ignored and read as 0
  • 1 (When TCS is 1): Gated time accumulation is enabled / (When TCS=0): bit is ignored and read as 0
TCKPS6:4Timer Input Clock Prescale Select bits
  • 0 1:1 prescale value
  • 1 1:2 prescale value
  • 2 1:4 prescale value
  • 3 1:8 prescale value
  • 4 1:16 prescale value
  • 5 1:32 prescale value
  • 6 1:64 prescale value
  • 7 1:256 prescale value
TCS1Timer Clock Source Select bit
  • 0 Internal peripheral clock
  • 1 External clock from TxCK pin

TMR5

Address
0xBF840810
Reset
0x00000000
Access
read/write
Size
32-bit

PR5

Address
0xBF840820
Reset
0x0000FFFF
Access
read/write
Size
32-bit