The 17 registers of NVM (Flash controller (NVM)), from 0xBF800600, with their reset value and every field. The PIC32MZ1025W104132 has 1091 registers in 66 peripherals, one page each.
Most PIC32 SFRs have three more registers right after them: CLR at +4, SET at +8 and INV at +C (T1CONCLR, T1CONSET, T1CONINV), which clear, set or flip just the bits written as 1, in one write.
NVM Flash controller (NVM)
NVMCONPROGRAMMING CONTROL REGISTER
Address
0xBF800600
Reset
0x00000000
Access
read/write
Size
32-bit
6 fields
Field
Bits
What it does
WR
15
Write Control bit
0 Flash operation is complete or inactive
1 Initiate a Flash operation
WREN
14
Write Enable bit
0 Disable writes to WR bit and enables writes to the NVMOP bits
1 Enable writes to the WR bit and disables writes to the NVMOP bits
WRERR
13
Write Error bit
0 Program or erase sequence completed normally
1 Program or erase sequence did not complete successfully
LVDERR
12
Low-Voltage Detect Error bit
0 Voltage level is acceptable for programming
1 Low-voltage detected (possible data corruption
HTDPGM
8
High Temperature Detected during Program/Erase Operation Bit
0 High Temp Not Detected
1 High Temp Detected
NVMOP
3:0
NVM Operation bits
0 No operation
1 Word program operation: programs word selected by NVMADDR
2 Quad Word (128-bit) program operation: programs the 128-bit Flash word selected by NVMADDR
3 Program erase operation: erase all of program Flash memory (all pages must be unprotected
3 Row program operation: programs row selected by NVMADDR
4 Reserved
4 Page erase operation: erases page selected by NVMADDR
5 Lower program Flash memory erase operation: erases only the lower mapped region of program Flash (all pages in that region must be unprotected)
6 Upper program Flash memory erase operation: erases only the upper mapped region of program Flash (all pages in that region must be unprotected)
7 Reserved
NVMCON2PROGRAMMING CONTROL 2 REGISTER
Address
0xBF800610
Reset
0x00000000
Access
read/write
Size
32-bit
9 fields
Field
Bits
What it does
SLEEP
24
WS
20:16
TEMP
14
CREAD1
13
VREAD1
12
RETRY
9:8
SWAPLK
7:6
PREPG
0
NVM Pre-Program Control Bit
0 Program Operations exclude Pre-Program step
1 Program Operations include Pre-Program step
ERS
31:28
NVMKEYProgramming Unlock Register
Address
0xBF800620
Reset
0x00000000
Access
write only
Size
32-bit
NVMADDRFlash Address Register
Address
0xBF800630
Reset
0x00000000
Access
read/write
Size
32-bit
NVMDATA0Flash Data Register (x = 0-3
Address
0xBF800640
Reset
0x00000000
Access
read/write
Size
32-bit
NVMDATA1Flash Data Register (x = 0-3
Address
0xBF800650
Reset
0x00000000
Access
read/write
Size
32-bit
NVMDATA2Flash Data Register (x = 0-3
Address
0xBF800660
Reset
0x00000000
Access
read/write
Size
32-bit
NVMDATA3Flash Data Register (x = 0-3
Address
0xBF800670
Reset
0x00000000
Access
read/write
Size
32-bit
NVMDATA4Flash Data Register
Address
0xBF800680
Reset
0x00000000
Access
read/write
Size
32-bit
NVMDATA5Flash Data Register
Address
0xBF800690
Reset
0x00000000
Access
read/write
Size
32-bit
NVMDATA6Flash Data Register
Address
0xBF8006A0
Reset
0x00000000
Access
read/write
Size
32-bit
NVMDATA7Flash Data Register
Address
0xBF8006B0
Reset
0x00000000
Access
read/write
Size
32-bit
NVMSRCADDRSource Data Address Register
Address
0xBF8006C0
Reset
0x00000000
Access
read/write
Size
32-bit
NVMPWPLTFLASH PROGRAM WRITE PROTECT (WATERMARK) REGISTER
Address
0xBF8006D0
Reset
0x80000000
Access
read/write
Size
32-bit
2 fields
Field
Bits
What it does
PWPLT
23:0
ULOCK
31
NVMPWPLT Register Unlock Bit
0 Register is locked and cannot be modified
1 Register is not locked and can be modified
NVMPWPGTEFLASH PROGRAM WRITE PROTECT
Address
0xBF8006E0
Reset
0x80FFFFFF
Access
read/write
Size
32-bit
2 fields
Field
Bits
What it does
PWPGTE
23:0
ULOCK
31
Program Flash Memory Page Write-protect Unlock bit
BETA