PIC32MZ1064DAB176 CTMU registers

The 1 register of CTMU (Charge time measurement unit), from 0xBF84C200, with their reset value and every field. The PIC32MZ1064DAB176 has 2254 registers in 102 peripherals, one page each.

Most PIC32 SFRs have three more registers right after them: CLR at +4, SET at +8 and INV at +C (T1CONCLR, T1CONSET, T1CONINV), which clear, set or flip just the bits written as 1, in one write.

CTMU Charge time measurement unit

CTMUCONCTMU Control Register

Address
0xBF84C200
Reset
0x00000000
Access
read/write
Size
32-bit
17 fields
FieldBitsWhat it does
EDG1POL30Edge 1 Polarity Select bit
  • 0 Edge1 programmed for a negative edge response
  • 1 Edge1 programmed for a positive edge response
EDG1SEL29:26Edge 1 Source Select bits
  • 0 Timer1 Event is selected
  • 1 OC1 Compare Event is selected
  • 2 CTED2 pin is selected
  • 3 CTED1 pin is selected
  • 4 OC2 Capture Event is selected
  • 5 OC3 Capture Event is selected
  • 6 OC4 Capture Event is selected
  • 7 IC1 Capture Event is selected
  • 8 IC2 Capture Event is selected
  • 9 IC3 Capture Event is selected
  • 10 IC4 Capture Event is selected
  • 11 IC5 Capture Event is selected
  • 12 IC6 Capture Event is selected
  • 13 C1OUT pin is selected
  • 14 C2OUT pin is selected
  • 15 Reserved
EDG2STAT25Edge2 Status bit
  • 0 Edge2 has not occurred
  • 1 Edge2 has occurred
EDG1STAT24Edge1 Status bit
  • 0 Edge1 has not occurred
  • 1 Edge1 has occurred
EDG2MOD23Edge2 Edge Sampling Select bit
  • 0 Input is level-sensitive
  • 1 Input is edge-sensitive
EDG2POL22Edge 2 Polarity Select bit
  • 0 Edge2 programmed for a negative edge response
  • 1 Edge2 programmed for a positive edge response
EDG2SEL21:18Edge 2 Source Select bits
  • 0 Timer1 Event is selected
  • 4 OC1 Compare Event is selected
  • 8 CTED2 pin is selected
  • 12 CTED1 pin is selected
  • 16 OC2 Capture Event is selected
  • 20 OC3 Capture Event is selected
  • 24 OC4 Capture Event is selected
  • 28 IC1 Capture Event is selected
  • 32 IC2 Capture Event is selected
  • 36 IC3 Capture Event is selected
  • 40 IC4 Capture Event is selected
  • 44 IC5 Capture Event is selected
  • 48 PBCLK3
  • 52 C1OUT pin is selected
  • 56 C2OUT pin is selected
  • 60 Reserved
ON15ON Enable bit
  • 0 Module is disabled
  • 1 Module is enabled
CTMUSIDL13Stop-in-Idle Mode bit
  • 0 Continue module operation in Idle mode
  • 1 Discontinue module operation when device enters Idle mode
TGEN12Time Generation Enable bit
  • 0 Disables edge delay generation
  • 1 Enables edge delay generation
EDGEN11Edge Enable bit
  • 0 Edges are blocked
  • 1 Edges are not blocked
EDGSEQEN10Edge Sequence Enable bit
  • 0 No edge sequence is needed
  • 1 Edge1 must occur before Edge2 can occur
IDISSEN9Analog Current Source Control bit
  • 0 Analog current source output is not grounded
  • 1 Analog current source output is grounded
CTTRIG8Trigger Control bit
  • 0 Trigger output is disabled
  • 1 Trigger output is enabled
ITRIM7:2Current Source Trim bits
  • 0 Nominal current output specified by IRNG
  • 1 Minimum positive change from nominal current
  • 30
  • 31 Maximum positive change from nominal current
  • 33 Maximum negative change from nominal current
  • 34
  • 63 Minimum negative change from nominal current
IRNG1:0Current Range Select bits
  • 0 1000 times base current(4)
  • 1 Base current level
  • 2 10 times base current
  • 3 100 times base current
EDG1MOD31Edge1 Edge Sampling Select bit
  • 0 Input is level-sensitive
  • 1 Input is edge-sensitive