The 14 registers of PORTA (I/O port A), from 0xBF860000, with their reset value and every field. The PIC32MZ2048EFM144 has 1692 registers in 94 peripherals, one page each.
Most PIC32 SFRs have three more registers right after them: CLR at +4, SET at +8 and INV at +C (T1CONCLR, T1CONSET, T1CONINV), which clear, set or flip just the bits written as 1, in one write.
PORTA I/O port A
ANSELA
Address
0xBF860000
Reset
0x00000623
Access
read/write
Size
32-bit
5 fields
Field
Bits
What it does
ANSA10
10
ANSA9
9
ANSA5
5
ANSA1
1
ANSA0
0
TRISA
Address
0xBF860010
Reset
0x0000C6FF
Access
read/write
Size
32-bit
12 fields
Field
Bits
What it does
TRISA15
15
TRISA14
14
TRISA10
10
TRISA9
9
TRISA7
7
TRISA6
6
TRISA5
5
TRISA4
4
TRISA3
3
TRISA2
2
TRISA1
1
TRISA0
0
PORTA
Address
0xBF860020
Reset
0x00000000
Access
read/write
Size
32-bit
12 fields
Field
Bits
What it does
RA15
15
RA14
14
RA10
10
RA9
9
RA7
7
RA6
6
RA5
5
RA4
4
RA3
3
RA2
2
RA1
1
RA0
0
LATA
Address
0xBF860030
Reset
0x00000000
Access
read/write
Size
32-bit
12 fields
Field
Bits
What it does
LATA15
15
LATA14
14
LATA10
10
LATA9
9
LATA7
7
LATA6
6
LATA5
5
LATA4
4
LATA3
3
LATA2
2
LATA1
1
LATA0
0
ODCA
Address
0xBF860040
Reset
0x00000000
Access
read/write
Size
32-bit
12 fields
Field
Bits
What it does
ODCA15
15
ODCA14
14
ODCA10
10
ODCA9
9
ODCA7
7
ODCA6
6
ODCA5
5
ODCA4
4
ODCA3
3
ODCA2
2
ODCA1
1
ODCA0
0
CNPUA
Address
0xBF860050
Reset
0x00000000
Access
read/write
Size
32-bit
12 fields
Field
Bits
What it does
CNPUA15
15
CNPUA14
14
CNPUA10
10
CNPUA9
9
CNPUA7
7
CNPUA6
6
CNPUA5
5
CNPUA4
4
CNPUA3
3
CNPUA2
2
CNPUA1
1
CNPUA0
0
CNPDA
Address
0xBF860060
Reset
0x00000000
Access
read/write
Size
32-bit
12 fields
Field
Bits
What it does
CNPDA15
15
CNPDA14
14
CNPDA10
10
CNPDA9
9
CNPDA7
7
CNPDA6
6
CNPDA5
5
CNPDA4
4
CNPDA3
3
CNPDA2
2
CNPDA1
1
CNPDA0
0
CNCONAChange Notice control for PORTx Register
Address
0xBF860070
Reset
0x00000000
Access
read/write
Size
32-bit
2 fields
Field
Bits
What it does
ON
15
Change Notice Control ON bit
0 CN is disabled
1 CN is enabled
EDGEDETECT
11
Change Notification Style bit
0 Mismatch Style. Detect change from last PORTx read (CNSTATx used for CN Event).
1 Edge Style. Detect edge transitions (CNFx used for CN Event).