PIC32MZ2064DAA176 PORTG registers

The 14 registers of PORTG (I/O port G), from 0xBF860600, with their reset value and every field. The PIC32MZ2064DAA176 has 2244 registers in 101 peripherals, one page each.

Most PIC32 SFRs have three more registers right after them: CLR at +4, SET at +8 and INV at +C (T1CONCLR, T1CONSET, T1CONINV), which clear, set or flip just the bits written as 1, in one write.

PORTG I/O port G

ANSELG

Address: 0xBF860600
Reset: 0x000083C0
Access: read/write
Size: 32-bit

5 fields

Field	Bits	What it does
ANSG15	15
ANSG9	9
ANSG8	8
ANSG7	7
ANSG6	6

TRISG

Address: 0xBF860610
Reset: 0x0000F3C3
Access: read/write
Size: 32-bit

10 fields

Field	Bits	What it does
TRISG15	15
TRISG14	14
TRISG13	13
TRISG12	12
TRISG9	9
TRISG8	8
TRISG7	7
TRISG6	6
TRISG1	1
TRISG0	0

PORTG

Address: 0xBF860620
Reset: 0x00000000
Access: read/write
Size: 32-bit

10 fields

Field	Bits	What it does
RG15	15
RG14	14
RG13	13
RG12	12
RG9	9
RG8	8
RG7	7
RG6	6
RG1	1
RG0	0

LATG

Address: 0xBF860630
Reset: 0x00000000
Access: read/write
Size: 32-bit

10 fields

Field	Bits	What it does
LATG15	15
LATG14	14
LATG13	13
LATG12	12
LATG9	9
LATG8	8
LATG7	7
LATG6	6
LATG1	1
LATG0	0

ODCG

Address: 0xBF860640
Reset: 0x00000000
Access: read/write
Size: 32-bit

10 fields

Field	Bits	What it does
ODCG15	15
ODCG14	14
ODCG13	13
ODCG12	12
ODCG9	9
ODCG8	8
ODCG7	7
ODCG6	6
ODCG1	1
ODCG0	0

CNPUG

Address: 0xBF860650
Reset: 0x00000000
Access: read/write
Size: 32-bit

10 fields

Field	Bits	What it does
CNPUG15	15
CNPUG14	14
CNPUG13	13
CNPUG12	12
CNPUG9	9
CNPUG8	8
CNPUG7	7
CNPUG6	6
CNPUG1	1
CNPUG0	0

CNPDG

Address: 0xBF860660
Reset: 0x00000000
Access: read/write
Size: 32-bit

10 fields

Field	Bits	What it does
CNPDG15	15
CNPDG14	14
CNPDG13	13
CNPDG12	12
CNPDG9	9
CNPDG8	8
CNPDG7	7
CNPDG6	6
CNPDG1	1
CNPDG0	0

CNCONGChange Notice control for PORTx Register

Address: 0xBF860670
Reset: 0x00000000
Access: read/write
Size: 32-bit

2 fields

Field	Bits	What it does
ON	15	Change Notice Control ON bit `0` CN is disabled `1` CN is enabled
EDGEDETECT	11	Change Notification Style bit `0` Mismatch Style. Detect change from last PORTx read (CNSTATx used for CN Event). `1` Edge Style. Detect edge transitions (CNFx used for CN Event).

CNENG

Address: 0xBF860680
Reset: 0x00000000
Access: read/write
Size: 32-bit

10 fields

Field	Bits	What it does
CNIEG15	15
CNIEG14	14
CNIEG13	13
CNIEG12	12
CNIEG9	9
CNIEG8	8
CNIEG7	7
CNIEG6	6
CNIEG1	1
CNIEG0	0

CNSTATG

Address: 0xBF860690
Reset: 0x00000000
Access: read/write
Size: 32-bit

10 fields

Field	Bits	What it does
CNSTATG15	15
CNSTATG14	14
CNSTATG13	13
CNSTATG12	12
CNSTATG9	9
CNSTATG8	8
CNSTATG7	7
CNSTATG6	6
CNSTATG1	1
CNSTATG0	0

CNNEG

Address: 0xBF8606A0
Reset: 0x00000000
Access: read/write
Size: 32-bit

10 fields

Field	Bits	What it does
CNNEG15	15
CNNEG14	14
CNNEG13	13
CNNEG12	12
CNNEG9	9
CNNEG8	8
CNNEG7	7
CNNEG6	6
CNNEG1	1
CNNEG0	0

CNFG

Address: 0xBF8606B0
Reset: 0x00000000
Access: read/write
Size: 32-bit

10 fields

Field	Bits	What it does
CNFG15	15
CNFG14	14
CNFG13	13
CNFG12	12
CNFG9	9
CNFG8	8
CNFG7	7
CNFG6	6
CNFG1	1
CNFG0	0

SRCON0G

Address: 0xBF8606C0
Reset: 0x00000000
Access: read/write
Size: 32-bit

10 fields

Field	Bits	What it does
SR0G15	15
SR0G14	14
SR0G13	13
SR0G12	12
SR0G9	9
SR0G8	8
SR0G7	7
SR0G6	6
SR0G1	1
SR0G0	0

SRCON1G

Address: 0xBF8606D0
Reset: 0x00000000
Access: read/write
Size: 32-bit

10 fields

Field	Bits	What it does
SR1G15	15
SR1G14	14
SR1G13	13
SR1G12	12
SR1G9	9
SR1G8	8
SR1G7	7
SR1G6	6
SR1G1	1
SR1G0	0