The 2 registers of REFO3 (Reference clock output 3), from 0xBF8012E0, with their reset value and every field. The WFI32E01 has 1091 registers in 66 peripherals, one page each.
Most PIC32 SFRs have three more registers right after them: CLR at +4, SET at +8 and INV at +C (T1CONCLR, T1CONSET, T1CONINV), which clear, set or flip just the bits written as 1, in one write.
REFO3 Reference clock output 3
REFO3CONREFERENCE OSCILLATOR 3 CONTROL REGISTER
Address
0xBF8012E0
Reset
0x00000000
Access
read/write
Size
32-bit
8 fields
Field
Bits
What it does
RODIV
30:16
Reference Clock Divider bits
0 REFO1 clock is same frequency as Base clock (no divider)
1 REFO1 clock is Base clock frequency divided by 2 (1*2)
2 REFO1 clock is Base clock frequency divided by 4 (2*2)
32767 REFO1 clock is Base clock frequency divided by 65,534 (32,767 *2)
ON
15
Output Enable bit
0 Reference Oscillator Module disabled
1 Reference Oscillator Module enabled
SIDL
13
Peripheral Stop in Idle Mode bit
0 Continue module operation in Idle mode
1 Discontinue module operation when device enters Idle mode
OE
12
Reference Clock Output Enable bit
0 Reference clock is not driven out on REFO1 pin.
1 Reference clock is driven out on REFO1 pin
RSLP
11
Reference Oscillator Run in Sleep bit
0 Reference Oscillator output is disabled in Sleep
1 Reference Oscillator output continues to run in Sleep
DIVSWEN
9
Clock RODIV/ROTRIM switch enabled.
0 Clock Divider Switch has completed.
1 Clock Divider Switching currently in progress.
ACTIVE
8
Reference Clock Request Status bit
0 Reference clock request is not active (User can update this REFOCON register)
1 Reference clock request is active (User should not update this REFOCON register)
ROSEL
3:0
Reference Clock Source Select bits
0 System clock (reference clock reflects any device clock switching)
1 Peripheral clock (reference clock reflects any peripheral clock switching)
2 POSC
3 FRC
4 LPRC
5 SOSC
6 USB PLL
7 System PLL
8 EWPLL Ethernet Clock
9 EWPLL WiFi Clock
10 BTPLL Clock
11 REFI Pin
REFO3TRIMREFERENCE OSCILLATOR 3 TRIM REGISTER
Address
0xBF8012F0
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
Field
Bits
What it does
ROTRIM
31:23
Trim bits - Provides fractional additive to RODIV value for 1/2 period of REFO1 clock
0 0/512 (0.0) divisor added to RODIV value
1 1/512 (0.001953125) divisor added to RODIV value
2 2/512 (0.00390625) divisor added to RODIV value
256 256/512 (0.5000) divisor added to RODIV value
511 511/512 (0.998046875) divisor added to RODIV value