WFI32E02 USB1 registers

The 36 registers of USB1 (USB), from 0xBF844040, with their reset value and every field. The WFI32E02 has 1091 registers in 66 peripherals, one page each.

Most PIC32 SFRs have three more registers right after them: CLR at +4, SET at +8 and INV at +C (T1CONCLR, T1CONSET, T1CONINV), which clear, set or flip just the bits written as 1, in one write.

USB1 USB

U1OTGIRUSB OTG Interrupt Status Register (x = 1 and 2)

Address: 0xBF844040
Reset: 0x00000000
Access: read/write
Size: 32-bit

7 fields

Field	Bits	What it does
IDIF	7	ID State Change Indicator bit `0` No change in ID state is detected `1` Change in ID state is detected
T1MSECIF	6	1 Millisecond Timer bit `0` 1 millisecond timer has not expired `1` 1 millisecond timer has expired
LSTATEIF	5	Line State Stable Indicator bit `0` USB line state has not been stable for 1 millisecond `1` USB line state has been stable for 1 millisecond
ACTVIF	4	Bus Activity Indicator bit `0` Activity has not been detected `1` Activity on the D+
SESVDIF	3	Session Valid Change Indicator bit `0` Vbus voltage has not dropped below the session end level `1` Vbus voltage has dropped below the session end level
SESENDIF	2	B-Device `0` No change on the session end input was detected `1` A change on the session end input was detected
VBUSVDIF	0	A-Device `0` No change on the session valid input is detected `1` Change on the session valid input is detected

U1OTGIEUSB OTG Interrupt Enable Register (x = 1 and 2)

Address: 0xBF844050
Reset: 0x00000000
Access: read/write
Size: 32-bit

7 fields

Field	Bits	What it does
IDIE	7	ID Interrupt Enable bit `0` ID interrupt is disabled `1` ID interrupt is enabled
T1MSECIE	6	1 Millisecond Timer Interrupt Enable bit `0` 1 millisecond timer interrupt is disabled `1` 1 millisecond timer interrupt is enabled
LSTATEIE	5	Line State Interrupt Enable bit `0` Line state interrupt is disabled `1` Line state interrupt is enabled
ACTVIE	4	Bus Activity Interrupt Enable bit `0` ACTIVITY interrupt is disabled `1` ACTIVITY interrupt is enabled
SESVDIE	3	Session Valid Interrupt Enable bit `0` Session valid interrupt is disabled `1` Session valid interrupt is enabled
SESENDIE	2	B-Session End Interrupt Enable bit `0` B-session end interrupt is disabled `1` B-session end interrupt is enabled
VBUSVDIE	0	A- Vbus Valid Interrupt Enable bit `0` A-Vbus valid interrupt is disabled `1` A-Vbus valid interrupt is enabled

U1OTGSTATUSB OTG Status Register (x = 1 and 2)

Address: 0xBF844060
Reset: 0x00000000
Access: read/write
Size: 32-bit

5 fields

Field	Bits	What it does
ID	7	ID Pin State Indicator bit `0` A Type-A cable has been plugged into the USB receptacle `1` No cable is attached or a Type-B cable has been plugged into the USB receptacle
LSTATE	5	Line State Stable Indicator bit `0` USB line state (SE0 and JSTATE) has not been stable for the previous 1 ms `1` USB line state (SE0 (UxCON) and JSTATE (UxCON<7>)) has been stable for the previous 1 ms
SESVD	3	Session Valid Indicator bit `0` Vbus voltage is below Session Valid on the A or B device `1` Vbus voltage is above Session Valid on the A or B device
SESEND	2	B-Device Session End Indicator bit `0` Vbus voltage is above Session Valid on the B device `1` Vbus voltage is below Session Valid on the B device
VBUSVD	0	A-Device Vbus Valid Indicator bit `0` Vbus voltage is below Session Valid on the A device `1` Vbus voltage is above Session Valid on the A device

U1OTGCONUSB OTG Control Register (x = 1 and 2)

Address: 0xBF844070
Reset: 0x00000000
Access: read/write
Size: 32-bit

8 fields

Field	Bits	What it does
DPPULUP	7	D+ Pull-Up Enable bit `0` D+ data line pull-up resistor is disabled `1` D+ data line pull-up resistor is enabled
DMPULUP	6	D- Pull-Up Enable bit `0` D- data line pull-up resistor is disabled `1` D- data line pull-up resistor is enabled
DPPULDWN	5	D+ Pull-Down Enable bit `0` D+ data line pull-down resistor is disabled `1` D+ data line pull-down resistor is enabled
DMPULDWN	4	D- Pull-Down Enable bit `0` D- data line pull-down resistor is disabled `1` D- data line pull-down resistor is enabled
VBUSON	3	Vbus Power-on bit `0` Vbus line is not powered `1` Vbus line is powered
OTGEN	2	OTG Functionality Enable bit `0` DPPULUP `1` DPPULUP
VBUSCHG	1	Vbus Charge Enable bit `0` Vbus line is not charged through a resistor `1` Vbus line is charged through a pull-up resistor
VBUSDIS	0	Vbus Discharge Enable bit `0` Vbus line is not discharged through a resistor `1` Vbus line is discharged through a pull-down resistor

U1PWRCUSB Power Control Register (x = 1 and 2)

Address: 0xBF844080
Reset: 0x00000000
Access: read/write
Size: 32-bit

5 fields

Field	Bits	What it does
UACTPND	7	USB Activity Pending bit `0` An interrupt is not pending `1` USB hardware has detected a change in link status; however
USLPGRD	4	USB Sleep Entry Guard bit `0` USB module does not block Sleep entry `1` Sleep entry is blocked if USB bus activity is detected or if a notification is pending
USBBUSY	3	USB Module Busy bit `0` USB module is not active and is ready to be enabled `1` USB module is active or disabled
USUSPEND	1	USB Suspend Mode bit `0` USB module operates normally `1` USB module is placed in Suspend mode (The 48 MHz USB clock will be gated off. The transceiver is placed in a low-power state.)
USBPWR	0	USB Operation Enable bit `0` USB module is disabled (Outputs held inactive `1` USB module is turned on

U1IRUSB Interrupt Register (x = 1 and 2)

Address: 0xBF844200
Reset: 0x00000000
Access: read/write
Size: 32-bit

8 fields

Field	Bits	What it does
STALLIF	7	STALL Handshake Interrupt bit `0` STALL handshake has not been sent `1` In Host mode
ATTACHIF	6	Peripheral Attach Interrupt bit `0` Peripheral attachment was not detected `1` Peripheral attachment was detected by the USB module
RESUMEIF	5	Resume Interrupt bit `0` K-State is not observed `1` K-State is observed on the D+ or D- pin for 2.5 s
IDLEIF	4	Idle Detect Interrupt bit `0` No Idle condition detected `1` Idle condition detected (constant Idle state of 3 ms or more)
TRNIF	3	Token Processing Complete Interrupt bit `0` Processing of current token not complete `1` Processing of current token is complete; a read of the UxSTAT register will provide endpoint information
SOFIF	2	SOF Token Interrupt bit `0` SOF token was not received nor threshold reached `1` SOF token received by the peripheral or the SOF threshold reached by the host
UERRIF	1	USB Error Condition Interrupt bit `0` Unmasked error condition has not occurred `1` Unmasked error condition has occurred
URSTIF_DETACHIF	0	(Device mode) USB Reset Interrupt bit Device mode / (Host mode)USB Detach Interrupt bit Host mode `0` (Device mode)o USB Reset has occurred / (Host mode)Peripheral detachment was not detected `1` (Device mode)Valid USB Reset has occurred / (Host mode)Peripheral detachment was detected by the USB module

U1IEUSB Interrupt Enable Register (x = 1 and 2)

Address: 0xBF844210
Reset: 0x00000000
Access: read/write
Size: 32-bit

8 fields

Field	Bits	What it does
STALLIE	7	STALL Handshake Interrupt Enable bit `0` STALL interrupt is disabled `1` STALL interrupt is enabled
ATTACHIE	6	ATTACH Interrupt Enable bit `0` ATTACH interrupt is disabled `1` ATTACH interrupt is enabled
RESUMEIE	5	RESUME Interrupt Enable bit `0` RESUME interrupt is disabled `1` RESUME interrupt is enabled
IDLEIE	4	Idle Detect Interrupt Enable bit `0` Idle interrupt is disabled `1` Idle interrupt is enabled
TRNIE	3	Token Processing Complete Interrupt Enable bit `0` TRNIF interrupt is disabled `1` TRNIF interrupt is enabled
SOFIE	2	SOF Token Interrupt Enable bit `0` SOFIF interrupt is disabled `1` SOFIF interrupt is enabled
UERRIE	1	USB Error Interrupt Enable bit `0` USB Error interrupt is disabled `1` USB Error interrupt is enabled
URSTIE_DETACHIE	0	(Device mode) USB Reset Interrupt Enable bit Device mode / (Host mode)USB Detach Interrupt Enable bit Host Mode `0` (Device mode) URSTIF interrupt is disabled / (Host mode) DATTCHIF interrupt is disabled `1` (Device mode) URSTIF interrupt is enabled / (Host mode) DATTCHIF interrupt is enabled

U1EIRUSB Error Interrupt Status Register (x = 1 and 2)

Address: 0xBF844220
Reset: 0x00000000
Access: read/write
Size: 32-bit

8 fields

Field	Bits	What it does
BTSEF	7	Bit Stuff Error Flag bit `0` Packet accepted `1` Packet rejected due to bit stuff error
BMXEF	6	Bus Matrix Error Flag bit `0` No address error `1` The base address
DMAEF	5	DMA Error Flag bit `0` No DMA error `1` USB DMA error condition detected
BTOEF	4	Bus Turnaround Time-Out Error Flag bit `0` No bus turnaround time-out `1` Bus turnaround time-out has occurred
DFN8EF	3	Data Field Size Error Flag bit `0` Data field received is an integral number of bytes `1` Data field received is not an integral number of bytes
CRC16EF	2	CRC16 Failure Flag bit `0` Data packet accepted `1` Data packet rejected due to CRC16 error
CRC5EF_EOFEF	1	(Device mode)CRC5 Host Error Flag bit / (Host mode)EOF Error Flag bit `0` (Device mode)Token packet accepted / (Host mode)No EOF error condition `1` (Device mode)Token packet rejected due to CRC5 error / (Host mode)EOF error condition detected
PIDEF	0	PID Check Failure Flag bit `0` PID check passed `1` PID check failed

U1EIEUSB Error Interrupt Enable Register (x = 1 and 2)

Address: 0xBF844230
Reset: 0x00000000
Access: read/write
Size: 32-bit

8 fields

Field	Bits	What it does
BTSEE	7	Bit Stuff Error Interrupt Enable bit `0` BTSEF interrupt is disabled `1` BTSEF interrupt is enabled
BMXEE	6	Bus Matrix Error Interrupt Enable bit `0` BMXEF interrupt is disabled `1` BMXEF interrupt is enabled
DMAEE	5	DMA Error Interrupt Enable bit `0` DMAEF interrupt is disabled `1` DMAEF interrupt is enabled
BTOEE	4	Bus Turnaround Time-out Error Interrupt Enable bit `0` BTOEF interrupt is disabled `1` BTOEF interrupt is enabled
DFN8EE	3	Data Field Size Error Interrupt Enable bit `0` DFN8EF interrupt is disabled `1` DFN8EF interrupt is enabled
CRC16EE	2	CRC16 Failure Interrupt Enable bit `0` CRC16EF interrupt is disabled `1` CRC16EF interrupt is enabled
CRC5EE_EOFEE	1	(Device mode) CRC5 Host Error Interrupt Enable bit / (Host mode) EOF Error Interrupt Enable bit `0` (Device mode)CRC5EF interrupt is disabled / (Host mode)EOF interrupt is disabled `1` (Device mode)CRC5EF interrupt is enabled / (Host mode)EOF interrupt is enabled
PIDEE	0	PID Check Failure Interrupt Enable bit `0` PIDEF interrupt is disabled `1` PIDEF interrupt is enabled

U1STATUSB Status Register (x = 1 and 2)

Address: 0xBF844240
Reset: 0x00000000
Access: read only
Size: 32-bit

3 fields

Field	Bits	What it does
ENDPT	4	Encoded Number of Last Endpoint Activity bits `0` Endpoint 0 `1` Endpoint 1 `14` Endpoint 14 `15` Endpoint 15
DIR	3	Last BD Direction Indicator bit `0` Last transaction was a receive transfer (RX) `1` Last transaction was a transmit transfer (TX)
PPBI	2	Ping-Pong BD Pointer Indicator bit `0` The last transaction was to the EVEN BD bank `1` The last transaction was to the ODD BD bank

U1CONUSB Control Register (x = 1 and 2)

Address: 0xBF844250
Reset: 0x00000000
Access: read/write
Size: 32-bit

8 fields

Field	Bits	What it does
JSTATE	7	Live Differential Receiver JSTATE flag bit `0` No JSTATE detected `1` JSTATE detected on the USB
SE0	6	Live Single-Ended Zero flag bit `0` No Single Ended Zero detected `1` Single Ended Zero detected on the USB
PKTDIS_TOKBUSY	5	(Device mode) Packet Transfer Disable bit / (Host mode) Token Busy Indicator bit `0` (Device mode)Token and packet processing enabled / (Host mode)No token being executed `1` (Device mode)Token and packet processing disabled (set upon SETUP token received) / (Host mode)Token being executed by the USB module
USBRST	4	Module Reset bit `0` USB reset is terminated `1` USB reset is generated
HOSTEN	3	Host Mode Enable bit `0` USB host capability is disabled `1` USB host capability is enabled
RESUME	2	RESUME Signaling Enable bit `0` RESUME signaling is disabled `1` RESUME signaling is activated
PPBRST	1	Ping-Pong Buffers Reset bit `0` Even/Odd buffer pointers not being Reset `1` Reset all Even/Odd buffer pointers to the EVEN BD banks
USBEN_SOFEN	0	(Device mode)USB Module Enable bit / (Host mode) `0` (Device mode)USB module and supporting circuitry is disabled / (Host mode)SOF token disabled `1` (Device mode)USB module and supporting circuitry is enabled / (Host mode)SOF token sent every 1 ms

U1ADDRUSB Address Register (x = 1 and 2)

Address: 0xBF844260
Reset: 0x00000000
Access: read/write
Size: 32-bit

2 fields

Field	Bits	What it does
LSPDEN	7	Low Speed Enable Indicator bit `0` Next token command to be executed at Full Speed `1` Next token command to be executed at Low Speed
DEVADDR	6:0

U1BDTP1USB BDT Page 1 Register (x = 1 and 2)

Address: 0xBF844270
Reset: 0x00000000
Access: read/write
Size: 32-bit

1 field

Field	Bits	What it does
BDTPTRL	7:1

U1FRMLUSB Frame Number Low Register (x = 1 and 2)

Address: 0xBF844280
Reset: 0x00000000
Access: read only
Size: 32-bit

1 field

Field	Bits	What it does
FRML	7:0

U1FRMHUSB Frame Number High Register (x = 1 and 2)

Address: 0xBF844290
Reset: 0x00000000
Access: read only
Size: 32-bit

1 field

Field	Bits	What it does
FRMH	2:0

U1TOKUSB Token Register (x = 1 and 2)

Address: 0xBF8442A0
Reset: 0x00000000
Access: read/write
Size: 32-bit

2 fields

Field	Bits	What it does
PID	7:4	Token Type Indicator bits `0` reserved `1` OUT (TX) token type transaction `2` reserved `3` reserved `4` reserved `5` reserved `6` reserved `7` reserved `8` reserved `9` IN (RX) token type transaction `10` reserved `11` reserved `12` reserved `13` SETUP (TX) token type transaction `14` reserved `15` reserved
EP	3:0

U1SOFUSB SOF Threshold Register (x = 1 and 2)

Address: 0xBF8442B0
Reset: 0x00000000
Access: read/write
Size: 32-bit

1 field

Field	Bits	What it does
CNT	7:0	SOF Threshold Value bits `18` 8-byte packet `26` 16-byte packet `42` 32-byte packet `74` 64-byte packet

U1BDTP2USB BDT PAGE 2 Register (x = 1 and 2)

Address: 0xBF8442C0
Reset: 0x00000000
Access: read/write
Size: 32-bit

1 field

Field	Bits	What it does
BDTPTRH	7:0

U1BDTP3USB BDT PAGE 3 Register (x = 1 and 2)

Address: 0xBF8442D0
Reset: 0x00000000
Access: read/write
Size: 32-bit

1 field

Field	Bits	What it does
BDTPTRU	7:0

U1CNFG1USB Configuration 1 Register (x = 1 and 2)

Address: 0xBF8442E0
Reset: 0x00000000
Access: read/write
Size: 32-bit

4 fields

Field	Bits	What it does
UTEYE	7	USB Eye-Pattern Test Enable bit `0` Eye-Pattern Test is disabled `1` Eye-Pattern Test is enabled
UOEMON	6	USB `0` OE signal is inactive `1` OE signal is active; it indicates intervals during which the D+/D- lines are driving
USBSIDL	4	Stop in Idle Mode bit `0` Continue module operation in Idle mode `1` Discontinue module operation when device enters Idle mode
UASUSPND	0	Automatic Suspend Enable bit `0` USB module does not automatically suspend upon entry to Sleep mode. Software must use the USUSPEND bit (UxPWRC) to suspend the module `1` USB module automatically suspends upon entry to Sleep mode. See the USUSPEND bit (UxPWRC) in

U1EP0USB Endpoint Control Register 0

Address: 0xBF844300
Reset: 0x00000000
Access: read/write
Size: 32-bit

7 fields

Field	Bits	What it does
LSPD	7	Low-Speed Direct Connection Enable bit `0` Direct connection to a low-speed device is disabled; hub required with PRE_PID `1` Direct connection to a low-speed device is enabled
RETRYDIS	6	Retry Disable bit `0` Retry NAKed transactions is enabled; retry done in hardware `1` Retry NAKed transactions is disabled
EPCONDIS	4	Bidirectional Endpoint Control bit `0` (If EPTXEN is 1 and EPRXEN is 1)Enable Endpoint n for Control (SETUP) transfers; TX and RX transfers also allowed / (else)bit is ignored `1` (If EPTXEN is 1 and EPRXEN is 1)Disable Endpoint n from Control transfers; only TX and RX transfers allowed / (else)bit is ignored
EPRXEN	3	Endpoint Receive Enable bit `0` Endpoint n receive is disabled `1` Endpoint n receive is enabled
EPTXEN	2	Endpoint Transmit Enable bit `0` Endpoint n transmit is disabled `1` Endpoint n transmit is enabled
EPSTALL	1	Endpoint Stall Status bit `0` Endpoint n was not stalled `1` Endpoint n was stalled
EPHSHK	0	Endpoint Handshake Enable bit `0` Endpoint Handshake is disabled (typically used for isochronous endpoints) `1` Endpoint Handshake is enabled

U1EP1USB Endpoint Control Register 1

Address: 0xBF844310
Reset: 0x00000000
Access: read/write
Size: 32-bit

5 fields

Field	Bits	What it does
EPCONDIS	4	Bidirectional Endpoint Control bit `0` (If EPTXEN is 1 and EPRXEN is 1)Enable Endpoint n for Control (SETUP) transfers; TX and RX transfers also allowed / (else)bit is ignored `1` (If EPTXEN is 1 and EPRXEN is 1)Disable Endpoint n from Control transfers; only TX and RX transfers allowed / (else)bit is ignored
EPRXEN	3	Endpoint Receive Enable bit `0` Endpoint n receive is disabled `1` Endpoint n receive is enabled
EPTXEN	2	Endpoint Transmit Enable bit `0` Endpoint n transmit is disabled `1` Endpoint n transmit is enabled
EPSTALL	1	Endpoint Stall Status bit `0` Endpoint n was not stalled `1` Endpoint n was stalled
EPHSHK	0	Endpoint Handshake Enable bit `0` Endpoint Handshake is disabled (typically used for isochronous endpoints) `1` Endpoint Handshake is enabled

U1EP2USB Endpoint Control Register 2

Address: 0xBF844320
Reset: 0x00000000
Access: read/write
Size: 32-bit

5 fields

Field	Bits	What it does
EPCONDIS	4	Bidirectional Endpoint Control bit `0` (If EPTXEN is 1 and EPRXEN is 1)Enable Endpoint n for Control (SETUP) transfers; TX and RX transfers also allowed / (else)bit is ignored `1` (If EPTXEN is 1 and EPRXEN is 1)Disable Endpoint n from Control transfers; only TX and RX transfers allowed / (else)bit is ignored
EPRXEN	3	Endpoint Receive Enable bit `0` Endpoint n receive is disabled `1` Endpoint n receive is enabled
EPTXEN	2	Endpoint Transmit Enable bit `0` Endpoint n transmit is disabled `1` Endpoint n transmit is enabled
EPSTALL	1	Endpoint Stall Status bit `0` Endpoint n was not stalled `1` Endpoint n was stalled
EPHSHK	0	Endpoint Handshake Enable bit `0` Endpoint Handshake is disabled (typically used for isochronous endpoints) `1` Endpoint Handshake is enabled

U1EP3USB Endpoint Control Register 3

Address: 0xBF844330
Reset: 0x00000000
Access: read/write
Size: 32-bit

5 fields

Field	Bits	What it does
EPCONDIS	4	Bidirectional Endpoint Control bit `0` (If EPTXEN is 1 and EPRXEN is 1)Enable Endpoint n for Control (SETUP) transfers; TX and RX transfers also allowed / (else)bit is ignored `1` (If EPTXEN is 1 and EPRXEN is 1)Disable Endpoint n from Control transfers; only TX and RX transfers allowed / (else)bit is ignored
EPRXEN	3	Endpoint Receive Enable bit `0` Endpoint n receive is disabled `1` Endpoint n receive is enabled
EPTXEN	2	Endpoint Transmit Enable bit `0` Endpoint n transmit is disabled `1` Endpoint n transmit is enabled
EPSTALL	1	Endpoint Stall Status bit `0` Endpoint n was not stalled `1` Endpoint n was stalled
EPHSHK	0	Endpoint Handshake Enable bit `0` Endpoint Handshake is disabled (typically used for isochronous endpoints) `1` Endpoint Handshake is enabled

U1EP4USB Endpoint Control Register 4

Address: 0xBF844340
Reset: 0x00000000
Access: read/write
Size: 32-bit

5 fields

Field	Bits	What it does
EPCONDIS	4	Bidirectional Endpoint Control bit `0` (If EPTXEN is 1 and EPRXEN is 1)Enable Endpoint n for Control (SETUP) transfers; TX and RX transfers also allowed / (else)bit is ignored `1` (If EPTXEN is 1 and EPRXEN is 1)Disable Endpoint n from Control transfers; only TX and RX transfers allowed / (else)bit is ignored
EPRXEN	3	Endpoint Receive Enable bit `0` Endpoint n receive is disabled `1` Endpoint n receive is enabled
EPTXEN	2	Endpoint Transmit Enable bit `0` Endpoint n transmit is disabled `1` Endpoint n transmit is enabled
EPSTALL	1	Endpoint Stall Status bit `0` Endpoint n was not stalled `1` Endpoint n was stalled
EPHSHK	0	Endpoint Handshake Enable bit `0` Endpoint Handshake is disabled (typically used for isochronous endpoints) `1` Endpoint Handshake is enabled

U1EP5USB Endpoint Control Register 5

Address: 0xBF844350
Reset: 0x00000000
Access: read/write
Size: 32-bit

5 fields

Field	Bits	What it does
EPCONDIS	4	Bidirectional Endpoint Control bit `0` (If EPTXEN is 1 and EPRXEN is 1)Enable Endpoint n for Control (SETUP) transfers; TX and RX transfers also allowed / (else)bit is ignored `1` (If EPTXEN is 1 and EPRXEN is 1)Disable Endpoint n from Control transfers; only TX and RX transfers allowed / (else)bit is ignored
EPRXEN	3	Endpoint Receive Enable bit `0` Endpoint n receive is disabled `1` Endpoint n receive is enabled
EPTXEN	2	Endpoint Transmit Enable bit `0` Endpoint n transmit is disabled `1` Endpoint n transmit is enabled
EPSTALL	1	Endpoint Stall Status bit `0` Endpoint n was not stalled `1` Endpoint n was stalled
EPHSHK	0	Endpoint Handshake Enable bit `0` Endpoint Handshake is disabled (typically used for isochronous endpoints) `1` Endpoint Handshake is enabled

U1EP6USB Endpoint Control Register 6

Address: 0xBF844360
Reset: 0x00000000
Access: read/write
Size: 32-bit

5 fields

Field	Bits	What it does
EPCONDIS	4	Bidirectional Endpoint Control bit `0` (If EPTXEN is 1 and EPRXEN is 1)Enable Endpoint n for Control (SETUP) transfers; TX and RX transfers also allowed / (else)bit is ignored `1` (If EPTXEN is 1 and EPRXEN is 1)Disable Endpoint n from Control transfers; only TX and RX transfers allowed / (else)bit is ignored
EPRXEN	3	Endpoint Receive Enable bit `0` Endpoint n receive is disabled `1` Endpoint n receive is enabled
EPTXEN	2	Endpoint Transmit Enable bit `0` Endpoint n transmit is disabled `1` Endpoint n transmit is enabled
EPSTALL	1	Endpoint Stall Status bit `0` Endpoint n was not stalled `1` Endpoint n was stalled
EPHSHK	0	Endpoint Handshake Enable bit `0` Endpoint Handshake is disabled (typically used for isochronous endpoints) `1` Endpoint Handshake is enabled

U1EP7USB Endpoint Control Register 7

Address: 0xBF844370
Reset: 0x00000000
Access: read/write
Size: 32-bit

5 fields

Field	Bits	What it does
EPCONDIS	4	Bidirectional Endpoint Control bit `0` (If EPTXEN is 1 and EPRXEN is 1)Enable Endpoint n for Control (SETUP) transfers; TX and RX transfers also allowed / (else)bit is ignored `1` (If EPTXEN is 1 and EPRXEN is 1)Disable Endpoint n from Control transfers; only TX and RX transfers allowed / (else)bit is ignored
EPRXEN	3	Endpoint Receive Enable bit `0` Endpoint n receive is disabled `1` Endpoint n receive is enabled
EPTXEN	2	Endpoint Transmit Enable bit `0` Endpoint n transmit is disabled `1` Endpoint n transmit is enabled
EPSTALL	1	Endpoint Stall Status bit `0` Endpoint n was not stalled `1` Endpoint n was stalled
EPHSHK	0	Endpoint Handshake Enable bit `0` Endpoint Handshake is disabled (typically used for isochronous endpoints) `1` Endpoint Handshake is enabled

U1EP8USB Endpoint Control Register 8

Address: 0xBF844380
Reset: 0x00000000
Access: read/write
Size: 32-bit

5 fields

Field	Bits	What it does
EPCONDIS	4	Bidirectional Endpoint Control bit `0` (If EPTXEN is 1 and EPRXEN is 1)Enable Endpoint n for Control (SETUP) transfers; TX and RX transfers also allowed / (else)bit is ignored `1` (If EPTXEN is 1 and EPRXEN is 1)Disable Endpoint n from Control transfers; only TX and RX transfers allowed / (else)bit is ignored
EPRXEN	3	Endpoint Receive Enable bit `0` Endpoint n receive is disabled `1` Endpoint n receive is enabled
EPTXEN	2	Endpoint Transmit Enable bit `0` Endpoint n transmit is disabled `1` Endpoint n transmit is enabled
EPSTALL	1	Endpoint Stall Status bit `0` Endpoint n was not stalled `1` Endpoint n was stalled
EPHSHK	0	Endpoint Handshake Enable bit `0` Endpoint Handshake is disabled (typically used for isochronous endpoints) `1` Endpoint Handshake is enabled

U1EP9USB Endpoint Control Register 9

Address: 0xBF844390
Reset: 0x00000000
Access: read/write
Size: 32-bit

5 fields

Field	Bits	What it does
EPCONDIS	4	Bidirectional Endpoint Control bit `0` (If EPTXEN is 1 and EPRXEN is 1)Enable Endpoint n for Control (SETUP) transfers; TX and RX transfers also allowed / (else)bit is ignored `1` (If EPTXEN is 1 and EPRXEN is 1)Disable Endpoint n from Control transfers; only TX and RX transfers allowed / (else)bit is ignored
EPRXEN	3	Endpoint Receive Enable bit `0` Endpoint n receive is disabled `1` Endpoint n receive is enabled
EPTXEN	2	Endpoint Transmit Enable bit `0` Endpoint n transmit is disabled `1` Endpoint n transmit is enabled
EPSTALL	1	Endpoint Stall Status bit `0` Endpoint n was not stalled `1` Endpoint n was stalled
EPHSHK	0	Endpoint Handshake Enable bit `0` Endpoint Handshake is disabled (typically used for isochronous endpoints) `1` Endpoint Handshake is enabled

U1EP10USB Endpoint Control Register 10

Address: 0xBF8443A0
Reset: 0x00000000
Access: read/write
Size: 32-bit

5 fields

Field	Bits	What it does
EPCONDIS	4	Bidirectional Endpoint Control bit `0` (If EPTXEN is 1 and EPRXEN is 1)Enable Endpoint n for Control (SETUP) transfers; TX and RX transfers also allowed / (else)bit is ignored `1` (If EPTXEN is 1 and EPRXEN is 1)Disable Endpoint n from Control transfers; only TX and RX transfers allowed / (else)bit is ignored
EPRXEN	3	Endpoint Receive Enable bit `0` Endpoint n receive is disabled `1` Endpoint n receive is enabled
EPTXEN	2	Endpoint Transmit Enable bit `0` Endpoint n transmit is disabled `1` Endpoint n transmit is enabled
EPSTALL	1	Endpoint Stall Status bit `0` Endpoint n was not stalled `1` Endpoint n was stalled
EPHSHK	0	Endpoint Handshake Enable bit `0` Endpoint Handshake is disabled (typically used for isochronous endpoints) `1` Endpoint Handshake is enabled

U1EP11USB Endpoint Control Register 11

Address: 0xBF8443B0
Reset: 0x00000000
Access: read/write
Size: 32-bit

5 fields

Field	Bits	What it does
EPCONDIS	4	Bidirectional Endpoint Control bit `0` (If EPTXEN is 1 and EPRXEN is 1)Enable Endpoint n for Control (SETUP) transfers; TX and RX transfers also allowed / (else)bit is ignored `1` (If EPTXEN is 1 and EPRXEN is 1)Disable Endpoint n from Control transfers; only TX and RX transfers allowed / (else)bit is ignored
EPRXEN	3	Endpoint Receive Enable bit `0` Endpoint n receive is disabled `1` Endpoint n receive is enabled
EPTXEN	2	Endpoint Transmit Enable bit `0` Endpoint n transmit is disabled `1` Endpoint n transmit is enabled
EPSTALL	1	Endpoint Stall Status bit `0` Endpoint n was not stalled `1` Endpoint n was stalled
EPHSHK	0	Endpoint Handshake Enable bit `0` Endpoint Handshake is disabled (typically used for isochronous endpoints) `1` Endpoint Handshake is enabled

U1EP12USB Endpoint Control Register 12

Address: 0xBF8443C0
Reset: 0x00000000
Access: read/write
Size: 32-bit

5 fields

Field	Bits	What it does
EPCONDIS	4	Bidirectional Endpoint Control bit `0` (If EPTXEN is 1 and EPRXEN is 1)Enable Endpoint n for Control (SETUP) transfers; TX and RX transfers also allowed / (else)bit is ignored `1` (If EPTXEN is 1 and EPRXEN is 1)Disable Endpoint n from Control transfers; only TX and RX transfers allowed / (else)bit is ignored
EPRXEN	3	Endpoint Receive Enable bit `0` Endpoint n receive is disabled `1` Endpoint n receive is enabled
EPTXEN	2	Endpoint Transmit Enable bit `0` Endpoint n transmit is disabled `1` Endpoint n transmit is enabled
EPSTALL	1	Endpoint Stall Status bit `0` Endpoint n was not stalled `1` Endpoint n was stalled
EPHSHK	0	Endpoint Handshake Enable bit `0` Endpoint Handshake is disabled (typically used for isochronous endpoints) `1` Endpoint Handshake is enabled

U1EP13USB Endpoint Control Register 13

Address: 0xBF8443D0
Reset: 0x00000000
Access: read/write
Size: 32-bit

5 fields

Field	Bits	What it does
EPCONDIS	4	Bidirectional Endpoint Control bit `0` (If EPTXEN is 1 and EPRXEN is 1)Enable Endpoint n for Control (SETUP) transfers; TX and RX transfers also allowed / (else)bit is ignored `1` (If EPTXEN is 1 and EPRXEN is 1)Disable Endpoint n from Control transfers; only TX and RX transfers allowed / (else)bit is ignored
EPRXEN	3	Endpoint Receive Enable bit `0` Endpoint n receive is disabled `1` Endpoint n receive is enabled
EPTXEN	2	Endpoint Transmit Enable bit `0` Endpoint n transmit is disabled `1` Endpoint n transmit is enabled
EPSTALL	1	Endpoint Stall Status bit `0` Endpoint n was not stalled `1` Endpoint n was stalled
EPHSHK	0	Endpoint Handshake Enable bit `0` Endpoint Handshake is disabled (typically used for isochronous endpoints) `1` Endpoint Handshake is enabled

U1EP14USB Endpoint Control Register 14

Address: 0xBF8443E0
Reset: 0x00000000
Access: read/write
Size: 32-bit

5 fields

Field	Bits	What it does
EPCONDIS	4	Bidirectional Endpoint Control bit `0` (If EPTXEN is 1 and EPRXEN is 1)Enable Endpoint n for Control (SETUP) transfers; TX and RX transfers also allowed / (else)bit is ignored `1` (If EPTXEN is 1 and EPRXEN is 1)Disable Endpoint n from Control transfers; only TX and RX transfers allowed / (else)bit is ignored
EPRXEN	3	Endpoint Receive Enable bit `0` Endpoint n receive is disabled `1` Endpoint n receive is enabled
EPTXEN	2	Endpoint Transmit Enable bit `0` Endpoint n transmit is disabled `1` Endpoint n transmit is enabled
EPSTALL	1	Endpoint Stall Status bit `0` Endpoint n was not stalled `1` Endpoint n was stalled
EPHSHK	0	Endpoint Handshake Enable bit `0` Endpoint Handshake is disabled (typically used for isochronous endpoints) `1` Endpoint Handshake is enabled

U1EP15USB Endpoint Control Register 15

Address: 0xBF8443F0
Reset: 0x00000000
Access: read/write
Size: 32-bit

5 fields

Field	Bits	What it does
EPCONDIS	4	Bidirectional Endpoint Control bit `0` (If EPTXEN is 1 and EPRXEN is 1)Enable Endpoint n for Control (SETUP) transfers; TX and RX transfers also allowed / (else)bit is ignored `1` (If EPTXEN is 1 and EPRXEN is 1)Disable Endpoint n from Control transfers; only TX and RX transfers allowed / (else)bit is ignored
EPRXEN	3	Endpoint Receive Enable bit `0` Endpoint n receive is disabled `1` Endpoint n receive is enabled
EPTXEN	2	Endpoint Transmit Enable bit `0` Endpoint n transmit is disabled `1` Endpoint n transmit is enabled
EPSTALL	1	Endpoint Stall Status bit `0` Endpoint n was not stalled `1` Endpoint n was stalled
EPHSHK	0	Endpoint Handshake Enable bit `0` Endpoint Handshake is disabled (typically used for isochronous endpoints) `1` Endpoint Handshake is enabled