Hello Learners! I hope you are doing great. Welcome to The Engineering Projects. In our previous lecture, we discussed How to design Half Adder with Universal Gates. In today's tutorial, we are going to design Full Adder with Logical Gates.
In today's tutorial, we will learn the complete information about:
Recalling from our previous lectures:
We classify the Adders into two types:
We have discussed half Adder in detail in our previous two lectures. Today we'll stress the Full Adder:
There are two types of Full Adders:
We define the Full Adder as:
The Full Adder plays an important role in computer hardware calculations i.e. ALU control, register addressing etc. Here's a simple 2-Bit Full Adder Circuit using Logic Gates:
As discussed above, there are three inputs and two outputs present in Full Adder. Therefore, the Truth Table of Full Adder will have 5 columns in total:
The input combinations of the Truth Tables are followed through the formula:
Numbers of Combinations= 2^n
where n is the number of inputs. In our case,n=3
hence,Numbers of Combinations=8
We start the truth table from zero bit. The right most input has the alternative inputs after each combination. The middle contains the alternative bits after two combinations. By the same token the left most changes the input bit after four combinations.
The Truth Table of Full Adder looks like this:
A | B | Cin | Sum |
C0 |
0 | 0 | 0 | 0 | 0 |
0 | 0 | 1 | 1 | 0 |
0 | 1 | 0 | 1 | 0 |
0 | 1 | 1 | 0 | 1 |
1 | 0 | 0 | 1 | 0 |
1 | 0 | 1 | 0 | 1 |
1 | 1 | 0 | 0 | 1 |
1 | 1 | 1 | 1 | 1 |
Carry+A+B | Sum | Carry out |
To design a Full Adder in Proteus, get these components from the library:
Input | Output | ||||||
A | B | Cin | Gate1 |
Gate2 | Gate4 | Gate3(Sum) | Gate5 C0 |
0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
0 | 0 | 1 | 1 | 0 | 0 | 1 | 0 |
0 | 1 | 0 | 1 | 0 | 0 | 1 | 0 |
0 | 1 | 1 | 0 | 1 | 0 | 0 | 1 |
1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 |
1 | 0 | 1 | 1 | 0 | 1 | 0 | 1 |
1 | 1 | 0 | 1 | 0 | 1 | 0 | 1 |
1 | 1 | 1 | 0 | 1 | 0 | 1 | 1 |
Carry+A+B | Sum | Carry out |
Truss, we got a Full Adder circuit through which we can make the calculations.
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