ATmega16A registers
All 70 registers by peripheral, at their data-space address (the I/O address IN and OUT use is shown beside it), with their reset value and every bit.
TWI Two Wire Serial Interface
TWBRTWI Bit Rate register
- Address
0x20 I/O 0x00
- Reset
0x00
- Access
- read/write
- 7TWBR7
- 6TWBR6
- 5TWBR5
- 4TWBR4
- 3TWBR3
- 2TWBR2
- 1TWBR1
- 0TWBR0
1 field
| Field | Bits | What it does |
|---|
| TWBR | 7:0 | TWI Bit Rate bits |
TWSRTWI Status Register
- Address
0x21 I/O 0x01
- Reset
0x00
- Access
- read/write
- 7TWS4
- 6TWS3
- 5TWS2
- 4TWS1
- 3TWS0
- 2–
- 1TWPS1
- 0TWPS0
2 fields
| Field | Bits | What it does |
|---|
| TWS | 7:3 | TWI Status |
| TWPS | 1:0 | TWI Prescaler |
TWARTWI (Slave) Address register
- Address
0x22 I/O 0x02
- Reset
0x00
- Access
- read/write
- 7TWA6
- 6TWA5
- 5TWA4
- 4TWA3
- 3TWA2
- 2TWA1
- 1TWA0
- 0TWGCE
2 fields
| Field | Bits | What it does |
|---|
| TWA | 7:1 | TWI (Slave) Address register Bits |
| TWGCE | 0 | TWI General Call Recognition Enable Bit |
TWDRTWI Data register
- Address
0x23 I/O 0x03
- Reset
0x00
- Access
- read/write
- 7TWD7
- 6TWD6
- 5TWD5
- 4TWD4
- 3TWD3
- 2TWD2
- 1TWD1
- 0TWD0
1 field
| Field | Bits | What it does |
|---|
| TWD | 7:0 | TWI Data bits |
TWCRTWI Control Register
- Address
0x56 I/O 0x36
- Reset
0x00
- Access
- read/write
- 7TWINT
- 6TWEA
- 5TWSTA
- 4TWSTO
- 3TWWC
- 2TWEN
- 1–
- 0TWIE
7 fields
| Field | Bits | What it does |
|---|
| TWINT | 7 | TWI Interrupt Flag |
| TWEA | 6 | TWI Enable Acknowledge Bit |
| TWSTA | 5 | TWI Start Condition Bit |
| TWSTO | 4 | TWI Stop Condition Bit |
| TWWC | 3 | TWI Write Collision Flag |
| TWEN | 2 | TWI Enable Bit |
| TWIE | 0 | TWI Interrupt Enable |
ADC Analog-to-Digital Converter
ADCADC Data Register Bytes
- Address
0x24 I/O 0x04
- Reset
0x0000
- Access
- read/write
- Size
- 16-bit
1 field
| Field | Bits | What it does |
|---|
| ADC | 9:0 | ADC Data Bits0 21 22 43 84 165 326 647 128
|
ADCSRAThe ADC Control and Status register
- Address
0x26 I/O 0x06
- Reset
0x00
- Access
- read/write
- 7ADEN
- 6ADSC
- 5ADATE
- 4ADIF
- 3ADIE
- 2ADPS2
- 1ADPS1
- 0ADPS0
6 fields
| Field | Bits | What it does |
|---|
| ADEN | 7 | ADC Enable |
| ADSC | 6 | ADC Start Conversion |
| ADATE | 5 | ADC Auto Trigger |
| ADIF | 4 | ADC Interrupt Flag |
| ADIE | 3 | ADC Interrupt Enable |
| ADPS | 2:0 | ADC Prescaler Select Bits0 21 22 43 84 165 326 647 128
|
ADMUXThe ADC multiplexer Selection Register
- Address
0x27 I/O 0x07
- Reset
0x00
- Access
- read/write
- 7REFS1
- 6REFS0
- 5ADLAR
- 4MUX4
- 3MUX3
- 2MUX2
- 1MUX1
- 0MUX0
3 fields
| Field | Bits | What it does |
|---|
| REFS | 7:6 | Reference Selection Bits0 AREF, Internal Vref turned off1 AVCC with external capacitor at AREF pin2 Reserved3 Internal 2.56V Voltage Reference with external capacitor at AREF pin
|
| ADLAR | 5 | Left Adjust Result |
| MUX | 4:0 | Analog Channel and Gain Selection Bits |
SFIORSpecial Function IO Register
- Address
0x50 I/O 0x30
- Reset
0x00
- Access
- read/write
- 7ADTS2
- 6ADTS1
- 5ADTS0
- 4–
- 3–
- 2–
- 1–
- 0–
1 field
| Field | Bits | What it does |
|---|
| ADTS | 7:5 | ADC Auto Trigger Sources |
AC Analog Comparator
ACSRAnalog Comparator Control And Status Register
- Address
0x28 I/O 0x08
- Reset
0x00
- Access
- read/write
- 7ACD
- 6ACBG
- 5ACO
- 4ACI
- 3ACIE
- 2ACIC
- 1ACIS1
- 0ACIS0
7 fields
| Field | Bits | What it does |
|---|
| ACD | 7 | Analog Comparator Disable |
| ACBG | 6 | Analog Comparator Bandgap Select |
| ACO | 5 | Analog Compare Output |
| ACI | 4 | Analog Comparator Interrupt Flag |
| ACIE | 3 | Analog Comparator Interrupt Enable |
| ACIC | 2 | Analog Comparator Input Capture Enable |
| ACIS | 1:0 | Analog Comparator Interrupt Mode Select bits0 Interrupt on Toggle1 Reserved2 Interrupt on Falling Edge3 Interrupt on Rising Edge
|
SFIORSpecial Function IO Register
- Address
0x50 I/O 0x30
- Reset
0x00
- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3ACME
- 2–
- 1–
- 0–
1 field
| Field | Bits | What it does |
|---|
| ACME | 3 | Analog Comparator Multiplexer Enable |
USART USART
UBRRLUSART Baud Rate Register
- Address
0x29 I/O 0x09
- Reset
0x00
- Access
- read/write
- 7UBRR7
- 6UBRR6
- 5UBRR5
- 4UBRR4
- 3UBRR3
- 2UBRR2
- 1UBRR1
- 0UBRR0
1 field
| Field | Bits | What it does |
|---|
| UBRR | 7:0 | USART Baud Rate bits |
UCSRBUSART Control and Status Register B
- Address
0x2A I/O 0x0A
- Reset
0x00
- Access
- read/write
- 7RXCIE
- 6TXCIE
- 5UDRIE
- 4RXEN
- 3TXEN
- 2UCSZ2
- 1RXB8
- 0TXB8
8 fields
| Field | Bits | What it does |
|---|
| RXCIE | 7 | RX Complete Interrupt Enable |
| TXCIE | 6 | TX Complete Interrupt Enable |
| UDRIE | 5 | USART Data register Empty Interrupt Enable |
| RXEN | 4 | Receiver Enable |
| TXEN | 3 | Transmitter Enable |
| UCSZ2 | 2 | Character Size |
| RXB8 | 1 | Receive Data Bit 8 |
| TXB8 | 0 | Transmit Data Bit 8 |
UCSRAUSART Control and Status Register A
- Address
0x2B I/O 0x0B
- Reset
0x00
- Access
- read/write
- 7RXC
- 6TXC
- 5UDRE
- 4FE
- 3DOR
- 2UPE
- 1U2X
- 0MPCM
8 fields
| Field | Bits | What it does |
|---|
| RXC | 7 | USART Receive Complete |
| TXC | 6 | USART Transmit Complete |
| UDRE | 5 | USART Data Register Empty |
| FE | 4 | Framing Error |
| DOR | 3 | Data Overrun |
| UPE | 2 | Parity Error |
| U2X | 1 | Double the USART transmission speed |
| MPCM | 0 | Multi-processor Communication Mode |
UDRUSART I/O Data Register
- Address
0x2C I/O 0x0C
- Reset
0x00
- Access
- read/write
- 7UDR7
- 6UDR6
- 5UDR5
- 4UDR4
- 3UDR3
- 2UDR2
- 1UDR1
- 0UDR0
1 field
| Field | Bits | What it does |
|---|
| UDR | 7:0 | USART I/O Data bits |
UBRRHUSART Baud Rate Register
- Address
0x40 I/O 0x20
- Reset
0x00
- Access
- read/write
- 7URSEL
- 6–
- 5–
- 4–
- 3UBRR3
- 2UBRR2
- 1UBRR1
- 0UBRR0
2 fields
| Field | Bits | What it does |
|---|
| URSEL | 7 | Register Select |
| UBRR | 3:0 | USART Baud Rate bits |
UCSRCUSART Control and Status Register C
- Address
0x40 I/O 0x20
- Reset
0x00
- Access
- read/write
- 7URSEL
- 6UMSEL
- 5UPM1
- 4UPM0
- 3USBS
- 2UCSZ1
- 1UCSZ0
- 0UCPOL
6 fields
| Field | Bits | What it does |
|---|
| URSEL | 7 | Register Select |
| UMSEL | 6 | USART Mode Select0 Asynchronous Operation1 Synchronous Operation
|
| UPM | 5:4 | Parity Mode Bits0 Disabled1 Reserved2 Enabled, Even Parity3 Enabled, Odd Parity
|
| USBS | 3 | Stop Bit Select |
| UCSZ | 2:1 | Character Size |
| UCPOL | 0 | Clock Polarity |
SPI Serial Peripheral Interface
SPCRSPI Control Register
- Address
0x2D I/O 0x0D
- Reset
0x00
- Access
- read/write
- 7SPIE
- 6SPE
- 5DORD
- 4MSTR
- 3CPOL
- 2CPHA
- 1SPR1
- 0SPR0
7 fields
| Field | Bits | What it does |
|---|
| SPIE | 7 | SPI Interrupt Enable |
| SPE | 6 | SPI Enable |
| DORD | 5 | Data Order |
| MSTR | 4 | Master/Slave Select |
| CPOL | 3 | Clock polarity |
| CPHA | 2 | Clock Phase |
| SPR | 1:0 | SPI Clock Rate Selects0 fosc/41 fosc/162 fosc/643 fosc/1284 fosc/25 fosc/86 fosc/327 fosc/64
|
SPSRSPI Status Register
- Address
0x2E I/O 0x0E
- Reset
0x00
- Access
- read/write
- 7SPIF
- 6WCOL
- 5–
- 4–
- 3–
- 2–
- 1–
- 0SPI2X
3 fields
| Field | Bits | What it does |
|---|
| SPIF | 7 | SPI Interrupt Flag |
| WCOL | 6 | Write Collision Flag |
| SPI2X | 0 | Double SPI Speed Bit |
SPDRSPI Data Register
- Address
0x2F I/O 0x0F
- Reset
0x00
- Access
- read/write
- 7SPDR7
- 6SPDR6
- 5SPDR5
- 4SPDR4
- 3SPDR3
- 2SPDR2
- 1SPDR1
- 0SPDR0
1 field
| Field | Bits | What it does |
|---|
| SPDR | 7:0 | SPI Data bits |
PORTD I/O Port
PINDPort D Input Pins
- Address
0x30 I/O 0x10
- Reset
0x00
- Access
- read/write
- 7PIND7
- 6PIND6
- 5PIND5
- 4PIND4
- 3PIND3
- 2PIND2
- 1PIND1
- 0PIND0
DDRDPort D Data Direction Register
- Address
0x31 I/O 0x11
- Reset
0x00
- Access
- read/write
- 7DDD7
- 6DDD6
- 5DDD5
- 4DDD4
- 3DDD3
- 2DDD2
- 1DDD1
- 0DDD0
PORTDPort D Data Register
- Address
0x32 I/O 0x12
- Reset
0x00
- Access
- read/write
- 7PORTD7
- 6PORTD6
- 5PORTD5
- 4PORTD4
- 3PORTD3
- 2PORTD2
- 1PORTD1
- 0PORTD0
PORTC I/O Port
PINCPort C Input Pins
- Address
0x33 I/O 0x13
- Reset
0x00
- Access
- read/write
- 7PINC7
- 6PINC6
- 5PINC5
- 4PINC4
- 3PINC3
- 2PINC2
- 1PINC1
- 0PINC0
DDRCPort C Data Direction Register
- Address
0x34 I/O 0x14
- Reset
0x00
- Access
- read/write
- 7DDC7
- 6DDC6
- 5DDC5
- 4DDC4
- 3DDC3
- 2DDC2
- 1DDC1
- 0DDC0
PORTCPort C Data Register
- Address
0x35 I/O 0x15
- Reset
0x00
- Access
- read/write
- 7PORTC7
- 6PORTC6
- 5PORTC5
- 4PORTC4
- 3PORTC3
- 2PORTC2
- 1PORTC1
- 0PORTC0
PORTB I/O Port
PINBPort B Input Pins
- Address
0x36 I/O 0x16
- Reset
0x00
- Access
- read/write
- 7PINB7
- 6PINB6
- 5PINB5
- 4PINB4
- 3PINB3
- 2PINB2
- 1PINB1
- 0PINB0
DDRBPort B Data Direction Register
- Address
0x37 I/O 0x17
- Reset
0x00
- Access
- read/write
- 7DDB7
- 6DDB6
- 5DDB5
- 4DDB4
- 3DDB3
- 2DDB2
- 1DDB1
- 0DDB0
PORTBPort B Data Register
- Address
0x38 I/O 0x18
- Reset
0x00
- Access
- read/write
- 7PORTB7
- 6PORTB6
- 5PORTB5
- 4PORTB4
- 3PORTB3
- 2PORTB2
- 1PORTB1
- 0PORTB0
PORTA I/O Port
PINAPort A Input Pins
- Address
0x39 I/O 0x19
- Reset
0x00
- Access
- read/write
- 7PINA7
- 6PINA6
- 5PINA5
- 4PINA4
- 3PINA3
- 2PINA2
- 1PINA1
- 0PINA0
DDRAPort A Data Direction Register
- Address
0x3A I/O 0x1A
- Reset
0x00
- Access
- read/write
- 7DDA7
- 6DDA6
- 5DDA5
- 4DDA4
- 3DDA3
- 2DDA2
- 1DDA1
- 0DDA0
PORTAPort A Data Register
- Address
0x3B I/O 0x1B
- Reset
0x00
- Access
- read/write
- 7PORTA7
- 6PORTA6
- 5PORTA5
- 4PORTA4
- 3PORTA3
- 2PORTA2
- 1PORTA1
- 0PORTA0
EEPROM EEPROM
EECREEPROM Control Register
- Address
0x3C I/O 0x1C
- Reset
0x00
- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3EERIE
- 2EEMWE
- 1EEWE
- 0EERE
4 fields
| Field | Bits | What it does |
|---|
| EERIE | 3 | EEPROM Ready Interrupt Enable |
| EEMWE | 2 | EEPROM Master Write Enable |
| EEWE | 1 | EEPROM Write Enable |
| EERE | 0 | EEPROM Read Enable |
EEDREEPROM Data Register
- Address
0x3D I/O 0x1D
- Reset
0x00
- Access
- read/write
- 7EEDR7
- 6EEDR6
- 5EEDR5
- 4EEDR4
- 3EEDR3
- 2EEDR2
- 1EEDR1
- 0EEDR0
1 field
| Field | Bits | What it does |
|---|
| EEDR | 7:0 | EEPROM Data bits |
EEAREEPROM Address Register Bytes
- Address
0x3E I/O 0x1E
- Reset
0x0000
- Access
- read/write
- Size
- 16-bit
1 field
| Field | Bits | What it does |
|---|
| EEAR | 8:0 | EEPROM Address bits |
WDT Watchdog Timer
WDTCRWatchdog Timer Control Register
- Address
0x41 I/O 0x21
- Reset
0x00
- Access
- read/write
- 7–
- 6–
- 5–
- 4WDTOE
- 3WDE
- 2WDP2
- 1WDP1
- 0WDP0
3 fields
| Field | Bits | What it does |
|---|
| WDTOE | 4 | RW |
| WDE | 3 | Watch Dog Enable |
| WDP | 2:0 | Watch Dog Timer Prescaler bits0 Oscillator Cycles 16K1 Oscillator Cycles 32K2 Oscillator Cycles 64K3 Oscillator Cycles 128K4 Oscillator Cycles 256K5 Oscillator Cycles 512K6 Oscillator Cycles 1024K7 Oscillator Cycles 2048K
|
TC2 Timer/Counter, 8-bit Async
ASSRAsynchronous Status Register
- Address
0x42 I/O 0x22
- Reset
0x00
- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3AS2
- 2TCN2UB
- 1OCR2UB
- 0TCR2UB
4 fields
| Field | Bits | What it does |
|---|
| AS2 | 3 | Asynchronous Timer/counter2 |
| TCN2UB | 2 | Timer/Counter2 Update Busy |
| OCR2UB | 1 | Output Compare Register2 Update Busy |
| TCR2UB | 0 | Timer/counter Control Register2 Update Busy |
OCR2Timer/Counter2 Output Compare Register
- Address
0x43 I/O 0x23
- Reset
0x00
- Access
- read/write
- 7OCR27
- 6OCR26
- 5OCR25
- 4OCR24
- 3OCR23
- 2OCR22
- 1OCR21
- 0OCR20
1 field
| Field | Bits | What it does |
|---|
| OCR2 | 7:0 | Timer/Counter2 Output Compare bits |
TCNT2Timer/Counter2
- Address
0x44 I/O 0x24
- Reset
0x00
- Access
- read/write
- 7TCNT27
- 6TCNT26
- 5TCNT25
- 4TCNT24
- 3TCNT23
- 2TCNT22
- 1TCNT21
- 0TCNT20
1 field
| Field | Bits | What it does |
|---|
| TCNT2 | 7:0 | Timer/Counter2 |
TCCR2Timer/Counter2 Control Register
- Address
0x45 I/O 0x25
- Reset
0x00
- Access
- read/write
- 7FOC2
- 6WGM20
- 5COM21
- 4COM20
- 3WGM21
- 2CS22
- 1CS21
- 0CS20
5 fields
| Field | Bits | What it does |
|---|
| FOC2 | 7 | Force Output Compare |
| WGM20 | 6 | Waveform Generation Mode0 Normal1 CTC2 PWM, Phase Correct3 Fast PWM
|
| COM2 | 5:4 | Compare Output Mode bits |
| WGM21 | 3 | Waveform Generation Mode |
| CS2 | 2:0 | Clock Select bits0 No Clock Source (Stopped)1 Running, No Prescaling2 Running, CLK/83 Running, CLK/324 Running, CLK/645 Running, CLK/1286 Running, CLK/2567 Running, CLK/1024
|
SFIORSpecial Function IO Register
- Address
0x50 I/O 0x30
- Reset
0x00
- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2–
- 1PSR2
- 0–
1 field
| Field | Bits | What it does |
|---|
| PSR2 | 1 | Prescaler Reset Timer/Counter2 |
TIFRTimer/Counter Interrupt Flag Register
- Address
0x58 I/O 0x38
- Reset
0x00
- Access
- read/write
- 7OCF2
- 6TOV2
- 5–
- 4–
- 3–
- 2–
- 1–
- 0–
2 fields
| Field | Bits | What it does |
|---|
| OCF2 | 7 | Output Compare Flag 2 |
| TOV2 | 6 | Timer/Counter2 Overflow Flag |
TIMSKTimer/Counter Interrupt Mask register
- Address
0x59 I/O 0x39
- Reset
0x00
- Access
- read/write
- 7OCIE2
- 6TOIE2
- 5–
- 4–
- 3–
- 2–
- 1–
- 0–
2 fields
| Field | Bits | What it does |
|---|
| OCIE2 | 7 | Timer/Counter2 Output Compare Match Interrupt Enable |
| TOIE2 | 6 | Timer/Counter2 Overflow Interrupt Enable |
TC1 Timer/Counter, 16-bit
ICR1Timer/Counter1 Input Capture Register Bytes
- Address
0x46 I/O 0x26
- Reset
0x0000
- Access
- read/write
- Size
- 16-bit
1 field
| Field | Bits | What it does |
|---|
| ICR1 | 15:0 | Timer/Counter1 Input Capture bits |
OCR1BTimer/Counter1 Output Compare Register Bytes
- Address
0x48 I/O 0x28
- Reset
0x0000
- Access
- read/write
- Size
- 16-bit
1 field
| Field | Bits | What it does |
|---|
| OCR1B | 15:0 | Timer/Counter1 Output Compare B bits |
OCR1ATimer/Counter1 Output Compare Register Bytes
- Address
0x4A I/O 0x2A
- Reset
0x0000
- Access
- read/write
- Size
- 16-bit
1 field
| Field | Bits | What it does |
|---|
| OCR1A | 15:0 | Timer/Counter1 Output Compare A bits |
TCNT1Timer/Counter1 Bytes
- Address
0x4C I/O 0x2C
- Reset
0x0000
- Access
- read/write
- Size
- 16-bit
1 field
| Field | Bits | What it does |
|---|
| TCNT1 | 15:0 | Timer/Counter1 bits |
TCCR1BTimer/Counter1 Control Register B
- Address
0x4E I/O 0x2E
- Reset
0x00
- Access
- read/write
- 7ICNC1
- 6ICES1
- 5–
- 4WGM11
- 3WGM10
- 2CS12
- 1CS11
- 0CS10
4 fields
| Field | Bits | What it does |
|---|
| ICNC1 | 7 | Input Capture 1 Noise Canceler |
| ICES1 | 6 | Input Capture 1 Edge Select |
| WGM1 | 4:3 | Waveform Generation Mode |
| CS1 | 2:0 | Prescaler source of Timer/Counter 10 No Clock Source (Stopped)1 Running, No Prescaling2 Running, CLK/83 Running, CLK/644 Running, CLK/2565 Running, CLK/10246 Running, ExtClk Tn Falling Edge7 Running, ExtClk Tn Rising Edge
|
TCCR1ATimer/Counter1 Control Register A
- Address
0x4F I/O 0x2F
- Reset
0x00
- Access
- read/write
- 7COM1A1
- 6COM1A0
- 5COM1B1
- 4COM1B0
- 3FOC1A
- 2FOC1B
- 1WGM11
- 0WGM10
5 fields
| Field | Bits | What it does |
|---|
| COM1A | 7:6 | Compare Output Mode 1A, bits |
| COM1B | 5:4 | Compare Output Mode 1B, bits |
| FOC1A | 3 | Force Output Compare 1A |
| FOC1B | 2 | Force Output Compare 1B |
| WGM1 | 1:0 | Waveform Generation Mode |
TIFRTimer/Counter Interrupt Flag register
- Address
0x58 I/O 0x38
- Reset
0x00
- Access
- read/write
- 7–
- 6–
- 5ICF1
- 4OCF1A
- 3OCF1B
- 2TOV1
- 1–
- 0–
4 fields
| Field | Bits | What it does |
|---|
| ICF1 | 5 | Input Capture Flag 1 |
| OCF1A | 4 | Output Compare Flag 1A |
| OCF1B | 3 | Output Compare Flag 1B |
| TOV1 | 2 | Timer/Counter1 Overflow Flag |
TIMSKTimer/Counter Interrupt Mask Register
- Address
0x59 I/O 0x39
- Reset
0x00
- Access
- read/write
- 7–
- 6–
- 5TICIE1
- 4OCIE1A
- 3OCIE1B
- 2TOIE1
- 1–
- 0–
4 fields
| Field | Bits | What it does |
|---|
| TICIE1 | 5 | Timer/Counter1 Input Capture Interrupt Enable |
| OCIE1A | 4 | Timer/Counter1 Output CompareA Match Interrupt Enable |
| OCIE1B | 3 | Timer/Counter1 Output CompareB Match Interrupt Enable |
| TOIE1 | 2 | Timer/Counter1 Overflow Interrupt Enable |
CPU CPU Registers
SFIORSpecial function I/O register
- Address
0x50 I/O 0x30
- Reset
0x00
- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2PUD
- 1PSR2
- 0PSR10
3 fields
| Field | Bits | What it does |
|---|
| PUD | 2 | Pull-up Disable |
| PSR2 | 1 | Prescaler reset |
| PSR10 | 0 | Prescaler reset |
OSCCALOscillator Calibration Value
- Address
0x51 I/O 0x31
- Reset
0x00
- Access
- read/write
- 7OSCCAL7
- 6OSCCAL6
- 5OSCCAL5
- 4OSCCAL4
- 3OSCCAL3
- 2OSCCAL2
- 1OSCCAL1
- 0OSCCAL0
1 field
| Field | Bits | What it does |
|---|
| OSCCAL | 7:0 | Oscillator Calibration |
MCUCSRMCU Control And Status Register
- Address
0x54 I/O 0x34
- Reset
0x00
- Access
- read/write
- 7JTD
- 6–
- 5–
- 4JTRF
- 3WDRF
- 2BORF
- 1EXTRF
- 0PORF
6 fields
| Field | Bits | What it does |
|---|
| JTD | 7 | JTAG Interface Disable |
| JTRF | 4 | JTAG Reset Flag |
| WDRF | 3 | Watchdog Reset Flag |
| BORF | 2 | Brown-out Reset Flag |
| EXTRF | 1 | External Reset Flag |
| PORF | 0 | Power-on reset flag |
MCUCRMCU Control Register
- Address
0x55 I/O 0x35
- Reset
0x00
- Access
- read/write
- 7SM3
- 6SE
- 5SM1
- 4SM0
- 3ISC11
- 2ISC10
- 1ISC01
- 0ISC00
4 fields
| Field | Bits | What it does |
|---|
| SM | 7,5,4 | Sleep Mode Select0 Idle1 ADC Noise Reduction (If Available)2 Power Down3 Power Save8 Reserved9 Reserved10 Standby11 Extended Standby
|
| SE | 6 | Sleep Enable |
| ISC1 | 3:2 | Interrupt Sense Control 1 Bits0 Low Level of INTX1 Any Logical Change in INTX2 Falling Edge of INTX3 Rising Edge of INTX
|
| ISC0 | 1:0 | Interrupt Sense Control 0 Bits0 Low Level of INTX1 Any Logical Change in INTX2 Falling Edge of INTX3 Rising Edge of INTX
|
SPStack Pointer
- Address
0x5D I/O 0x3D
- Reset
0x045F
- Access
- read/write
- Size
- 16-bit
SREGStatus Register
- Address
0x5F I/O 0x3F
- Reset
0x00
- Access
- read/write
- 7I
- 6T
- 5H
- 4S
- 3V
- 2N
- 1Z
- 0C
8 fields
| Field | Bits | What it does |
|---|
| I | 7 | Global Interrupt Enable |
| T | 6 | Bit Copy Storage |
| H | 5 | Half Carry Flag |
| S | 4 | Sign Bit |
| V | 3 | Two's Complement Overflow Flag |
| N | 2 | Negative Flag |
| Z | 1 | Zero Flag |
| C | 0 | Carry Flag |
TC0 Timer/Counter, 8-bit
SFIORSpecial Function IO Register
- Address
0x50 I/O 0x30
- Reset
0x00
- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2–
- 1–
- 0PSR10
1 field
| Field | Bits | What it does |
|---|
| PSR10 | 0 | Prescaler Reset Timer/Counter1 and Timer/Counter0 |
TCNT0Timer/Counter 0 Register
- Address
0x52 I/O 0x32
- Reset
0x00
- Access
- read/write
- 7TCNT07
- 6TCNT06
- 5TCNT05
- 4TCNT04
- 3TCNT03
- 2TCNT02
- 1TCNT01
- 0TCNT00
1 field
| Field | Bits | What it does |
|---|
| TCNT0 | 7:0 | Timer/Counter 0 bits |
TCCR0Timer/Counter Control Register
- Address
0x53 I/O 0x33
- Reset
0x00
- Access
- read/write
- 7FOC0
- 6WGM00
- 5COM01
- 4COM00
- 3WGM01
- 2CS02
- 1CS01
- 0CS00
5 fields
| Field | Bits | What it does |
|---|
| FOC0 | 7 | Force Output Compare |
| WGM00 | 6 | Waveform Generation Mode 00 Normal1 CTC2 PWM, Phase Correct3 Fast PWM
|
| COM0 | 5:4 | Compare Match Output Modes |
| WGM01 | 3 | Waveform Generation Mode 1 |
| CS0 | 2:0 | Clock Selects0 No Clock Source (Stopped)1 Running, No Prescaling2 Running, CLK/83 Running, CLK/644 Running, CLK/2565 Running, CLK/10246 Running, ExtClk Tn Falling Edge7 Running, ExtClk Tn Rising Edge
|
TIFRTimer/Counter Interrupt Flag register
- Address
0x58 I/O 0x38
- Reset
0x00
- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2–
- 1OCF0
- 0TOV0
2 fields
| Field | Bits | What it does |
|---|
| OCF0 | 1 | Output Compare Flag 0 |
| TOV0 | 0 | Timer/Counter0 Overflow Flag |
TIMSKTimer/Counter Interrupt Mask Register
- Address
0x59 I/O 0x39
- Reset
0x00
- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2–
- 1OCIE0
- 0TOIE0
2 fields
| Field | Bits | What it does |
|---|
| OCIE0 | 1 | Timer/Counter0 Output Compare Match Interrupt register |
| TOIE0 | 0 | Timer/Counter0 Overflow Interrupt Enable |
OCR0Output Compare 0 Register
- Address
0x5C I/O 0x3C
- Reset
0x00
- Access
- read/write
- 7OCR07
- 6OCR06
- 5OCR05
- 4OCR04
- 3OCR03
- 2OCR02
- 1OCR01
- 0OCR00
1 field
| Field | Bits | What it does |
|---|
| OCR0 | 7:0 | Output Compare bits |
JTAG JTAG Interface
OCDROn-Chip Debug Related Register in I/O Memory
- Address
0x51 I/O 0x31
- Reset
0x00
- Access
- read/write
- 7OCDR7
- 6OCDR6
- 5OCDR5
- 4OCDR4
- 3OCDR3
- 2OCDR2
- 1OCDR1
- 0OCDR0
1 field
| Field | Bits | What it does |
|---|
| OCDR | 7:0 | On-Chip Debug Register Bits |
MCUCSRMCU Control And Status Register
- Address
0x54 I/O 0x34
- Reset
0x00
- Access
- read/write
- 7JTD
- 6–
- 5–
- 4JTRF
- 3–
- 2–
- 1–
- 0–
2 fields
| Field | Bits | What it does |
|---|
| JTD | 7 | JTAG Interface Disable |
| JTRF | 4 | JTAG Reset Flag |
EXINT External Interrupts
MCUCSRMCU Control And Status Register
- Address
0x54 I/O 0x34
- Reset
0x00
- Access
- read/write
- 7–
- 6ISC2
- 5–
- 4–
- 3–
- 2–
- 1–
- 0–
1 field
| Field | Bits | What it does |
|---|
| ISC2 | 6 | Interrupt Sense Control 2 |
MCUCRGeneral Interrupt Control Register
- Address
0x55 I/O 0x35
- Reset
0x00
- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3ISC11
- 2ISC10
- 1ISC01
- 0ISC00
2 fields
| Field | Bits | What it does |
|---|
| ISC1 | 3:2 | Interrupt Sense Control 1 Bits0 Low Level of INTX1 Any Logical Change of INTX2 Falling Edge of INTX3 Rising Edge of INTX
|
| ISC0 | 1:0 | Interrupt Sense Control 0 Bits0 Low Level of INTX1 Any Logical Change of INTX2 Falling Edge of INTX3 Rising Edge of INTX
|
GIFRGeneral Interrupt Flag Register
- Address
0x5A I/O 0x3A
- Reset
0x00
- Access
- read/write
- 7INTF1
- 6INTF0
- 5INTF2
- 4–
- 3–
- 2–
- 1–
- 0–
2 fields
| Field | Bits | What it does |
|---|
| INTF | 7:6 | External Interrupt Flags |
| INTF2 | 5 | External Interrupt Flag 2 |
GICRGeneral Interrupt Control Register
- Address
0x5B I/O 0x3B
- Reset
0x00
- Access
- read/write
- 7INT1
- 6INT0
- 5INT2
- 4–
- 3–
- 2–
- 1IVSEL
- 0IVCE
5 fields
| Field | Bits | What it does |
|---|
| INT1 | 7 | External Interrupt Request 1 Enable |
| INT0 | 6 | External Interrupt Request 0 Enable |
| INT2 | 5 | External Interrupt Request 2 Enable |
| IVSEL | 1 | Interrupt Vector Select |
| IVCE | 0 | Interrupt Vector Change Enable |
BOOT_LOAD Bootloader
SPMCSRStore Program Memory Control Register
- Address
0x57 I/O 0x37
- Reset
0x00
- Access
- read/write
- 7SPMIE
- 6RWWSB
- 5–
- 4RWWSRE
- 3BLBSET
- 2PGWRT
- 1PGERS
- 0SPMEN
7 fields
| Field | Bits | What it does |
|---|
| SPMIE | 7 | SPM Interrupt Enable |
| RWWSB | 6 | Read While Write Section Busy |
| RWWSRE | 4 | Read While Write section read enable |
| BLBSET | 3 | Boot Lock Bit Set |
| PGWRT | 2 | Page Write |
| PGERS | 1 | Page Erase |
| SPMEN | 0 | Store Program Memory Enable |