ATmega324PB Registers – all 134 with their bits

PORTA I/O Port

PINAPort A Input Pins

Address: 0x20 I/O 0x00
Reset: 0x00
Access: read/write

7PINA7
6PINA6
5PINA5
4PINA4
3PINA3
2PINA2
1PINA1
0PINA0

DDRAPort A Data Direction Register

Address: 0x21 I/O 0x01
Reset: 0x00
Access: read/write

7DDA7
6DDA6
5DDA5
4DDA4
3DDA3
2DDA2
1DDA1
0DDA0

PORTAPort A Data Register

Address: 0x22 I/O 0x02
Reset: 0x00
Access: read/write

7PORTA7
6PORTA6
5PORTA5
4PORTA4
3PORTA3
2PORTA2
1PORTA1
0PORTA0

PORTB I/O Port

PINBPort B Input Pins

Address: 0x23 I/O 0x03
Reset: 0x00
Access: read/write

7PINB7
6PINB6
5PINB5
4PINB4
3PINB3
2PINB2
1PINB1
0PINB0

DDRBPort B Data Direction Register

Address: 0x24 I/O 0x04
Reset: 0x00
Access: read/write

7DDB7
6DDB6
5DDB5
4DDB4
3DDB3
2DDB2
1DDB1
0DDB0

PORTBPort B Data Register

Address: 0x25 I/O 0x05
Reset: 0x00
Access: read/write

7PORTB7
6PORTB6
5PORTB5
4PORTB4
3PORTB3
2PORTB2
1PORTB1
0PORTB0

PORTC I/O Port

PINCPort C Input Pins

Address: 0x26 I/O 0x06
Reset: 0x00
Access: read/write

7PINC7
6PINC6
5PINC5
4PINC4
3PINC3
2PINC2
1PINC1
0PINC0

DDRCPort C Data Direction Register

Address: 0x27 I/O 0x07
Reset: 0x00
Access: read/write

7DDC7
6DDC6
5DDC5
4DDC4
3DDC3
2DDC2
1DDC1
0DDC0

PORTCPort C Data Register

Address: 0x28 I/O 0x08
Reset: 0x00
Access: read/write

7PORTC7
6PORTC6
5PORTC5
4PORTC4
3PORTC3
2PORTC2
1PORTC1
0PORTC0

PORTD I/O Port

PINDPort D Input Pins

Address: 0x29 I/O 0x09
Reset: 0x00
Access: read/write

7PIND7
6PIND6
5PIND5
4PIND4
3PIND3
2PIND2
1PIND1
0PIND0

DDRDPort D Data Direction Register

Address: 0x2A I/O 0x0A
Reset: 0x00
Access: read/write

7DDD7
6DDD6
5DDD5
4DDD4
3DDD3
2DDD2
1DDD1
0DDD0

PORTDPort D Data Register

Address: 0x2B I/O 0x0B
Reset: 0x00
Access: read/write

7PORTD7
6PORTD6
5PORTD5
4PORTD4
3PORTD3
2PORTD2
1PORTD1
0PORTD0

PORTE I/O Port

PINEPort E Input Pins

Address: 0x2C I/O 0x0C
Reset: 0x00
Access: read/write

7–
6PINE6
5PINE5
4PINE4
3PINE3
2PINE2
1PINE1
0PINE0

DDREPort E Data Direction Register

Address: 0x2D I/O 0x0D
Reset: 0x00
Access: read/write

7–
6DDE6
5DDE5
4DDE4
3DDE3
2DDE2
1DDE1
0DDE0

PORTEPort E Data Register

Address: 0x2E I/O 0x0E
Reset: 0x00
Access: read/write

7–
6PORTE6
5PORTE5
4PORTE4
3PORTE3
2PORTE2
1PORTE1
0PORTE0

TC0 Timer/Counter, 8-bit

TIFR0Timer/Counter0 Interrupt Flag register

Address: 0x35 I/O 0x15
Reset: 0x00
Access: read/write

7–
6–
5–
4–
3–
2OCF0B
1OCF0A
0TOV0

3 fields

Field	Bits	What it does
OCF0B	2	Timer/Counter0 Output Compare Flag 0B
OCF0A	1	Timer/Counter0 Output Compare Flag 0A
TOV0	0	Timer/Counter0 Overflow Flag

GTCCRGeneral Timer/Counter Control Register

Address: 0x43 I/O 0x23
Reset: 0x00
Access: read/write

7TSM
6–
5–
4–
3–
2–
1PSRASY
0PSRSYNC

3 fields

Field	Bits	What it does
TSM	7	Timer/Counter Synchronization Mode
PSRASY	1	Prescaler Reset Timer/Counter2
PSRSYNC	0	Prescaler Reset Timer/Counter1 and Timer/Counter0

TCCR0ATimer/Counter0 Control Register A

Address: 0x44 I/O 0x24
Reset: 0x00
Access: read/write

7COM0A1
6COM0A0
5COM0B1
4COM0B0
3–
2–
1WGM01
0WGM00

3 fields

Field	Bits	What it does
COM0A	7:6	Compare Match Output A Mode
COM0B	5:4	Compare Match Output B Mode
WGM0	1:0	Waveform Generation Mode

TCCR0BTimer/Counter0 Control Register B

Address: 0x45 I/O 0x25
Reset: 0x00
Access: read/write

7FOC0A
6FOC0B
5–
4–
3WGM02
2CS02
1CS01
0CS00

4 fields

Field	Bits	What it does
FOC0A	7	Force Output Compare A
FOC0B	6	Force Output Compare B
WGM02	3	Waveform Generation Mode
CS0	2:0	Clock Select `0` No Clock Source (Stopped) `1` Running, No Prescaling `2` Running, CLK/8 `3` Running, CLK/64 `4` Running, CLK/256 `5` Running, CLK/1024 `6` Running, ExtClk Tn Falling Edge `7` Running, ExtClk Tn Rising Edge

TCNT0Timer/Counter0

Address: 0x46 I/O 0x26
Reset: 0x00
Access: read/write

7–
6–
5–
4–
3–
2–
1–
0–

OCR0ATimer/Counter0 Output Compare Register

Address: 0x47 I/O 0x27
Reset: 0x00
Access: read/write

7–
6–
5–
4–
3–
2–
1–
0–

OCR0BTimer/Counter0 Output Compare Register

Address: 0x48 I/O 0x28
Reset: 0x00
Access: read/write

7–
6–
5–
4–
3–
2–
1–
0–

TIMSK0Timer/Counter0 Interrupt Mask Register

Address: 0x6E
Reset: 0x00
Access: read/write

7–
6–
5–
4–
3–
2OCIE0B
1OCIE0A
0TOIE0

3 fields

Field	Bits	What it does
OCIE0B	2	Timer/Counter0 Output Compare Match B Interrupt Enable
OCIE0A	1	Timer/Counter0 Output Compare Match A Interrupt Enable
TOIE0	0	Timer/Counter0 Overflow Interrupt Enable

TC1 Timer/Counter, 16-bit

TIFR1Timer/Counter Interrupt Flag register

Address: 0x36 I/O 0x16
Reset: 0x00
Access: read/write

7–
6–
5ICF1
4–
3–
2OCF1B
1OCF1A
0TOV1

4 fields

Field	Bits	What it does
ICF1	5	Timer/Counter1 Input Capture Flag
OCF1B	2	Timer/Counter1 Output Compare B Match Flag
OCF1A	1	Timer/Counter1 Output Compare A Match Flag
TOV1	0	Timer/Counter1 Overflow Flag

TIMSK1Timer/Counter1 Interrupt Mask Register

Address: 0x6F
Reset: 0x00
Access: read/write

7–
6–
5ICIE1
4–
3–
2OCIE1B
1OCIE1A
0TOIE1

4 fields

Field	Bits	What it does
ICIE1	5	Timer/Counter1 Input Capture Interrupt Enable
OCIE1B	2	Timer/Counter1 Output Compare B Match Interrupt Enable
OCIE1A	1	Timer/Counter1 Output Compare A Match Interrupt Enable
TOIE1	0	Timer/Counter1 Overflow Interrupt Enable

TCCR1ATimer/Counter1 Control Register A

Address: 0x80
Reset: 0x00
Access: read/write

7COM1A1
6COM1A0
5COM1B1
4COM1B0
3–
2–
1WGM11
0WGM10

3 fields

Field	Bits	What it does
COM1A	7:6	Compare Output Mode 1A, bits
COM1B	5:4	Compare Output Mode 1B, bits
WGM1	1:0	Pulse Width Modulator Select Bits

TCCR1BTimer/Counter1 Control Register B

Address: 0x81
Reset: 0x00
Access: read/write

7ICNC1
6ICES1
5–
4WGM11
3WGM10
2CS12
1CS11
0CS10

4 fields

Field	Bits	What it does
ICNC1	7	Input Capture 1 Noise Canceler
ICES1	6	Input Capture 1 Edge Select
WGM1	4:3	Waveform Generation Mode Bits
CS1	2:0	Clock Select1 bits `0` No Clock Source (Stopped) `1` Running, No Prescaling `2` Running, CLK/8 `3` Running, CLK/64 `4` Running, CLK/256 `5` Running, CLK/1024 `6` Running, ExtClk Tn Falling Edge `7` Running, ExtClk Tn Rising Edge

TCCR1CTimer/Counter1 Control Register C

Address: 0x82
Reset: 0x00
Access: read/write

7FOC1A
6FOC1B
5–
4–
3–
2–
1–
0–

2 fields

Field	Bits	What it does
FOC1A	7	Force Output Compare for Channel A
FOC1B	6	Force Output Compare for Channel B

TCNT1Timer/Counter1 Bytes

Address: 0x84
Reset: 0x0000
Access: read/write
Size: 16-bit

ICR1Timer/Counter1 Input Capture Register Bytes

Address: 0x86
Reset: 0x0000
Access: read/write
Size: 16-bit

OCR1ATimer/Counter1 Output Compare Register A Bytes

Address: 0x88
Reset: 0x0000
Access: read/write
Size: 16-bit

OCR1BTimer/Counter1 Output Compare Register B Bytes

Address: 0x8A
Reset: 0x0000
Access: read/write
Size: 16-bit

TC2 Timer/Counter, 8-bit Async

TIFR2Timer/Counter Interrupt Flag Register

Address: 0x37 I/O 0x17
Reset: 0x00
Access: read/write

7–
6–
5–
4–
3–
2OCF2B
1OCF2A
0TOV2

3 fields

Field	Bits	What it does
OCF2B	2	Output Compare Flag 2B
OCF2A	1	Output Compare Flag 2A
TOV2	0	Timer/Counter2 Overflow Flag

TIMSK2Timer/Counter Interrupt Mask register

Address: 0x70
Reset: 0x00
Access: read/write

7–
6–
5–
4–
3–
2OCIE2B
1OCIE2A
0TOIE2

3 fields

Field	Bits	What it does
OCIE2B	2	Timer/Counter2 Output Compare Match B Interrupt Enable
OCIE2A	1	Timer/Counter2 Output Compare Match A Interrupt Enable
TOIE2	0	Timer/Counter2 Overflow Interrupt Enable

TCCR2ATimer/Counter2 Control Register A

Address: 0xB0
Reset: 0x00
Access: read/write

7COM2A1
6COM2A0
5COM2B1
4COM2B0
3–
2–
1WGM21
0WGM20

3 fields

Field	Bits	What it does
COM2A	7:6	Compare Output Mode 2A bits
COM2B	5:4	Compare Output Mode 2B bits
WGM2	1:0	Waveform Generation Mode

TCCR2BTimer/Counter2 Control Register B

Address: 0xB1
Reset: 0x00
Access: read/write

7FOC2A
6FOC2B
5–
4–
3WGM22
2CS22
1CS21
0CS20

4 fields

Field	Bits	What it does
FOC2A	7	Force Output Compare A
FOC2B	6	Force Output Compare B
WGM22	3	Waveform Generation Mode
CS2	2:0	Clock Select bits `0` No Clock Source (Stopped) `1` Running, No Prescaling `2` Running, CLK/8 `3` Running, CLK/32 `4` Running, CLK/64 `5` Running, CLK/128 `6` Running, CLK/256 `7` Running, CLK/1024

TCNT2Timer/Counter2

Address: 0xB2
Reset: 0x00
Access: read/write

7–
6–
5–
4–
3–
2–
1–
0–

OCR2ATimer/Counter2 Output Compare Register A

Address: 0xB3
Reset: 0x00
Access: read/write

7–
6–
5–
4–
3–
2–
1–
0–

OCR2BTimer/Counter2 Output Compare Register B

Address: 0xB4
Reset: 0x00
Access: read/write

7–
6–
5–
4–
3–
2–
1–
0–

ASSRAsynchronous Status Register

Address: 0xB6
Reset: 0x00
Access: read/write

7–
6EXCLK
5AS2
4TCN2UB
3OCR2AUB
2OCR2BUB
1TCR2AUB
0TCR2BUB

7 fields

Field	Bits	What it does
EXCLK	6	Enable External Clock Input
AS2	5	Asynchronous Timer/Counter2
TCN2UB	4	Timer/Counter2 Update Busy
OCR2AUB	3	Output Compare Register2 Update Busy
OCR2BUB	2	Output Compare Register 2 Update Busy
TCR2AUB	1	Timer/Counter Control Register2 Update Busy
TCR2BUB	0	Timer/Counter Control Register2 Update Busy

TC3 Timer/Counter, 16-bit

TIFR3Timer/Counter Interrupt Flag register

Address: 0x38 I/O 0x18
Reset: 0x00
Access: read/write

7–
6–
5ICF3
4–
3–
2OCF3B
1OCF3A
0TOV3

4 fields

Field	Bits	What it does
ICF3	5	Timer/Counter3 Input Capture Flag
OCF3B	2	Timer/Counter3 Output Compare B Match Flag
OCF3A	1	Timer/Counter3 Output Compare A Match Flag
TOV3	0	Timer/Counter3 Overflow Flag

TIMSK3Timer/Counter3 Interrupt Mask Register

Address: 0x71
Reset: 0x00
Access: read/write

7–
6–
5ICIE3
4–
3–
2OCIE3B
1OCIE3A
0TOIE3

4 fields

Field	Bits	What it does
ICIE3	5	Timer/Counter3 Input Capture Interrupt Enable
OCIE3B	2	Timer/Counter3 Output Compare B Match Interrupt Enable
OCIE3A	1	Timer/Counter3 Output Compare A Match Interrupt Enable
TOIE3	0	Timer/Counter3 Overflow Interrupt Enable

TCCR3ATimer/Counter3 Control Register A

Address: 0x90
Reset: 0x00
Access: read/write

7COM3A1
6COM3A0
5COM3B1
4COM3B0
3–
2–
1WGM31
0WGM30

3 fields

Field	Bits	What it does
COM3A	7:6	Compare Output Mode 3A, bits
COM3B	5:4	Compare Output Mode 3B, bits
WGM3	1:0	Pulse Width Modulator Select Bits

TCCR3BTimer/Counter3 Control Register B

Address: 0x91
Reset: 0x00
Access: read/write

7ICNC3
6ICES3
5–
4WGM31
3WGM30
2CS32
1CS31
0CS30

4 fields

Field	Bits	What it does
ICNC3	7	Input Capture 3 Noise Canceler
ICES3	6	Input Capture 3 Edge Select
WGM3	4:3	Waveform Generation Mode Bits
CS3	2:0	Clock Select3 bits `0` No Clock Source (Stopped) `1` Running, No Prescaling `2` Running, CLK/8 `3` Running, CLK/64 `4` Running, CLK/256 `5` Running, CLK/1024 `6` Running, ExtClk Tn Falling Edge `7` Running, ExtClk Tn Rising Edge

TCCR3CTimer/Counter3 Control Register C

Address: 0x92
Reset: 0x00
Access: read/write

7FOC3A
6FOC3B
5–
4–
3–
2–
1–
0–

2 fields

Field	Bits	What it does
FOC3A	7	Force Output Compare for Channel A
FOC3B	6	Force Output Compare for Channel B

TCNT3Timer/Counter3 Bytes

Address: 0x94
Reset: 0x0000
Access: read/write
Size: 16-bit

ICR3Timer/Counter3 Input Capture Register Bytes

Address: 0x96
Reset: 0x0000
Access: read/write
Size: 16-bit

OCR3ATimer/Counter3 Output Compare Register A Bytes

Address: 0x98
Reset: 0x0000
Access: read/write
Size: 16-bit

OCR3BTimer/Counter3 Output Compare Register B Bytes

Address: 0x9A
Reset: 0x0000
Access: read/write
Size: 16-bit

TC4 Timer/Counter, 16-bit

TIFR4Timer/Counter Interrupt Flag register

Address: 0x39 I/O 0x19
Reset: 0x00
Access: read/write

7–
6–
5ICF4
4–
3–
2OCF4B
1OCF4A
0TOV4

4 fields

Field	Bits	What it does
ICF4	5	Timer/Counter4 Input Capture Flag
OCF4B	2	Timer/Counter4 Output Compare B Match Flag
OCF4A	1	Timer/Counter4 Output Compare A Match Flag
TOV4	0	Timer/Counter4 Overflow Flag

TIMSK4Timer/Counter4 Interrupt Mask Register

Address: 0x72
Reset: 0x00
Access: read/write

7–
6–
5ICIE4
4–
3–
2OCIE4B
1OCIE4A
0TOIE4

4 fields

Field	Bits	What it does
ICIE4	5	Timer/Counter4 Input Capture Interrupt Enable
OCIE4B	2	Timer/Counter4 Output Compare B Match Interrupt Enable
OCIE4A	1	Timer/Counter4 Output Compare A Match Interrupt Enable
TOIE4	0	Timer/Counter4 Overflow Interrupt Enable

TCCR4ATimer/Counter4 Control Register A

Address: 0xA0
Reset: 0x00
Access: read/write

7COM4A1
6COM4A0
5COM4B1
4COM4B0
3–
2–
1WGM41
0WGM40

3 fields

Field	Bits	What it does
COM4A	7:6	Compare Output Mode 4A, bits
COM4B	5:4	Compare Output Mode 4B, bits
WGM4	1:0	Pulse Width Modulator Select Bits

TCCR4BTimer/Counter4 Control Register B

Address: 0xA1
Reset: 0x00
Access: read/write

7ICNC4
6ICES4
5–
4WGM41
3WGM40
2CS42
1CS41
0CS40

4 fields

Field	Bits	What it does
ICNC4	7	Input Capture 4 Noise Canceler
ICES4	6	Input Capture 4 Edge Select
WGM4	4:3	Waveform Generation Mode Bits
CS4	2:0	Clock Select4 bits `0` No Clock Source (Stopped) `1` Running, No Prescaling `2` Running, CLK/8 `3` Running, CLK/64 `4` Running, CLK/256 `5` Running, CLK/1024 `6` Running, ExtClk Tn Falling Edge `7` Running, ExtClk Tn Rising Edge

TCCR4CTimer/Counter4 Control Register C

Address: 0xA2
Reset: 0x00
Access: read/write

7FOC4A
6FOC4B
5–
4–
3–
2–
1–
0–

2 fields

Field	Bits	What it does
FOC4A	7	Force Output Compare for Channel A
FOC4B	6	Force Output Compare for Channel B

TCNT4Timer/Counter4 Bytes

Address: 0xA4
Reset: 0x0000
Access: read/write
Size: 16-bit

ICR4Timer/Counter4 Input Capture Register Bytes

Address: 0xA6
Reset: 0x0000
Access: read/write
Size: 16-bit

OCR4ATimer/Counter4 Output Compare Register A Bytes

Address: 0xA8
Reset: 0x0000
Access: read/write
Size: 16-bit

OCR4BTimer/Counter4 Output Compare Register B Bytes

Address: 0xAA
Reset: 0x0000
Access: read/write
Size: 16-bit

EXINT External Interrupts

PCIFRPin Change Interrupt Flag Register

Address: 0x3B I/O 0x1B
Reset: 0x00
Access: read/write

7–
6–
5–
4PCIF4
3PCIF3
2PCIF2
1PCIF1
0PCIF0

1 field

Field	Bits	What it does
PCIF	4:0	Pin Change Interrupt Flags

EIFRExternal Interrupt Flag Register

Address: 0x3C I/O 0x1C
Reset: 0x00
Access: read/write

7–
6–
5–
4–
3–
2INTF2
1INTF1
0INTF0

1 field

Field	Bits	What it does
INTF	2:0	External Interrupt Flags

EIMSKExternal Interrupt Mask Register

Address: 0x3D I/O 0x1D
Reset: 0x00
Access: read/write

7–
6–
5–
4–
3–
2INT2
1INT1
0INT0

1 field

Field	Bits	What it does
INT	2:0	External Interrupt Request Enable

PCICRPin Change Interrupt Control Register

Address: 0x68
Reset: 0x00
Access: read/write

7–
6–
5–
4PCIE4
3PCIE3
2PCIE2
1PCIE1
0PCIE0

1 field

Field	Bits	What it does
PCIE	4:0	Pin Change Interrupt Enables

EICRAExternal Interrupt Control Register A

Address: 0x69
Reset: 0x00
Access: read/write

7–
6–
5ISC21
4ISC20
3ISC11
2ISC10
1ISC01
0ISC00

3 fields

Field	Bits	What it does
ISC2	5:4	External Interrupt Sense Control Bit `0` Low Level of INTX `1` Any Logical Change of INTX `2` Falling Edge of INTX `3` Rising Edge of INTX
ISC1	3:2	External Interrupt Sense Control Bit `0` Low Level of INTX `1` Any Logical Change of INTX `2` Falling Edge of INTX `3` Rising Edge of INTX
ISC0	1:0	External Interrupt Sense Control Bit `0` Low Level of INTX `1` Any Logical Change of INTX `2` Falling Edge of INTX `3` Rising Edge of INTX

PCMSK0Pin Change Mask Register 0

Address: 0x6B
Reset: 0x00
Access: read/write

7PCINT7
6PCINT6
5PCINT5
4PCINT4
3PCINT3
2PCINT2
1PCINT1
0PCINT0

1 field

Field	Bits	What it does
PCINT	7:0	Pin Change Enable Masks

PCMSK1Pin Change Mask Register 1

Address: 0x6C
Reset: 0x00
Access: read/write

7PCINT7
6PCINT6
5PCINT5
4PCINT4
3PCINT3
2PCINT2
1PCINT1
0PCINT0

1 field

Field	Bits	What it does
PCINT	7:0	Pin Change Enable Masks

PCMSK2Pin Change Mask Register 2

Address: 0x6D
Reset: 0x00
Access: read/write

7PCINT7
6PCINT6
5PCINT5
4PCINT4
3PCINT3
2PCINT2
1PCINT1
0PCINT0

1 field

Field	Bits	What it does
PCINT	7:0	Pin Change Enable Masks

PCMSK3Pin Change Mask Register 3

Address: 0x73
Reset: 0x00
Access: read/write

7PCINT7
6PCINT6
5PCINT5
4PCINT4
3PCINT3
2PCINT2
1PCINT1
0PCINT0

1 field

Field	Bits	What it does
PCINT	7:0	Pin Change Enable Masks

PCMSK4Pin Change Mask Register 4

Address: 0x75
Reset: 0x00
Access: read/write

7–
6PCINT6
5PCINT5
4PCINT4
3PCINT3
2PCINT2
1PCINT1
0PCINT0

1 field

Field	Bits	What it does
PCINT	6:0	Pin Change Enable Masks

CPU CPU Registers

GPIOR0General Purpose IO Register 0

Address: 0x3E I/O 0x1E
Reset: 0x00
Access: read/write

7–
6–
5–
4–
3–
2–
1–
0–

GPIOR1General Purpose IO Register 1

Address: 0x4A I/O 0x2A
Reset: 0x00
Access: read/write

7–
6–
5–
4–
3–
2–
1–
0–

GPIOR2General Purpose IO Register 2

Address: 0x4B I/O 0x2B
Reset: 0x00
Access: read/write

7–
6–
5–
4–
3–
2–
1–
0–

SMCRSleep Mode Control Register

Address: 0x53 I/O 0x33
Reset: 0x00
Access: read/write

7–
6–
5–
4–
3SM2
2SM1
1SM0
0SE

2 fields

Field	Bits	What it does
SM	3:1	Sleep Mode Select bits `0` Idle `1` ADC Noise Reduction (If Available) `2` Power Down `3` Power Save `4` Reserved `5` Reserved `6` Standby `7` Extended Standby
SE	0	Sleep Enable

MCUSRMCU Status Register

Address: 0x54 I/O 0x34
Reset: 0x00
Access: read/write

7–
6–
5–
4JTRF
3WDRF
2BORF
1EXTRF
0PORF

5 fields

Field	Bits	What it does
JTRF	4	JTAG Reset Flag
WDRF	3	Watchdog Reset Flag
BORF	2	Brown-out Reset Flag
EXTRF	1	External Reset Flag
PORF	0	Power-on reset flag

MCUCRMCU Control Register

Address: 0x55 I/O 0x35
Reset: 0x00
Access: read/write

7JTD
6BODS
5BODSE
4PUD
3–
2–
1IVSEL
0IVCE

6 fields

Field	Bits	What it does
JTD	7	JTAG Interface Disable
BODS	6	BOD Power Down in Sleep
BODSE	5	BOD Power Down in Sleep Enable
PUD	4	Pull-up disable
IVSEL	1	Interrupt Vector Select
IVCE	0	Interrupt Vector Change Enable

SPMCSRStore Program Memory Control Register

Address: 0x57 I/O 0x37
Reset: 0x00
Access: read/write

7SPMIE
6RWWSB
5SIGRD
4RWWSRE
3BLBSET
2PGWRT
1PGERS
0SPMEN

8 fields

Field	Bits	What it does
SPMIE	7	SPM Interrupt Enable
RWWSB	6	Read While Write Section Busy
SIGRD	5	Signature Row Read
RWWSRE	4	Read While Write section read enable
BLBSET	3	Boot Lock Bit Set
PGWRT	2	Page Write
PGERS	1	Page Erase
SPMEN	0	Store Program Memory Enable

SPStack Pointer

Address: 0x5D I/O 0x3D
Reset: 0x08FF
Access: read/write
Size: 16-bit

SREGStatus Register

Address: 0x5F I/O 0x3F
Reset: 0x00
Access: read/write

7I
6T
5H
4S
3V
2N
1Z
0C

8 fields

Field	Bits	What it does
I	7	Global Interrupt Enable
T	6	Bit Copy Storage
H	5	Half Carry Flag
S	4	Sign Bit
V	3	Two's Complement Overflow Flag
N	2	Negative Flag
Z	1	Zero Flag
C	0	Carry Flag

CLKPR

Address: 0x61
Reset: 0x00
Access: read/write

7CLKPCE
6–
5–
4–
3CLKPS3
2CLKPS2
1CLKPS1
0CLKPS0

2 fields

Field	Bits	What it does
CLKPCE	7
CLKPS	3:0	`0` 1 `1` 2 `2` 4 `3` 8 `4` 16 `5` 32 `6` 64 `7` 128 `8` 256

PRR2Power Reduction Register2

Address: 0x63
Reset: 0x00
Access: read/write

7–
6–
5–
4–
3PRPTC
2PRUSART2
1PRSPI1
0PRTWI1

4 fields

Field	Bits	What it does
PRPTC	3	Power Reduction Peripheral Touch Controller
PRUSART2	2	Power Reduction USART2
PRSPI1	1	Power Reduction Serial Peripheral Interface 1
PRTWI1	0	Power Reduction TWI1

PRR0Power Reduction Register0

Address: 0x64
Reset: 0x00
Access: read/write

7PRTWI0
6PRTIM2
5PRTIM0
4PRUSART1
3PRTIM1
2PRSPI0
1PRUSART0
0PRADC

8 fields

Field	Bits	What it does
PRTWI0	7	Power Reduction TWI0
PRTIM2	6	Power Reduction Timer/Counter2
PRTIM0	5	Power Reduction Timer/Counter0
PRUSART1	4	Power Reduction USART1
PRTIM1	3	Power Reduction Timer/Counter1
PRSPI0	2	Power Reduction Serial Peripheral Interface 0
PRUSART0	1	Power Reduction USART0
PRADC	0	Power Reduction ADC

PRR1Power Reduction Register1

Address: 0x65
Reset: 0x00
Access: read/write

7–
6–
5–
4–
3–
2–
1PRTIM4
0PRTIM3

2 fields

Field	Bits	What it does
PRTIM4	1	Power Reduction Timer/Counter4
PRTIM3	0	Power Reduction Timer/Counter3

OSCCALOscillator Calibration Value

Address: 0x66
Reset: 0x00
Access: read/write

7OSCCAL7
6OSCCAL6
5OSCCAL5
4OSCCAL4
3OSCCAL3
2OSCCAL2
1OSCCAL1
0OSCCAL0

1 field

Field	Bits	What it does
OSCCAL	7:0	Oscillator Calibration

EEPROM EEPROM

EECREEPROM Control Register

Address: 0x3F I/O 0x1F
Reset: 0x00
Access: read/write

7–
6–
5EEPM1
4EEPM0
3EERIE
2EEMPE
1EEPE
0EERE

5 fields

Field	Bits	What it does
EEPM	5:4	EEPROM Programming Mode Bits `0` Erase and Write in one operation `1` Erase Only `2` Write Only
EERIE	3	EEPROM Ready Interrupt Enable
EEMPE	2	EEPROM Master Programming Enable
EEPE	1	EEPROM Programming Enable
EERE	0	EEPROM Read Enable

EEDREEPROM Data Register

Address: 0x40 I/O 0x20
Reset: 0x00
Access: read/write

7–
6–
5–
4–
3–
2–
1–
0–

EEAREEPROM Address Register Low Bytes

Address: 0x41 I/O 0x21
Reset: 0x0000
Access: read/write
Size: 16-bit

SPI0 Serial Peripheral Interface

SPCR0SPI Control Register

Address: 0x4C I/O 0x2C
Reset: 0x00
Access: read/write

7SPIE
6SPE
5DORD
4MSTR
3CPOL
2CPHA
1SPR1
0SPR0

7 fields

Field	Bits	What it does
SPIE	7	SPI Interrupt Enable
SPE	6	SPI Enable
DORD	5	Data Order
MSTR	4	Master/Slave Select
CPOL	3	Clock polarity
CPHA	2	Clock Phase
SPR	1:0	SPI Clock Rate Select `0` fosc/4 `1` fosc/16 `2` fosc/64 `3` fosc/128 `4` fosc/2 `5` fosc/8 `6` fosc/32 `7` fosc/64

SPSR0SPI Status Register

Address: 0x4D I/O 0x2D
Reset: 0x00
Access: read/write

7SPIF
6WCOL
5–
4–
3–
2–
1–
0SPI2X

3 fields

Field	Bits	What it does
SPIF	7	SPI Interrupt Flag
WCOL	6	Write Collision Flag
SPI2X	0	Double SPI Speed Bit

SPDR0SPI Data Register

Address: 0x4E I/O 0x2E
Reset: 0x00
Access: read/write

7–
6–
5–
4–
3–
2–
1–
0–

AC Analog Comparator

ACSRBAnalog Comparator Control And Status Register B

Address: 0x4F I/O 0x2F
Reset: 0x00
Access: read/write

7–
6–
5–
4–
3–
2–
1–
0ACOE

1 field

Field	Bits	What it does
ACOE	0	Analog Comparator Output enable

ACSRAnalog Comparator Control And Status Register

Address: 0x50 I/O 0x30
Reset: 0x00
Access: read/write

7ACD
6ACBG
5ACO
4ACI
3ACIE
2ACIC
1ACIS1
0ACIS0

7 fields

Field	Bits	What it does
ACD	7	Analog Comparator Disable
ACBG	6	Analog Comparator Bandgap Select
ACO	5	Analog Compare Output
ACI	4	Analog Comparator Interrupt Flag
ACIE	3	Analog Comparator Interrupt Enable
ACIC	2	Analog Comparator Input Capture Enable
ACIS	1:0	Analog Comparator Interrupt Mode Select bits `0` Interrupt on Toggle `1` Reserved `2` Interrupt on Falling Edge `3` Interrupt on Rising Edge

DIDR1Digital Input Disable Register 1

Address: 0x7F
Reset: 0x00
Access: read/write

7–
6–
5–
4–
3–
2–
1AIN1D
0AIN0D

2 fields

Field	Bits	What it does
AIN1D	1	AIN1 Digital Input Disable
AIN0D	0	AIN0 Digital Input Disable

JTAG JTAG Interface

OCDROn-Chip Debug Related Register in I/O Memory

Address: 0x51 I/O 0x31
Reset: 0x00
Access: read/write

7–
6–
5–
4–
3–
2–
1–
0–

MCUSRMCU Status Register

Address: 0x54 I/O 0x34
Reset: 0x00
Access: read/write

7–
6–
5–
4JTRF
3–
2–
1–
0–

1 field

Field	Bits	What it does
JTRF	4	JTAG Reset Flag

MCUCRMCU Control Register

Address: 0x55 I/O 0x35
Reset: 0x00
Access: read/write

7JTD
6–
5–
4–
3–
2–
1–
0–

1 field

Field	Bits	What it does
JTD	7	JTAG Interface Disable

WDT Watchdog Timer

WDTCSRWatchdog Timer Control Register

Address: 0x60
Reset: 0x00
Access: read/write

7WDIF
6WDIE
5WDP5
4WDCE
3WDE
2WDP2
1WDP1
0WDP0

5 fields

Field	Bits	What it does
WDIF	7	Watchdog Timeout Interrupt Flag
WDIE	6	Watchdog Timeout Interrupt Enable
WDP	5,2,1,0	Watchdog Timer Prescaler Bits `0` Oscillator Cycles 2K `1` Oscillator Cycles 4K `2` Oscillator Cycles 8K `3` Oscillator Cycles 16K `4` Oscillator Cycles 32K `5` Oscillator Cycles 64K `6` Oscillator Cycles 128K `7` Oscillator Cycles 256K `8` Oscillator Cycles 512K `9` Oscillator Cycles 1024K
WDCE	4	Watchdog Change Enable
WDE	3	Watch Dog Enable

CFD Clock Failure Detection

XFDCSRXOSC Failure Detection Control and Status Register

Address: 0x62
Reset: 0x00
Access: read/write

7–
6–
5–
4–
3–
2–
1XFDIF
0XFDIE

2 fields

Field	Bits	What it does
XFDIF	1	Failure Detection Interrupt Flag
XFDIE	0	Failure Detection Interrupt Enable

ADC Analog-to-Digital Converter

ADCADC Data Register Bytes

Address: 0x78
Reset: 0x0000
Access: read/write
Size: 16-bit

ADCSRAADC Control and Status register A

Address: 0x7A
Reset: 0x00
Access: read/write

7ADEN
6ADSC
5ADATE
4ADIF
3ADIE
2ADPS2
1ADPS1
0ADPS0

6 fields

Field	Bits	What it does
ADEN	7	ADC Enable
ADSC	6	ADC Start Conversion
ADATE	5	ADC Auto Trigger Enable
ADIF	4	ADC Interrupt Flag
ADIE	3	ADC Interrupt Enable
ADPS	2:0	ADC Prescaler Select Bits `0` 2 `1` 2 `2` 4 `3` 8 `4` 16 `5` 32 `6` 64 `7` 128

ADCSRBADC Control and Status register B

Address: 0x7B
Reset: 0x00
Access: read/write

7GPIOEN
6ACME
5–
4–
3–
2ADTS2
1ADTS1
0ADTS0

3 fields

Field	Bits	What it does
GPIOEN	7	Enable GPIO function of PE4
ACME	6	Analog Comparator Multiplexer Enable
ADTS	2:0	ADC Auto Trigger Source bits `0` Free Running mode `1` Analog Comparator `2` External Interrupt Request 0 `3` Timer/Counter0 Compare Match A `4` Timer/Counter0 Overflow `5` Timer/Counter1 Compare Match B `6` Timer/Counter1 Overflow `7` Timer/Counter1 Capture Event

ADMUXADC multiplexer Selection Register

Address: 0x7C
Reset: 0x00
Access: read/write

7REFS1
6REFS0
5ADLAR
4MUX4
3MUX3
2MUX2
1MUX1
0MUX0

3 fields

Field	Bits	What it does
REFS	7:6	Reference Selection Bits `0` AREF, Internal Vref turned off `1` AVCC with external capacitor at AREF pin `2` Internal 1.1V Voltage Reference with external capacitor at AREF pin `3` Internal 2.56V Voltage Reference with external capacitor at AREF pin
ADLAR	5	Left Adjust Result
MUX	4:0	Analog Channel and Gain Selection Bits `0` ADC Single Ended Input pin 0 `1` ADC Single Ended Input pin 1 `2` ADC Single Ended Input pin 2 `3` ADC Single Ended Input pin 3 `4` ADC Single Ended Input pin 4 `5` ADC Single Ended Input pin 5 `6` ADC Single Ended Input pin 6 `7` ADC Single Ended Input pin 7 `8` ADC Differential Inputs Positive pin 0 Negative pin 0 10x Gain `9` ADC Differential Inputs Positive pin 1 Negative pin 0 10x Gain `10` ADC Differential Inputs Positive pin 0 Negative pin 0 200x Gain `11` ADC Differential Inputs Positive pin 1 Negative pin 0 200x Gain `12` ADC Differential Inputs Positive pin 2 Negative pin 2 10x Gain `13` ADC Differential Inputs Positive pin 3 Negative pin 2 10x Gain `14` ADC Differential Inputs Positive pin 2 Negative pin 2 200x Gain `15` ADC Differential Inputs Positive pin 3 Negative pin 2 200x Gain `16` ADC Differential Inputs Positive pin 0 Negative pin 1 1x Gain `17` ADC Differential Inputs Positive pin 1 Negative pin 1 1x Gain `18` ADC Differential Inputs Positive pin 2 Negative pin 1 1x Gain `19` ADC Differential Inputs Positive pin 3 Negative pin 1 1x Gain `20` ADC Differential Inputs Positive pin 4 Negative pin 1 1x Gain `21` ADC Differential Inputs Positive pin 5 Negative pin 1 1x Gain `22` ADC Differential Inputs Positive pin 6 Negative pin 1 1x Gain `23` ADC Differential Inputs Positive pin 7 Negative pin 1 1x Gain `24` ADC Differential Inputs Positive pin 0 Negative pin 2 1x Gain `25` ADC Differential Inputs Positive pin 1 Negative pin 2 1x Gain `26` ADC Differential Inputs Positive pin 2 Negative pin 2 1x Gain `27` ADC Differential Inputs Positive pin 3 Negative pin 2 1x Gain `28` ADC Differential Inputs Positive pin 4 Negative pin 2 1x Gain `29` ADC Differential Inputs Positive pin 5 Negative pin 2 1x Gain `30` Internal Reference (VBG) `31` 0V (GND)

DIDR0Digital Input Disable Register

Address: 0x7E
Reset: 0x00
Access: read/write

7ADC7D
6ADC6D
5ADC5D
4ADC4D
3ADC3D
2ADC2D
1ADC1D
0ADC0D

8 fields

Field	Bits	What it does
ADC7D	7
ADC6D	6
ADC5D	5
ADC4D	4
ADC3D	3
ADC2D	2
ADC1D	1
ADC0D	0

SPI1 Serial Peripheral Interface

SPCR1SPI Control Register

Address: 0xAC
Reset: 0x00
Access: read/write

7SPIE
6SPE
5DORD
4MSTR
3CPOL
2CPHA
1SPR1
0SPR0

7 fields

Field	Bits	What it does
SPIE	7	SPI Interrupt Enable
SPE	6	SPI Enable
DORD	5	Data Order
MSTR	4	Master/Slave Select
CPOL	3	Clock polarity
CPHA	2	Clock Phase
SPR	1:0	SPI Clock Rate Select `0` fosc/4 `1` fosc/16 `2` fosc/64 `3` fosc/128 `4` fosc/2 `5` fosc/8 `6` fosc/32 `7` fosc/64

SPSR1SPI Status Register

Address: 0xAD
Reset: 0x00
Access: read/write

7SPIF
6WCOL
5–
4–
3–
2–
1–
0SPI2X

3 fields

Field	Bits	What it does
SPIF	7	SPI Interrupt Flag
WCOL	6	Write Collision Flag
SPI2X	0	Double SPI Speed Bit

SPDR1SPI Data Register

Address: 0xAE
Reset: 0x00
Access: read/write

7–
6–
5–
4–
3–
2–
1–
0–

TWI0 Two Wire Serial Interface

TWBR0TWI Bit Rate register

Address: 0xB8
Reset: 0x00
Access: read/write

7–
6–
5–
4–
3–
2–
1–
0–

TWSR0TWI Status Register

Address: 0xB9
Reset: 0x00
Access: read/write

7TWS04
6TWS03
5TWS02
4TWS01
3TWS00
2–
1TWPS1
0TWPS0

2 fields

Field	Bits	What it does
TWS0	7:3	TWI Status
TWPS	1:0	TWI Prescaler `0` 1 `1` 4 `2` 16 `3` 64

TWAR0TWI (Slave) Address register

Address: 0xBA
Reset: 0x00
Access: read/write

7TWA6
6TWA5
5TWA4
4TWA3
3TWA2
2TWA1
1TWA0
0TWGCE

2 fields

Field	Bits	What it does
TWA	7:1	TWI (Slave) Address register Bits
TWGCE	0	TWI General Call Recognition Enable Bit

TWDR0TWI Data register

Address: 0xBB
Reset: 0x00
Access: read/write

7–
6–
5–
4–
3–
2–
1–
0–

TWCR0TWI Control Register

Address: 0xBC
Reset: 0x00
Access: read/write

7TWINT
6TWEA
5TWSTA
4TWSTO
3TWWC
2TWEN
1–
0TWIE

7 fields

Field	Bits	What it does
TWINT	7	TWI Interrupt Flag
TWEA	6	TWI Enable Acknowledge Bit
TWSTA	5	TWI Start Condition Bit
TWSTO	4	TWI Stop Condition Bit
TWWC	3	TWI Write Collision Flag
TWEN	2	TWI Enable Bit
TWIE	0	TWI Interrupt Enable

TWAMR0TWI (Slave) Address Mask Register

Address: 0xBD
Reset: 0x00
Access: read/write

7TWAM06
6TWAM05
5TWAM04
4TWAM03
3TWAM02
2TWAM01
1TWAM00
0–

1 field

Field	Bits	What it does
TWAM0	7:1

USART0 USART

UCSR0AUSART Control and Status Register A

Address: 0xC0
Reset: 0x00
Access: read/write

7RXC
6TXC
5UDRE
4FE
3DOR
2UPE
1U2X
0MPCM

8 fields

Field	Bits	What it does
RXC	7	USART Receive Complete
TXC	6	USART Transmit Complete
UDRE	5	USART Data Register Empty
FE	4	Framing Error
DOR	3	Data Overrun
UPE	2	Parity Error
U2X	1	Double the USART transmission speed
MPCM	0	Multi-processor Communication Mode

UCSR0BUSART Control and Status Register B

Address: 0xC1
Reset: 0x00
Access: read/write

7RXCIE
6TXCIE
5UDRIE
4RXEN
3TXEN
2UCSZ2
1RXB8
0TXB8

8 fields

Field	Bits	What it does
RXCIE	7	RX Complete Interrupt Enable
TXCIE	6	TX Complete Interrupt Enable
UDRIE	5	USART Data register Empty Interrupt Enable
RXEN	4	Receiver Enable
TXEN	3	Transmitter Enable
UCSZ2	2	Character Size
RXB8	1	Receive Data Bit 8
TXB8	0	Transmit Data Bit 8

UCSR0CUSART Control and Status Register C

Address: 0xC2
Reset: 0x00
Access: read/write

7UMSEL1
6UMSEL0
5UPM1
4UPM0
3USBS
2UCSZ1
1UCSZ0
0UCPOL

5 fields

Field	Bits	What it does
UMSEL	7:6	USART Mode Select `0` Asynchronous Operation `1` Synchronous Operation `3` Master SPI
UPM	5:4	Parity Mode Bits `0` Disabled `1` Reserved `2` Enabled, Even Parity `3` Enabled, Odd Parity
USBS	3	Stop Bit Select `0` 1-bit `1` 2-bit
UCSZ	2:1	Character Size
UCPOL	0	Clock Polarity

UCSR0DUSART Control and Status Register D

Address: 0xC3
Reset: 0x00
Access: read/write

7RXSIE
6RXS
5SFDE
4–
3–
2–
1–
0–

3 fields

Field	Bits	What it does
RXSIE	7	RX Start Frame Interrupt Enable
RXS	6	Start Frame Detect Flag
SFDE	5	Start Frame Detection Enable

UBRR0USART Baud Rate Register Bytes

Address: 0xC4
Reset: 0x0000
Access: read/write
Size: 16-bit

UDR0USART I/O Data Register

Address: 0xC6
Reset: 0x00
Access: read/write

7–
6–
5–
4–
3–
2–
1–
0–

USART1 USART

UCSR1AUSART Control and Status Register A

Address: 0xC8
Reset: 0x00
Access: read/write

7RXC
6TXC
5UDRE
4FE
3DOR
2UPE
1U2X
0MPCM

8 fields

Field	Bits	What it does
RXC	7	USART Receive Complete
TXC	6	USART Transmit Complete
UDRE	5	USART Data Register Empty
FE	4	Framing Error
DOR	3	Data Overrun
UPE	2	Parity Error
U2X	1	Double the USART transmission speed
MPCM	0	Multi-processor Communication Mode

UCSR1BUSART Control and Status Register B

Address: 0xC9
Reset: 0x00
Access: read/write

7RXCIE
6TXCIE
5UDRIE
4RXEN
3TXEN
2UCSZ2
1RXB8
0TXB8

8 fields

Field	Bits	What it does
RXCIE	7	RX Complete Interrupt Enable
TXCIE	6	TX Complete Interrupt Enable
UDRIE	5	USART Data register Empty Interrupt Enable
RXEN	4	Receiver Enable
TXEN	3	Transmitter Enable
UCSZ2	2	Character Size
RXB8	1	Receive Data Bit 8
TXB8	0	Transmit Data Bit 8

UCSR1CUSART Control and Status Register C

Address: 0xCA
Reset: 0x00
Access: read/write

7UMSEL1
6UMSEL0
5UPM1
4UPM0
3USBS
2UCSZ1
1UCSZ0
0UCPOL

5 fields

Field	Bits	What it does
UMSEL	7:6	USART Mode Select `0` Asynchronous Operation `1` Synchronous Operation `3` Master SPI
UPM	5:4	Parity Mode Bits `0` Disabled `1` Reserved `2` Enabled, Even Parity `3` Enabled, Odd Parity
USBS	3	Stop Bit Select `0` 1-bit `1` 2-bit
UCSZ	2:1	Character Size
UCPOL	0	Clock Polarity

UCSR1DUSART Control and Status Register D

Address: 0xCB
Reset: 0x00
Access: read/write

7RXSIE
6RXS
5SFDE
4–
3–
2–
1–
0–

3 fields

Field	Bits	What it does
RXSIE	7	RX Start Frame Interrupt Enable
RXS	6	Start Frame Detect Flag
SFDE	5	Start Frame Detection Enable

UBRR1USART Baud Rate Register Bytes

Address: 0xCC
Reset: 0x0000
Access: read/write
Size: 16-bit

UDR1USART I/O Data Register

Address: 0xCE
Reset: 0x00
Access: read/write

7–
6–
5–
4–
3–
2–
1–
0–

USART2 USART

UCSR2AUSART Control and Status Register A

Address: 0xD0
Reset: 0x00
Access: read/write

7RXC
6TXC
5UDRE
4FE
3DOR
2UPE
1U2X
0MPCM

8 fields

Field	Bits	What it does
RXC	7	USART Receive Complete
TXC	6	USART Transmit Complete
UDRE	5	USART Data Register Empty
FE	4	Framing Error
DOR	3	Data Overrun
UPE	2	Parity Error
U2X	1	Double the USART transmission speed
MPCM	0	Multi-processor Communication Mode

UCSR2BUSART Control and Status Register B

Address: 0xD1
Reset: 0x00
Access: read/write

7RXCIE
6TXCIE
5UDRIE
4RXEN
3TXEN
2UCSZ2
1RXB8
0TXB8

8 fields

Field	Bits	What it does
RXCIE	7	RX Complete Interrupt Enable
TXCIE	6	TX Complete Interrupt Enable
UDRIE	5	USART Data register Empty Interrupt Enable
RXEN	4	Receiver Enable
TXEN	3	Transmitter Enable
UCSZ2	2	Character Size
RXB8	1	Receive Data Bit 8
TXB8	0	Transmit Data Bit 8

UCSR2CUSART Control and Status Register C

Address: 0xD2
Reset: 0x00
Access: read/write

7UMSEL1
6UMSEL0
5UPM1
4UPM0
3USBS
2UCSZ1
1UCSZ0
0UCPOL

5 fields

Field	Bits	What it does
UMSEL	7:6	USART Mode Select `0` Asynchronous Operation `1` Synchronous Operation `3` Master SPI
UPM	5:4	Parity Mode Bits `0` Disabled `1` Reserved `2` Enabled, Even Parity `3` Enabled, Odd Parity
USBS	3	Stop Bit Select `0` 1-bit `1` 2-bit
UCSZ	2:1	Character Size
UCPOL	0	Clock Polarity

UCSR2DUSART Control and Status Register D

Address: 0xD3
Reset: 0x00
Access: read/write

7RXSIE
6RXS
5SFDE
4–
3–
2–
1–
0–

3 fields

Field	Bits	What it does
RXSIE	7	RX Start Frame Interrupt Enable
RXS	6	Start Frame Detect Flag
SFDE	5	Start Frame Detection Enable

UBRR2USART Baud Rate Register Bytes

Address: 0xD4
Reset: 0x0000
Access: read/write
Size: 16-bit

UDR2USART I/O Data Register

Address: 0xD6
Reset: 0x00
Access: read/write

7–
6–
5–
4–
3–
2–
1–
0–

TWI1 Two Wire Serial Interface

TWBR1TWI Bit Rate register

Address: 0xD8
Reset: 0x00
Access: read/write

7–
6–
5–
4–
3–
2–
1–
0–

TWSR1TWI Status Register

Address: 0xD9
Reset: 0x00
Access: read/write

7TWS04
6TWS03
5TWS02
4TWS01
3TWS00
2–
1TWPS1
0TWPS0

2 fields

Field	Bits	What it does
TWS0	7:3	TWI Status
TWPS	1:0	TWI Prescaler `0` 1 `1` 4 `2` 16 `3` 64

TWAR1TWI (Slave) Address register

Address: 0xDA
Reset: 0x00
Access: read/write

7TWA6
6TWA5
5TWA4
4TWA3
3TWA2
2TWA1
1TWA0
0TWGCE

2 fields

Field	Bits	What it does
TWA	7:1	TWI (Slave) Address register Bits
TWGCE	0	TWI General Call Recognition Enable Bit

TWDR1TWI Data register

Address: 0xDB
Reset: 0x00
Access: read/write

7–
6–
5–
4–
3–
2–
1–
0–

TWCR1TWI Control Register

Address: 0xDC
Reset: 0x00
Access: read/write

7TWINT
6TWEA
5TWSTA
4TWSTO
3TWWC
2TWEN
1–
0TWIE

7 fields

Field	Bits	What it does
TWINT	7	TWI Interrupt Flag
TWEA	6	TWI Enable Acknowledge Bit
TWSTA	5	TWI Start Condition Bit
TWSTO	4	TWI Stop Condition Bit
TWWC	3	TWI Write Collision Flag
TWEN	2	TWI Enable Bit
TWIE	0	TWI Interrupt Enable

TWAMR1TWI (Slave) Address Mask Register

Address: 0xDD
Reset: 0x00
Access: read/write

7TWAM16
6TWAM15
5TWAM14
4TWAM13
3TWAM12
2TWAM11
1TWAM10
0–

1 field

Field	Bits	What it does
TWAM1	7:1