ATmega64M1 fuses & lock bits
The fuse bytes set the clock, start-up, brown-out and boot options; the lock bits protect flash and EEPROM. A fuse bit is programmed at 0 . Change a setting and the byte below updates; the starting values are the factory defaults.
CKDIV8 Divide clock by 8 internally 1 · unprogrammed 0 · programmed CKOUT Clock output on PORTD1 1 · unprogrammed 0 · programmed SUT_CKSEL Select Clock Source Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 0 ms Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 0 ms PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 0 ms Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 4.1 ms Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 65 ms Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 4 ms Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 4.1 ms PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4.1 ms Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 1K CK/14 CK + 4 ms Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 258 CK/14 CK + 65 ms Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms PLL clock /4; PLL input: Ext. Clock; Start-up time PWRDWN/RESET: 6K CK/14 CK + 64 ms Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/14 CK + 65 ms PLL clock 16 MHz; Start-up time PWRDWN/RESET: 1K CK/14 CK + 65 ms Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4 ms Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 0 ms Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 4.1 ms PLL clock 16 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 0 ms Ext. Crystal Osc.; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms PLL clock /4; PLL input: Ext. Crystal Osc.; Start-up time PWRDWN/RESET: 16K CK/14 CK + 64 ms Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK /14 CK + 4.1 ms Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 16K CK/14 CK + 65 ms HIGH fuse 0xD9 default 0xD9 RSTDISBL Reset Disabled (Enable PC6 as i/o pin) 1 · unprogrammed 0 · programmed DWEN Debug Wire enable 1 · unprogrammed 0 · programmed SPIEN Serial program downloading (SPI) enabled 1 · unprogrammed 0 · programmed WDTON Watch-dog Timer always on 1 · unprogrammed 0 · programmed EESAVE Preserve EEPROM through the Chip Erase cycle 1 · unprogrammed 0 · programmed BOOTSZ Select Boot Size Boot Flash size=4096 words Boot address=$7000 Boot Flash size=2048 words Boot address=$7800 Boot Flash size=1024 words Boot address=$7C00 Boot Flash size=512 words Boot address=$7E00 BOOTRST Select Reset Vector 1 · unprogrammed 0 · programmed EXTENDED fuse 0xFF default 0xFF PSCRB PSC Reset Behavior 1 · unprogrammed 0 · programmed PSCRVA PSCOUTnA Reset Value 1 · unprogrammed 0 · programmed PSCRVB PSC0UTnB Reset Value 1 · unprogrammed 0 · programmed BODLEVEL Brown-out Detector Trigger Level Brown-out detection at VCC=2.6 V Brown-out detection at VCC=2.8 V Brown-out detection at VCC=4.2 V Brown-out detection at VCC=4.4 V Brown-out detection at VCC=4.3 V Brown-out detection at VCC=2.7 V Brown-out detection at VCC=4.5 V Brown-out detection disabled Lock bits 0xFF default 0xFF BLB1 Boot Loader Protection Mode LPM and SPM prohibited in Boot Section LPM prohibited in Boot Section SPM prohibited in Boot Section No lock on SPM and LPM in Boot Section BLB0 Boot Loader Protection Mode LPM and SPM prohibited in Application Section LPM prohibited in Application Section SPM prohibited in Application Section No lock on SPM and LPM in Application Section LB Memory Lock Further programming and verification disabled Further programming disabled No memory lock features enabled