ATSAML10D15A GCLK registers

The 28 registers of GCLK (Generic Clock Generator), from 0x40001C00, with their reset value and every field. The ATSAML10D15A has 894 registers in 38 peripherals, one page each.

GCLK Generic Clock Generator

CTRLAControl

Address
0x40001C00
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0SWRST
1 field
FieldBitsWhat it does
SWRST0Software Reset

SYNCBUSYSynchronization Busy

Address
0x40001C04
Reset
0x00000000
Access
read only
Size
32-bit
6 fields
FieldBitsWhat it does
GENCTRL46Generic Clock Generator Control 4 Synchronization Busy bit
GENCTRL35Generic Clock Generator Control 3 Synchronization Busy bit
GENCTRL24Generic Clock Generator Control 2 Synchronization Busy bit
GENCTRL13Generic Clock Generator Control 1 Synchronization Busy bit
GENCTRL02Generic Clock Generator Control 0 Synchronization Busy bit
SWRST0Software Reset Synchroniation Busy bit

GENCTRL0Generic Clock Generator Control

Address
0x40001C20
Reset
0x00000000
Access
read/write
Size
32-bit
8 fields
FieldBitsWhat it does
RUNSTDBY13Run in Standby
DIVSEL12Divide Selection
  • 0 Divide input directly by divider factor
  • 1 Divide input by 2^(divider factor+ 1)
OE11Output Enable
OOV10Output Off Value
IDC9Improve Duty Cycle
GENEN8Generic Clock Generator Enable
SRC2:0Source Select
  • 0 XOSC oscillator output
  • 1 Generator input pad (GCLK_IO)
  • 2 Generic clock generator 1 output
  • 3 OSCULP32K oscillator output
  • 4 XOSC32K oscillator output
  • 5 OSC16M oscillator output
  • 6 DFLLULP output
  • 7 FDPLL output
DIV31:16Division Factor

GENCTRL1Generic Clock Generator Control

Address
0x40001C24
Reset
0x00000000
Access
read/write
Size
32-bit
8 fields
FieldBitsWhat it does
RUNSTDBY13Run in Standby
DIVSEL12Divide Selection
  • 0 Divide input directly by divider factor
  • 1 Divide input by 2^(divider factor+ 1)
OE11Output Enable
OOV10Output Off Value
IDC9Improve Duty Cycle
GENEN8Generic Clock Generator Enable
SRC2:0Source Select
  • 0 XOSC oscillator output
  • 1 Generator input pad (GCLK_IO)
  • 2 Generic clock generator 1 output
  • 3 OSCULP32K oscillator output
  • 4 XOSC32K oscillator output
  • 5 OSC16M oscillator output
  • 6 DFLLULP output
  • 7 FDPLL output
DIV31:16Division Factor

GENCTRL2Generic Clock Generator Control

Address
0x40001C28
Reset
0x00000000
Access
read/write
Size
32-bit
8 fields
FieldBitsWhat it does
RUNSTDBY13Run in Standby
DIVSEL12Divide Selection
  • 0 Divide input directly by divider factor
  • 1 Divide input by 2^(divider factor+ 1)
OE11Output Enable
OOV10Output Off Value
IDC9Improve Duty Cycle
GENEN8Generic Clock Generator Enable
SRC2:0Source Select
  • 0 XOSC oscillator output
  • 1 Generator input pad (GCLK_IO)
  • 2 Generic clock generator 1 output
  • 3 OSCULP32K oscillator output
  • 4 XOSC32K oscillator output
  • 5 OSC16M oscillator output
  • 6 DFLLULP output
  • 7 FDPLL output
DIV31:16Division Factor

GENCTRL3Generic Clock Generator Control

Address
0x40001C2C
Reset
0x00000000
Access
read/write
Size
32-bit
8 fields
FieldBitsWhat it does
RUNSTDBY13Run in Standby
DIVSEL12Divide Selection
  • 0 Divide input directly by divider factor
  • 1 Divide input by 2^(divider factor+ 1)
OE11Output Enable
OOV10Output Off Value
IDC9Improve Duty Cycle
GENEN8Generic Clock Generator Enable
SRC2:0Source Select
  • 0 XOSC oscillator output
  • 1 Generator input pad (GCLK_IO)
  • 2 Generic clock generator 1 output
  • 3 OSCULP32K oscillator output
  • 4 XOSC32K oscillator output
  • 5 OSC16M oscillator output
  • 6 DFLLULP output
  • 7 FDPLL output
DIV31:16Division Factor

GENCTRL4Generic Clock Generator Control

Address
0x40001C30
Reset
0x00000000
Access
read/write
Size
32-bit
8 fields
FieldBitsWhat it does
RUNSTDBY13Run in Standby
DIVSEL12Divide Selection
  • 0 Divide input directly by divider factor
  • 1 Divide input by 2^(divider factor+ 1)
OE11Output Enable
OOV10Output Off Value
IDC9Improve Duty Cycle
GENEN8Generic Clock Generator Enable
SRC2:0Source Select
  • 0 XOSC oscillator output
  • 1 Generator input pad (GCLK_IO)
  • 2 Generic clock generator 1 output
  • 3 OSCULP32K oscillator output
  • 4 XOSC32K oscillator output
  • 5 OSC16M oscillator output
  • 6 DFLLULP output
  • 7 FDPLL output
DIV31:16Division Factor

PCHCTRL0Peripheral Clock Control

Address
0x40001C80
Reset
0x00000000
Access
read/write
Size
32-bit
3 fields
FieldBitsWhat it does
WRTLOCK7Write Lock
CHEN6Channel Enable
GEN2:0Generic Clock Generator
  • 0 Generic clock generator 0
  • 1 Generic clock generator 1
  • 2 Generic clock generator 2
  • 3 Generic clock generator 3
  • 4 Generic clock generator 4

PCHCTRL1Peripheral Clock Control

Address
0x40001C84
Reset
0x00000000
Access
read/write
Size
32-bit
3 fields
FieldBitsWhat it does
WRTLOCK7Write Lock
CHEN6Channel Enable
GEN2:0Generic Clock Generator
  • 0 Generic clock generator 0
  • 1 Generic clock generator 1
  • 2 Generic clock generator 2
  • 3 Generic clock generator 3
  • 4 Generic clock generator 4

PCHCTRL2Peripheral Clock Control

Address
0x40001C88
Reset
0x00000000
Access
read/write
Size
32-bit
3 fields
FieldBitsWhat it does
WRTLOCK7Write Lock
CHEN6Channel Enable
GEN2:0Generic Clock Generator
  • 0 Generic clock generator 0
  • 1 Generic clock generator 1
  • 2 Generic clock generator 2
  • 3 Generic clock generator 3
  • 4 Generic clock generator 4

PCHCTRL3Peripheral Clock Control

Address
0x40001C8C
Reset
0x00000000
Access
read/write
Size
32-bit
3 fields
FieldBitsWhat it does
WRTLOCK7Write Lock
CHEN6Channel Enable
GEN2:0Generic Clock Generator
  • 0 Generic clock generator 0
  • 1 Generic clock generator 1
  • 2 Generic clock generator 2
  • 3 Generic clock generator 3
  • 4 Generic clock generator 4

PCHCTRL4Peripheral Clock Control

Address
0x40001C90
Reset
0x00000000
Access
read/write
Size
32-bit
3 fields
FieldBitsWhat it does
WRTLOCK7Write Lock
CHEN6Channel Enable
GEN2:0Generic Clock Generator
  • 0 Generic clock generator 0
  • 1 Generic clock generator 1
  • 2 Generic clock generator 2
  • 3 Generic clock generator 3
  • 4 Generic clock generator 4

PCHCTRL5Peripheral Clock Control

Address
0x40001C94
Reset
0x00000000
Access
read/write
Size
32-bit
3 fields
FieldBitsWhat it does
WRTLOCK7Write Lock
CHEN6Channel Enable
GEN2:0Generic Clock Generator
  • 0 Generic clock generator 0
  • 1 Generic clock generator 1
  • 2 Generic clock generator 2
  • 3 Generic clock generator 3
  • 4 Generic clock generator 4

PCHCTRL6Peripheral Clock Control

Address
0x40001C98
Reset
0x00000000
Access
read/write
Size
32-bit
3 fields
FieldBitsWhat it does
WRTLOCK7Write Lock
CHEN6Channel Enable
GEN2:0Generic Clock Generator
  • 0 Generic clock generator 0
  • 1 Generic clock generator 1
  • 2 Generic clock generator 2
  • 3 Generic clock generator 3
  • 4 Generic clock generator 4

PCHCTRL7Peripheral Clock Control

Address
0x40001C9C
Reset
0x00000000
Access
read/write
Size
32-bit
3 fields
FieldBitsWhat it does
WRTLOCK7Write Lock
CHEN6Channel Enable
GEN2:0Generic Clock Generator
  • 0 Generic clock generator 0
  • 1 Generic clock generator 1
  • 2 Generic clock generator 2
  • 3 Generic clock generator 3
  • 4 Generic clock generator 4

PCHCTRL8Peripheral Clock Control

Address
0x40001CA0
Reset
0x00000000
Access
read/write
Size
32-bit
3 fields
FieldBitsWhat it does
WRTLOCK7Write Lock
CHEN6Channel Enable
GEN2:0Generic Clock Generator
  • 0 Generic clock generator 0
  • 1 Generic clock generator 1
  • 2 Generic clock generator 2
  • 3 Generic clock generator 3
  • 4 Generic clock generator 4

PCHCTRL9Peripheral Clock Control

Address
0x40001CA4
Reset
0x00000000
Access
read/write
Size
32-bit
3 fields
FieldBitsWhat it does
WRTLOCK7Write Lock
CHEN6Channel Enable
GEN2:0Generic Clock Generator
  • 0 Generic clock generator 0
  • 1 Generic clock generator 1
  • 2 Generic clock generator 2
  • 3 Generic clock generator 3
  • 4 Generic clock generator 4

PCHCTRL10Peripheral Clock Control

Address
0x40001CA8
Reset
0x00000000
Access
read/write
Size
32-bit
3 fields
FieldBitsWhat it does
WRTLOCK7Write Lock
CHEN6Channel Enable
GEN2:0Generic Clock Generator
  • 0 Generic clock generator 0
  • 1 Generic clock generator 1
  • 2 Generic clock generator 2
  • 3 Generic clock generator 3
  • 4 Generic clock generator 4

PCHCTRL11Peripheral Clock Control

Address
0x40001CAC
Reset
0x00000000
Access
read/write
Size
32-bit
3 fields
FieldBitsWhat it does
WRTLOCK7Write Lock
CHEN6Channel Enable
GEN2:0Generic Clock Generator
  • 0 Generic clock generator 0
  • 1 Generic clock generator 1
  • 2 Generic clock generator 2
  • 3 Generic clock generator 3
  • 4 Generic clock generator 4

PCHCTRL12Peripheral Clock Control

Address
0x40001CB0
Reset
0x00000000
Access
read/write
Size
32-bit
3 fields
FieldBitsWhat it does
WRTLOCK7Write Lock
CHEN6Channel Enable
GEN2:0Generic Clock Generator
  • 0 Generic clock generator 0
  • 1 Generic clock generator 1
  • 2 Generic clock generator 2
  • 3 Generic clock generator 3
  • 4 Generic clock generator 4

PCHCTRL13Peripheral Clock Control

Address
0x40001CB4
Reset
0x00000000
Access
read/write
Size
32-bit
3 fields
FieldBitsWhat it does
WRTLOCK7Write Lock
CHEN6Channel Enable
GEN2:0Generic Clock Generator
  • 0 Generic clock generator 0
  • 1 Generic clock generator 1
  • 2 Generic clock generator 2
  • 3 Generic clock generator 3
  • 4 Generic clock generator 4

PCHCTRL14Peripheral Clock Control

Address
0x40001CB8
Reset
0x00000000
Access
read/write
Size
32-bit
3 fields
FieldBitsWhat it does
WRTLOCK7Write Lock
CHEN6Channel Enable
GEN2:0Generic Clock Generator
  • 0 Generic clock generator 0
  • 1 Generic clock generator 1
  • 2 Generic clock generator 2
  • 3 Generic clock generator 3
  • 4 Generic clock generator 4

PCHCTRL15Peripheral Clock Control

Address
0x40001CBC
Reset
0x00000000
Access
read/write
Size
32-bit
3 fields
FieldBitsWhat it does
WRTLOCK7Write Lock
CHEN6Channel Enable
GEN2:0Generic Clock Generator
  • 0 Generic clock generator 0
  • 1 Generic clock generator 1
  • 2 Generic clock generator 2
  • 3 Generic clock generator 3
  • 4 Generic clock generator 4

PCHCTRL16Peripheral Clock Control

Address
0x40001CC0
Reset
0x00000000
Access
read/write
Size
32-bit
3 fields
FieldBitsWhat it does
WRTLOCK7Write Lock
CHEN6Channel Enable
GEN2:0Generic Clock Generator
  • 0 Generic clock generator 0
  • 1 Generic clock generator 1
  • 2 Generic clock generator 2
  • 3 Generic clock generator 3
  • 4 Generic clock generator 4

PCHCTRL17Peripheral Clock Control

Address
0x40001CC4
Reset
0x00000000
Access
read/write
Size
32-bit
3 fields
FieldBitsWhat it does
WRTLOCK7Write Lock
CHEN6Channel Enable
GEN2:0Generic Clock Generator
  • 0 Generic clock generator 0
  • 1 Generic clock generator 1
  • 2 Generic clock generator 2
  • 3 Generic clock generator 3
  • 4 Generic clock generator 4

PCHCTRL18Peripheral Clock Control

Address
0x40001CC8
Reset
0x00000000
Access
read/write
Size
32-bit
3 fields
FieldBitsWhat it does
WRTLOCK7Write Lock
CHEN6Channel Enable
GEN2:0Generic Clock Generator
  • 0 Generic clock generator 0
  • 1 Generic clock generator 1
  • 2 Generic clock generator 2
  • 3 Generic clock generator 3
  • 4 Generic clock generator 4

PCHCTRL19Peripheral Clock Control

Address
0x40001CCC
Reset
0x00000000
Access
read/write
Size
32-bit
3 fields
FieldBitsWhat it does
WRTLOCK7Write Lock
CHEN6Channel Enable
GEN2:0Generic Clock Generator
  • 0 Generic clock generator 0
  • 1 Generic clock generator 1
  • 2 Generic clock generator 2
  • 3 Generic clock generator 3
  • 4 Generic clock generator 4

PCHCTRL20Peripheral Clock Control

Address
0x40001CD0
Reset
0x00000000
Access
read/write
Size
32-bit
3 fields
FieldBitsWhat it does
WRTLOCK7Write Lock
CHEN6Channel Enable
GEN2:0Generic Clock Generator
  • 0 Generic clock generator 0
  • 1 Generic clock generator 1
  • 2 Generic clock generator 2
  • 3 Generic clock generator 3
  • 4 Generic clock generator 4