ATtiny104 registers
All 55 registers by peripheral, at their data-space address (the I/O address IN and OUT use is shown beside it), with their reset value and every bit.
PORTA I/O Port
PINAInput Pins, Port A
- Address
0x00
- Reset
0x00
- Access
- read/write
- 7PINA7
- 6PINA6
- 5PINA5
- 4PINA4
- 3PINA3
- 2PINA2
- 1PINA1
- 0PINA0
DDRAData Direction Register, Port A
- Address
0x01
- Reset
0x00
- Access
- read/write
- 7DDA7
- 6DDA6
- 5DDA5
- 4DDA4
- 3DDA3
- 2DDA2
- 1DDA1
- 0DDA0
PORTAPort A Data register
- Address
0x02
- Reset
0x00
- Access
- read/write
- 7PORTA7
- 6PORTA6
- 5PORTA5
- 4PORTA4
- 3PORTA3
- 2PORTA2
- 1PORTA1
- 0PORTA0
PUEAPull-up Enable Control Register for PORTA
- Address
0x03
- Reset
0x00
- Access
- read/write
- 7PUEA7
- 6PUEA6
- 5PUEA5
- 4PUEA4
- 3PUEA3
- 2PUEA2
- 1PUEA1
- 0PUEA0
PORTCRPort Control Register
- Address
0x16
- Reset
0x00
- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2–
- 1–
- 0BBMA
1 field
| Field | Bits | What it does |
|---|
| BBMA | 0 | Break-Before-Make Mode Enable for PORTA |
PORTB I/O Port
PINBInput Pins, Port B
- Address
0x04
- Reset
0x00
- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3PINB3
- 2PINB2
- 1PINB1
- 0PINB0
DDRBData Direction Register, Port B
- Address
0x05
- Reset
0x00
- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3DDB3
- 2DDB2
- 1DDB1
- 0DDB0
PORTBPort B Data register
- Address
0x06
- Reset
0x00
- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3PORTB3
- 2PORTB2
- 1PORTB1
- 0PORTB0
PUEBPull-up Enable Control Register for PORTB
- Address
0x07
- Reset
0x00
- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3PUEB3
- 2PUEB2
- 1PUEB1
- 0PUEB0
PORTCRPort Control Register
- Address
0x16
- Reset
0x00
- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2–
- 1BBMB
- 0–
1 field
| Field | Bits | What it does |
|---|
| BBMB | 1 | Break-Before-Make Mode Enable for PORTB |
USART USART
UDRUSART I/O Data Register
- Address
0x08
- Reset
0x00
- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2–
- 1–
- 0–
UBRRUSART Baud Rate Register Bytes
- Address
0x09
- Reset
0x0000
- Access
- read/write
- Size
- 16-bit
UCSRDUSART Control and Status Register D
- Address
0x0B
- Reset
0x00
- Access
- read/write
- 7RXSIE
- 6RXS
- 5SFDE
- 4–
- 3–
- 2–
- 1–
- 0–
3 fields
| Field | Bits | What it does |
|---|
| RXSIE | 7 | USART RX Start Interrupt Enable |
| RXS | 6 | USART RX Start Flag |
| SFDE | 5 | Start frame detection enable |
UCSRCUSART Control and Status Register C
- Address
0x0C
- Reset
0x00
- Access
- read/write
- 7UMSEL1
- 6UMSEL0
- 5UPM1
- 4UPM0
- 3USBS
- 2UCSZ1
- 1UCSZ0
- 0UCPOL
5 fields
| Field | Bits | What it does |
|---|
| UMSEL | 7:6 | USART Mode Select0 Asynchronous Operation1 Synchronous Operation
|
| UPM | 5:4 | Parity Mode Bits0 Disabled1 Reserved2 Enabled, Even Parity3 Enabled, Odd Parity
|
| USBS | 3 | Stop Bit Select |
| UCSZ | 2:1 | Character Size |
| UCPOL | 0 | Clock Polarity |
UCSRBUSART Control and Status Register B
- Address
0x0D
- Reset
0x00
- Access
- read/write
- 7RXCIE
- 6TXCIE
- 5UDRIE
- 4RXEN
- 3TXEN
- 2UCSZ2
- 1RXB8
- 0TXB8
8 fields
| Field | Bits | What it does |
|---|
| RXCIE | 7 | RX Complete Interrupt Enable |
| TXCIE | 6 | TX Complete Interrupt Enable |
| UDRIE | 5 | USART Data register Empty Interrupt Enable |
| RXEN | 4 | Receiver Enable |
| TXEN | 3 | Transmitter Enable |
| UCSZ2 | 2 | Character Size |
| RXB8 | 1 | Receive Data Bit 8 |
| TXB8 | 0 | Transmit Data Bit 8 |
UCSRAUSART Control and Status Register A
- Address
0x0E
- Reset
0x00
- Access
- read/write
- 7RXC
- 6TXC
- 5UDRE
- 4FE
- 3DOR
- 2UPE
- 1U2X
- 0MPCM
8 fields
| Field | Bits | What it does |
|---|
| RXC | 7 | USART Receive Complete |
| TXC | 6 | USART Transmit Complete |
| UDRE | 5 | USART Data Register Empty |
| FE | 4 | Framing Error |
| DOR | 3 | Data Overrun |
| UPE | 2 | Parity Error |
| U2X | 1 | Double the USART transmission speed |
| MPCM | 0 | Multi-processor Communication Mode |
EXINT External Interrupts
PCMSK0Pin Change Mask Register 0
- Address
0x0F
- Reset
0x00
- Access
- read/write
- 7PCINT7
- 6PCINT6
- 5PCINT5
- 4PCINT4
- 3PCINT3
- 2PCINT2
- 1PCINT1
- 0PCINT0
8 fields
| Field | Bits | What it does |
|---|
| PCINT7 | 7 | Pin Change Enable Mask 0 Bit 7 |
| PCINT6 | 6 | Pin Change Enable Mask 0 Bit 6 |
| PCINT5 | 5 | Pin Change Enable Mask 0 Bit 5 |
| PCINT4 | 4 | Pin Change Enable Mask 0 Bit 4 |
| PCINT3 | 3 | Pin Change Enable Mask 0 Bit 3 |
| PCINT2 | 2 | Pin Change Enable Mask 0 Bit 2 |
| PCINT1 | 1 | Pin Change Enable Mask 0 Bit 1 |
| PCINT0 | 0 | Pin Change Enable Mask 0 Bit 0 |
PCMSK1Pin Change Mask Register 1
- Address
0x10
- Reset
0x00
- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3PCINT11
- 2PCINT10
- 1PCINT9
- 0PCINT8
4 fields
| Field | Bits | What it does |
|---|
| PCINT11 | 3 | Pin Change Enable Mask 1 Bit 3 |
| PCINT10 | 2 | Pin Change Enable Mask 1 Bit 2 |
| PCINT9 | 1 | Pin Change Enable Mask 1 Bit 1 |
| PCINT8 | 0 | Pin Change Enable Mask 1 Bit 0 |
PCIFRPin Change Interrupt Flag Register
- Address
0x11
- Reset
0x00
- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2–
- 1PCIF1
- 0PCIF0
2 fields
| Field | Bits | What it does |
|---|
| PCIF1 | 1 | Pin Change Interrupt Flag 1 |
| PCIF0 | 0 | Pin Change Interrupt Flag 0 |
PCICRPin Change Interrupt Control Register
- Address
0x12
- Reset
0x00
- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2–
- 1PCIE1
- 0PCIE0
2 fields
| Field | Bits | What it does |
|---|
| PCIE1 | 1 | Pin Change Interrupt Enable 1 |
| PCIE0 | 0 | Pin Change Interrupt Enable 0 |
EIMSKExternal Interrupt Mask register
- Address
0x13
- Reset
0x00
- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2–
- 1–
- 0INT0
1 field
| Field | Bits | What it does |
|---|
| INT0 | 0 | External Interrupt Request 0 Enable |
EIFRExternal Interrupt Flag register
- Address
0x14
- Reset
0x00
- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2–
- 1–
- 0INTF0
1 field
| Field | Bits | What it does |
|---|
| INTF0 | 0 | External Interrupt Flag 0 |
EICRAExternal Interrupt Control Register A
- Address
0x15
- Reset
0x00
- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2–
- 1ISC01
- 0ISC00
2 fields
| Field | Bits | What it does |
|---|
| ISC01 | 1 | Interrupt Sense Control 0 Bit 1 |
| ISC00 | 0 | Interrupt Sense Control 0 Bit 0 |
AC Analog Comparator
DIDR0
- Address
0x17
- Reset
0x00
- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2–
- 1AIN1D
- 0AIN0D
2 fields
| Field | Bits | What it does |
|---|
| AIN1D | 1 | AIN1 Digital Input Disable |
| AIN0D | 0 | AIN0 Digital Input Disable |
ACSRBAnalog Comparator Control And Status Register B
- Address
0x1E
- Reset
0x00
- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2–
- 1ACOE
- 0ACPMUX
2 fields
| Field | Bits | What it does |
|---|
| ACOE | 1 | Analog Comparator Output Enable |
| ACPMUX | 0 | Analog Comparator positive input selection bit |
ACSRAAnalog Comparator Control And Status Register A
- Address
0x1F
- Reset
0x00
- Access
- read/write
- 7ACD
- 6ACBG
- 5ACO
- 4ACI
- 3ACIE
- 2ACIC
- 1ACIS1
- 0ACIS0
7 fields
| Field | Bits | What it does |
|---|
| ACD | 7 | Analog Comparator Disable |
| ACBG | 6 | Analog Comparator Bandgap enable |
| ACO | 5 | Analog Compare Output |
| ACI | 4 | Analog Comparator Interrupt Flag |
| ACIE | 3 | Analog Comparator Interrupt Enable |
| ACIC | 2 | Analog Comparator Input Capture Enable |
| ACIS | 1:0 | Analog Comparator Interrupt Mode Select bits0 Interrupt on Toggle1 Reserved2 Interrupt on Falling Edge3 Interrupt on Rising Edge
|
ADC Analog-to-Digital Converter
DIDR0Digital Input Disable Register
- Address
0x17
- Reset
0x00
- Access
- read/write
- 7ADC7D
- 6ADC6D
- 5ADC5D
- 4ADC4D
- 3ADC3D
- 2ADC2D
- 1ADC1D
- 0ADC0D
8 fields
| Field | Bits | What it does |
|---|
| ADC7D | 7 | ADC7 Digital Input Disable |
| ADC6D | 6 | ADC6 Digital Input Disable |
| ADC5D | 5 | ADC5 Digital Input Disable |
| ADC4D | 4 | ADC4 Digital Input Disable |
| ADC3D | 3 | ADC3 Digital Input Disable |
| ADC2D | 2 | ADC2 Digital Input Disable |
| ADC1D | 1 | ADC1 Digital Input Disable |
| ADC0D | 0 | ADC0 Digital Input Disable |
ADCLADC Data Register Low
- Address
0x19
- Reset
0x00
- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2–
- 1–
- 0–
ADCHADC Data Register High
- Address
0x1A
- Reset
0x00
- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2–
- 1–
- 0–
ADMUXThe ADC multiplexer Selection Register
- Address
0x1B
- Reset
0x00
- Access
- read/write
- 7REFS1
- 6REFS0
- 5–
- 4–
- 3–
- 2MUX2
- 1MUX1
- 0MUX0
2 fields
| Field | Bits | What it does |
|---|
| REFS | 7:6 | Analog Reference voltage Selection Bits0 Vcc1 Internal 1.1V Reference2 Internal 2.2V Reference3 Internal 4.3V Reference
|
| MUX | 2:0 | Analog Channel Selection Bits0 ADC01 ADC12 ADC23 ADC34 ADC45 ADC56 ADC67 ADC7
|
ADCSRBThe ADC Control and Status register B
- Address
0x1C
- Reset
0x00
- Access
- read/write
- 7ADLAR
- 6–
- 5–
- 4–
- 3–
- 2ADTS2
- 1ADTS1
- 0ADTS0
2 fields
| Field | Bits | What it does |
|---|
| ADLAR | 7 | Left Adjustment for ADC Result Readout |
| ADTS | 2:0 | ADC Auto Trigger Source bits0 Free Running mode1 Analog Comparator2 External Interrupt Request 03 Timer/Counter0 Compare Match A4 Timer/Counter0 Overflow5 Timer/Counter0 Compare Match B6 Pin Change Interrupt 0 Request7 Timer/Counter0 Capture Event
|
ADCSRAThe ADC Control and Status register A
- Address
0x1D
- Reset
0x00
- Access
- read/write
- 7ADEN
- 6ADSC
- 5ADATE
- 4ADIF
- 3ADIE
- 2ADPS2
- 1ADPS1
- 0ADPS0
6 fields
| Field | Bits | What it does |
|---|
| ADEN | 7 | ADC Enable |
| ADSC | 6 | ADC Start Conversion |
| ADATE | 5 | ADC Auto Trigger Enable |
| ADIF | 4 | ADC Interrupt Flag |
| ADIE | 3 | ADC Interrupt Enable |
| ADPS | 2:0 | ADC Prescaler Select Bits0 21 22 43 84 165 326 647 128
|
TC0 Timer/Counter, 16-bit
ICR0Input Capture Register Bytes
- Address
0x22 I/O 0x02
- Reset
0x0000
- Access
- read/write
- Size
- 16-bit
OCR0BTimer/Counter0 Output Compare Register B
- Address
0x24 I/O 0x04
- Reset
0x0000
- Access
- read/write
- Size
- 16-bit
OCR0ATimer/Counter 0 Output Compare Register A
- Address
0x26 I/O 0x06
- Reset
0x0000
- Access
- read/write
- Size
- 16-bit
TCNT0Timer/Counter0
- Address
0x28 I/O 0x08
- Reset
0x0000
- Access
- read/write
- Size
- 16-bit
TIFR0Overflow Interrupt Enable
- Address
0x2A I/O 0x0A
- Reset
0x00
- Access
- read/write
- 7–
- 6–
- 5ICF0
- 4–
- 3–
- 2OCF0B
- 1OCF0A
- 0TOV0
4 fields
| Field | Bits | What it does |
|---|
| ICF0 | 5 | Input Capture Flag |
| OCF0B | 2 | Timer Output Compare Flag 0B |
| OCF0A | 1 | Timer Output Compare Flag 0A |
| TOV0 | 0 | Timer Overflow Flag |
TIMSK0Timer Interrupt Mask Register 0
- Address
0x2B I/O 0x0B
- Reset
0x00
- Access
- read/write
- 7–
- 6–
- 5ICIE0
- 4–
- 3–
- 2OCIE0B
- 1OCIE0A
- 0TOIE0
4 fields
| Field | Bits | What it does |
|---|
| ICIE0 | 5 | Input Capture Interrupt Enable |
| OCIE0B | 2 | Output Compare B Match Interrupt Enable |
| OCIE0A | 1 | Output Compare A Match Interrupt Enable |
| TOIE0 | 0 | Overflow Interrupt Enable |
TCCR0CTimer/Counter 0 Control Register C
- Address
0x2C I/O 0x0C
- Reset
0x00
- Access
- read/write
- 7FOC0A
- 6FOC0B
- 5–
- 4–
- 3–
- 2–
- 1–
- 0–
2 fields
| Field | Bits | What it does |
|---|
| FOC0A | 7 | Force Output Compare for Channel A |
| FOC0B | 6 | Force Output Compare for Channel B |
TCCR0BTimer/Counter 0 Control Register B
- Address
0x2D I/O 0x0D
- Reset
0x00
- Access
- read/write
- 7ICNC0
- 6ICES0
- 5–
- 4WGM01
- 3WGM00
- 2CS02
- 1CS01
- 0CS00
4 fields
| Field | Bits | What it does |
|---|
| ICNC0 | 7 | Input Capture Noise Canceler |
| ICES0 | 6 | Input Capture Edge Select |
| WGM0 | 4:3 | Waveform Generation Mode |
| CS0 | 2:0 | Clock Select0 No Clock Source (Stopped)1 Running, No Prescaling2 Running, CLK/83 Running, CLK/644 Running, CLK/2565 Running, CLK/10246 Running, ExtClk Tn Falling Edge7 Running, ExtClk Tn Rising Edge
|
TCCR0ATimer/Counter 0 Control Register A
- Address
0x2E I/O 0x0E
- Reset
0x00
- Access
- read/write
- 7COM0A1
- 6COM0A0
- 5COM0B1
- 4COM0B0
- 3–
- 2–
- 1WGM01
- 0WGM00
3 fields
| Field | Bits | What it does |
|---|
| COM0A | 7:6 | Compare Output Mode for Channel A bits |
| COM0B | 5:4 | Compare Output Mode for Channel B bits |
| WGM0 | 1:0 | Waveform Generation Mode |
GTCCRGeneral Timer/Counter Control Register
- Address
0x2F I/O 0x0F
- Reset
0x00
- Access
- read/write
- 7TSM
- 6–
- 5–
- 4–
- 3–
- 2–
- 1REMAP
- 0PSR
3 fields
| Field | Bits | What it does |
|---|
| TSM | 7 | Timer Synchronization Mode |
| REMAP | 1 | Remap Bit for 14 pin part only |
| PSR | 0 | Prescaler Reset |
WDT Watchdog Timer
WDTCSRWatchdog Timer Control and Status Register
- Address
0x31 I/O 0x11
- Reset
0x00
- Access
- read/write
- 7WDIF
- 6WDIE
- 5WDP5
- 4–
- 3WDE
- 2WDP2
- 1WDP1
- 0WDP0
4 fields
| Field | Bits | What it does |
|---|
| WDIF | 7 | Watchdog Timer Interrupt Flag |
| WDIE | 6 | Watchdog Timer Interrupt Enable |
| WDP | 5,2,1,0 | Watchdog Timer Prescaler Bits0 Oscillator Cycles 2K1 Oscillator Cycles 4K2 Oscillator Cycles 8K3 Oscillator Cycles 16K4 Oscillator Cycles 32K5 Oscillator Cycles 64K6 Oscillator Cycles 128K7 Oscillator Cycles 256K8 Oscillator Cycles 512K9 Oscillator Cycles 1024K
|
| WDE | 3 | Watch Dog Enable |
CPU CPU Registers
NVMCSRNon-Volatile Memory Control and Status Register
- Address
0x32 I/O 0x12
- Reset
0x00
- Access
- read/write
- 7NVMBSY
- 6–
- 5–
- 4–
- 3–
- 2–
- 1–
- 0–
1 field
| Field | Bits | What it does |
|---|
| NVMBSY | 7 | Non-Volatile Memory Busy |
NVMCMDNon-Volatile Memory Command
- Address
0x33 I/O 0x13
- Reset
0x00
- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2–
- 1–
- 0–
VLMCSRVcc Level Monitoring Control and Status Register
- Address
0x34 I/O 0x14
- Reset
0x00
- Access
- read/write
- 7VLMF
- 6VLMIE
- 5–
- 4–
- 3–
- 2VLM2
- 1VLM1
- 0VLM0
3 fields
| Field | Bits | What it does |
|---|
| VLMF | 7 | VLM Flag |
| VLMIE | 6 | VLM Interrupt Enable |
| VLM | 2:0 | Trigger Level of Voltage Level Monitor bits |
PRRPower Reduction Register
- Address
0x35 I/O 0x15
- Reset
0x00
- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2PRUSART
- 1PRADC
- 0PRTIM0
3 fields
| Field | Bits | What it does |
|---|
| PRUSART | 2 | Power Reduction USART |
| PRADC | 1 | Power Reduction ADC |
| PRTIM0 | 0 | Power Reduction Timer/Counter0 |
CLKPSRClock Prescale Register
- Address
0x36 I/O 0x16
- Reset
0x00
- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3CLKPS3
- 2CLKPS2
- 1CLKPS1
- 0CLKPS0
1 field
| Field | Bits | What it does |
|---|
| CLKPS | 3:0 | Clock Prescaler Select Bits0 11 22 43 84 165 326 647 1288 256
|
CLKMSRClock Main Settings Register
- Address
0x37 I/O 0x17
- Reset
0x00
- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2–
- 1CLKMS1
- 0CLKMS0
1 field
| Field | Bits | What it does |
|---|
| CLKMS | 1:0 | Clock Main Select Bits |
OSCCALOscillator Calibration Value
- Address
0x39 I/O 0x19
- Reset
0x00
- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2–
- 1–
- 0–
SMCRSleep Mode Control Register
- Address
0x3A I/O 0x1A
- Reset
0x00
- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3SM2
- 2SM1
- 1SM0
- 0SE
2 fields
| Field | Bits | What it does |
|---|
| SM | 3:1 | Sleep Mode Select Bits0 Idle1 ADC Noise Reduction2 Power Down3 Reserved4 Standby5 Reserved6 Reserved7 Reserved
|
| SE | 0 | Sleep Enable |
RSTFLRReset Flag Register
- Address
0x3B I/O 0x1B
- Reset
0x00
- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3WDRF
- 2–
- 1EXTRF
- 0PORF
3 fields
| Field | Bits | What it does |
|---|
| WDRF | 3 | Watchdog Reset Flag |
| EXTRF | 1 | External Reset Flag |
| PORF | 0 | Power-on Reset Flag |
CCPConfiguration Change Protection
- Address
0x3C I/O 0x1C
- Reset
0x00
- Access
- read/write
- 7CCP7
- 6CCP6
- 5CCP5
- 4CCP4
- 3CCP3
- 2CCP2
- 1CCP1
- 0CCP0
1 field
| Field | Bits | What it does |
|---|
| CCP | 7:0 | CCP signature216 IO Register Protection231 SPM Instruction Protection
|
SPStack Pointer
- Address
0x3D I/O 0x1D
- Reset
0x005F
- Access
- read/write
- Size
- 16-bit
SREGStatus Register
- Address
0x3F I/O 0x1F
- Reset
0x00
- Access
- read/write
- 7I
- 6T
- 5H
- 4S
- 3V
- 2N
- 1Z
- 0C
8 fields
| Field | Bits | What it does |
|---|
| I | 7 | Global Interrupt Enable |
| T | 6 | Bit Copy Storage |
| H | 5 | Half Carry Flag |
| S | 4 | Sign Bit |
| V | 3 | Two's Complement Overflow Flag |
| N | 2 | Negative Flag |
| Z | 1 | Zero Flag |
| C | 0 | Carry Flag |