AI Interactive Datasheet ATtiny412
AVR · AVR TINY

ATtiny412 registers

All 316 registers by peripheral, at their data-space address (the I/O address IN and OUT use is shown beside it), with their reset value and every bit.

VPORTA Virtual Ports

DIRData Direction

Address
0x00 I/O 0x00
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

OUTOutput Value

Address
0x01 I/O 0x01
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

INInput Value

Address
0x02 I/O 0x02
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

INTFLAGSInterrupt Flags

Address
0x03 I/O 0x03
Reset
0x00
Access
read/write
  1. 7INT7
  2. 6INT6
  3. 5INT5
  4. 4INT4
  5. 3INT3
  6. 2INT2
  7. 1INT1
  8. 0INT0
1 field
FieldBitsWhat it does
INT7:0Pin Interrupt

VPORTB Virtual Ports

DIRData Direction

Address
0x04 I/O 0x04
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

OUTOutput Value

Address
0x05 I/O 0x05
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

INInput Value

Address
0x06 I/O 0x06
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

INTFLAGSInterrupt Flags

Address
0x07 I/O 0x07
Reset
0x00
Access
read/write
  1. 7INT7
  2. 6INT6
  3. 5INT5
  4. 4INT4
  5. 3INT3
  6. 2INT2
  7. 1INT1
  8. 0INT0
1 field
FieldBitsWhat it does
INT7:0Pin Interrupt

VPORTC Virtual Ports

DIRData Direction

Address
0x08 I/O 0x08
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

OUTOutput Value

Address
0x09 I/O 0x09
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

INInput Value

Address
0x0A I/O 0x0A
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

INTFLAGSInterrupt Flags

Address
0x0B I/O 0x0B
Reset
0x00
Access
read/write
  1. 7INT7
  2. 6INT6
  3. 5INT5
  4. 4INT4
  5. 3INT3
  6. 2INT2
  7. 1INT1
  8. 0INT0
1 field
FieldBitsWhat it does
INT7:0Pin Interrupt

GPIO General Purpose IO

GPIOR0General Purpose IO Register 0

Address
0x1C I/O 0x1C
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

GPIOR1General Purpose IO Register 1

Address
0x1D I/O 0x1D
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

GPIOR2General Purpose IO Register 2

Address
0x1E I/O 0x1E
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

GPIOR3General Purpose IO Register 3

Address
0x1F I/O 0x1F
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

CPU CPU

CCPConfiguration Change Protection

Address
0x34 I/O 0x34
Reset
0x00
Access
read/write
  1. 7CCP7
  2. 6CCP6
  3. 5CCP5
  4. 4CCP4
  5. 3CCP3
  6. 2CCP2
  7. 1CCP1
  8. 0CCP0
1 field
FieldBitsWhat it does
CCP7:0CCP signature
  • 157 SPM Instruction Protection
  • 216 IO Register Protection

SPLStack Pointer Low

Address
0x3D I/O 0x3D
Reset
0xFF
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

SPHStack Pointer High

Address
0x3E I/O 0x3E
Reset
0x3F
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

SREGStatus Register

Address
0x3F I/O 0x3F
Reset
0x00
Access
read/write
  1. 7I
  2. 6T
  3. 5H
  4. 4S
  5. 3V
  6. 2N
  7. 1Z
  8. 0C
8 fields
FieldBitsWhat it does
I7Global Interrupt Enable Flag
T6Transfer Bit
H5Half Carry Flag
S4N Exclusive Or V Flag
V3Two's Complement Overflow Flag
N2Negative Flag
Z1Zero Flag
C0Carry Flag

RSTCTRL Reset controller

RSTFRReset Flags

Address
0x40
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5UPDIRF
  4. 4SWRF
  5. 3WDRF
  6. 2EXTRF
  7. 1BORF
  8. 0PORF
6 fields
FieldBitsWhat it does
UPDIRF5UPDI Reset flag
SWRF4Software Reset flag
WDRF3Watch dog Reset flag
EXTRF2External Reset flag
BORF1Brown out detector Reset flag
PORF0Power on Reset flag

SWRRSoftware Reset

Address
0x41
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0SWRE
1 field
FieldBitsWhat it does
SWRE0Software reset enable

SLPCTRL Sleep Controller

CTRLAControl

Address
0x50
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2SMODE1
  7. 1SMODE0
  8. 0SEN
2 fields
FieldBitsWhat it does
SMODE2:1Sleep mode
  • 0 Idle mode
  • 1 Standby Mode
  • 2 Power-down Mode
SEN0Sleep enable

CLKCTRL Clock controller

MCLKCTRLAMCLK Control A

Address
0x60
Reset
0x00
Access
read/write
  1. 7CLKOUT
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1CLKSEL1
  8. 0CLKSEL0
2 fields
FieldBitsWhat it does
CLKOUT7System clock out
CLKSEL1:0Clock select
  • 0 20MHz internal oscillator
  • 1 32KHz internal Ultra Low Power oscillator
  • 2 32.768kHz external crystal oscillator
  • 3 External clock

MCLKCTRLBMCLK Control B

Address
0x61
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4PDIV3
  5. 3PDIV2
  6. 2PDIV1
  7. 1PDIV0
  8. 0PEN
2 fields
FieldBitsWhat it does
PDIV4:1Prescaler division
  • 0 2X
  • 1 4X
  • 2 8X
  • 3 16X
  • 4 32X
  • 5 64X
  • 8 6X
  • 9 10X
  • 10 12X
  • 11 24X
  • 12 48X
PEN0Prescaler enable

MCLKLOCKMCLK Lock

Address
0x62
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0LOCKEN
1 field
FieldBitsWhat it does
LOCKEN0lock ebable

MCLKSTATUSMCLK Status

Address
0x63
Reset
0x00
Access
read only
  1. 7EXTS
  2. 6XOSC32KS
  3. 5OSC32KS
  4. 4OSC20MS
  5. 3–
  6. 2–
  7. 1–
  8. 0SOSC
5 fields
FieldBitsWhat it does
EXTS7External Clock status
XOSC32KS632.768 kHz Crystal Oscillator status
OSC32KS532KHz oscillator status
OSC20MS420MHz oscillator status
SOSC0System Oscillator changing

OSC20MCTRLAOSC20M Control A

Address
0x70
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1RUNSTDBY
  8. 0–
1 field
FieldBitsWhat it does
RUNSTDBY1Run standby

OSC20MCALIBAOSC20M Calibration A

Address
0x71
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5CAL20M5
  4. 4CAL20M4
  5. 3CAL20M3
  6. 2CAL20M2
  7. 1CAL20M1
  8. 0CAL20M0
1 field
FieldBitsWhat it does
CAL20M5:0Calibration

OSC20MCALIBBOSC20M Calibration B

Address
0x72
Reset
0x00
Access
read/write
  1. 7LOCK
  2. 6–
  3. 5–
  4. 4–
  5. 3TEMPCAL20M3
  6. 2TEMPCAL20M2
  7. 1TEMPCAL20M1
  8. 0TEMPCAL20M0
2 fields
FieldBitsWhat it does
LOCK7Lock
TEMPCAL20M3:0Oscillator temperature coefficient

OSC32KCTRLAOSC32K Control A

Address
0x78
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1RUNSTDBY
  8. 0–
1 field
FieldBitsWhat it does
RUNSTDBY1Run standby

XOSC32KCTRLAXOSC32K Control A

Address
0x7C
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5CSUT1
  4. 4CSUT0
  5. 3–
  6. 2SEL
  7. 1RUNSTDBY
  8. 0ENABLE
4 fields
FieldBitsWhat it does
CSUT5:4Crystal startup time
  • 0 1K cycles
  • 1 16K cycles
  • 2 32K cycles
  • 3 64K cycles
SEL2Select
RUNSTDBY1Run standby
ENABLE0Enable

BOD Bod interface

CTRLAControl A

Address
0x80
Reset
0x05
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4SAMPFREQ
  5. 3ACTIVE1
  6. 2ACTIVE0
  7. 1SLEEP1
  8. 0SLEEP0
3 fields
FieldBitsWhat it does
SAMPFREQ4Sample frequency
  • 0 1kHz sampling
  • 1 125Hz sampling
ACTIVE3:2Operation in active mode
  • 0 Disabled
  • 1 Enabled
  • 2 Sampled
  • 3 Enabled with wakeup halt
SLEEP1:0Operation in sleep mode
  • 0 Disabled
  • 1 Enabled
  • 2 Sampled

CTRLBControl B

Address
0x81
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2LVL2
  7. 1LVL1
  8. 0LVL0
1 field
FieldBitsWhat it does
LVL2:0Bod level
  • 0 1.8 V
  • 2 2.6 V
  • 7 4.2 V

VLMCTRLAVoltage level monitor Control

Address
0x88
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1VLMLVL1
  8. 0VLMLVL0
1 field
FieldBitsWhat it does
VLMLVL1:0voltage level monitor level
  • 0 VLM threshold 5% above BOD level
  • 1 VLM threshold 15% above BOD level
  • 2 VLM threshold 25% above BOD level

INTCTRLVoltage level monitor interrupt Control

Address
0x89
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2VLMCFG1
  7. 1VLMCFG0
  8. 0VLMIE
2 fields
FieldBitsWhat it does
VLMCFG2:1Configuration
  • 0 Interrupt when supply goes below VLM level
  • 1 Interrupt when supply goes above VLM level
  • 2 Interrupt when supply crosses VLM level
VLMIE0voltage level monitor interrrupt enable

INTFLAGSVoltage level monitor interrupt Flags

Address
0x8A
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0VLMIF
1 field
FieldBitsWhat it does
VLMIF0Voltage level monitor interrupt flag

STATUSVoltage level monitor status

Address
0x8B
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0VLMS
1 field
FieldBitsWhat it does
VLMS0Voltage level monitor status

VREF Voltage reference

CTRLAControl A

Address
0xA0
Reset
0x00
Access
read/write
  1. 7–
  2. 6ADC0REFSEL2
  3. 5ADC0REFSEL1
  4. 4ADC0REFSEL0
  5. 3–
  6. 2DAC0REFSEL2
  7. 1DAC0REFSEL1
  8. 0DAC0REFSEL0
2 fields
FieldBitsWhat it does
ADC0REFSEL6:4ADC0 reference select
  • 0 Voltage reference at 0.55V
  • 1 Voltage reference at 1.1V
  • 2 Voltage reference at 2.5V
  • 3 Voltage reference at 4.34V
  • 4 Voltage reference at 1.5V
DAC0REFSEL2:0DAC0/AC0 reference select
  • 0 Voltage reference at 0.55V
  • 1 Voltage reference at 1.1V
  • 2 Voltage reference at 2.5V
  • 3 Voltage reference at 4.34V
  • 4 Voltage reference at 1.5V

CTRLBControl B

Address
0xA1
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1ADC0REFEN
  8. 0DAC0REFEN
2 fields
FieldBitsWhat it does
ADC0REFEN1ADC0 reference enable
DAC0REFEN0DAC0/AC0 reference enable

WDT Watch-Dog Timer

CTRLAControl A

Address
0x100
Reset
0x00
Access
read/write
  1. 7WINDOW3
  2. 6WINDOW2
  3. 5WINDOW1
  4. 4WINDOW0
  5. 3PERIOD3
  6. 2PERIOD2
  7. 1PERIOD1
  8. 0PERIOD0
2 fields
FieldBitsWhat it does
WINDOW7:4Window
  • 0 Window mode off
  • 1 8 cycles (8ms)
  • 2 16 cycles (16ms)
  • 3 32 cycles (32ms)
  • 4 64 cycles (64ms)
  • 5 128 cycles (0.128s)
  • 6 256 cycles (0.256s)
  • 7 512 cycles (0.512s)
  • 8 1K cycles (1.0s)
  • 9 2K cycles (2.0s)
  • 10 4K cycles (4.1s)
  • 11 8K cycles (8.2s)
PERIOD3:0Period
  • 0 Watch-Dog timer Off
  • 1 8 cycles (8ms)
  • 2 16 cycles (16ms)
  • 3 32 cycles (32ms)
  • 4 64 cycles (64ms)
  • 5 128 cycles (0.128s)
  • 6 256 cycles (0.256s)
  • 7 512 cycles (0.512s)
  • 8 1K cycles (1.0s)
  • 9 2K cycles (2.0s)
  • 10 4K cycles (4.1s)
  • 11 8K cycles (8.2s)

STATUSStatus

Address
0x101
Reset
0x00
Access
read/write
  1. 7LOCK
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0SYNCBUSY
2 fields
FieldBitsWhat it does
LOCK7Lock enable
SYNCBUSY0Syncronization busy

CPUINT Interrupt Controller

CTRLAControl A

Address
0x110
Reset
0x00
Access
read/write
  1. 7–
  2. 6IVSEL
  3. 5CVT
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0LVL0RR
3 fields
FieldBitsWhat it does
IVSEL6Interrupt Vector Select
CVT5Compact Vector Table
LVL0RR0Round-robin Scheduling Enable

STATUSStatus

Address
0x111
Reset
0x00
Access
read/write
  1. 7NMIEX
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1LVL1EX
  8. 0LVL0EX
3 fields
FieldBitsWhat it does
NMIEX7Non-maskable Interrupt Executing
LVL1EX1Level 1 Interrupt Executing
LVL0EX0Level 0 Interrupt Executing

LVL0PRIInterrupt Level 0 Priority

Address
0x112
Reset
0x00
Access
read/write
  1. 7LVL0PRI7
  2. 6LVL0PRI6
  3. 5LVL0PRI5
  4. 4LVL0PRI4
  5. 3LVL0PRI3
  6. 2LVL0PRI2
  7. 1LVL0PRI1
  8. 0LVL0PRI0
1 field
FieldBitsWhat it does
LVL0PRI7:0Interrupt Level Priority

LVL1VECInterrupt Level 1 Priority Vector

Address
0x113
Reset
0x00
Access
read/write
  1. 7LVL1VEC7
  2. 6LVL1VEC6
  3. 5LVL1VEC5
  4. 4LVL1VEC4
  5. 3LVL1VEC3
  6. 2LVL1VEC2
  7. 1LVL1VEC1
  8. 0LVL1VEC0
1 field
FieldBitsWhat it does
LVL1VEC7:0Interrupt Vector with High Priority

CRCSCAN CRCSCAN

CTRLAControl A

Address
0x120
Reset
0x00
Access
read/write
  1. 7RESET
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1NMIEN
  8. 0ENABLE
3 fields
FieldBitsWhat it does
RESET7Reset CRC scan
NMIEN1Enable NMI Trigger
ENABLE0Enable CRC scan

CTRLBControl B

Address
0x121
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5MODE1
  4. 4MODE0
  5. 3–
  6. 2–
  7. 1SRC1
  8. 0SRC0
2 fields
FieldBitsWhat it does
MODE5:4CRC Flash Access Mode
  • 0 Priority to flash
SRC1:0CRC Source
  • 0 CRC on entire flash
  • 1 CRC on boot and appl section of flash
  • 2 CRC on boot section of flash

STATUSStatus

Address
0x122
Reset
0x00
Access
read only
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1OK
  8. 0BUSY
2 fields
FieldBitsWhat it does
OK1CRC Ok
BUSY0CRC Busy

RTC Real-Time Counter

CTRLAControl A

Address
0x140
Reset
0x00
Access
read/write
  1. 7RUNSTDBY
  2. 6PRESCALER3
  3. 5PRESCALER2
  4. 4PRESCALER1
  5. 3PRESCALER0
  6. 2–
  7. 1–
  8. 0RTCEN
3 fields
FieldBitsWhat it does
RUNSTDBY7Run In Standby
PRESCALER6:3Prescaling Factor
  • 0 RTC Clock / 1
  • 1 RTC Clock / 2
  • 2 RTC Clock / 4
  • 3 RTC Clock / 8
  • 4 RTC Clock / 16
  • 5 RTC Clock / 32
  • 6 RTC Clock / 64
  • 7 RTC Clock / 128
  • 8 RTC Clock / 256
  • 9 RTC Clock / 512
  • 10 RTC Clock / 1024
  • 11 RTC Clock / 2048
  • 12 RTC Clock / 4096
  • 13 RTC Clock / 8192
  • 14 RTC Clock / 16384
  • 15 RTC Clock / 32768
RTCEN0Enable

STATUSStatus

Address
0x141
Reset
0x00
Access
read only
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3CMPBUSY
  6. 2PERBUSY
  7. 1CNTBUSY
  8. 0CTRLABUSY
4 fields
FieldBitsWhat it does
CMPBUSY3Comparator Synchronization Busy Flag
PERBUSY2Period Synchronization Busy Flag
CNTBUSY1Count Synchronization Busy Flag
CTRLABUSY0CTRLA Synchronization Busy Flag

INTCTRLInterrupt Control

Address
0x142
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1CMP
  8. 0OVF
2 fields
FieldBitsWhat it does
CMP1Compare Match Interrupt enable
OVF0Overflow Interrupt enable

INTFLAGSInterrupt Flags

Address
0x143
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1CMP
  8. 0OVF
2 fields
FieldBitsWhat it does
CMP1Compare Match Interrupt
OVF0Overflow Interrupt Flag

TEMPTemporary

Address
0x144
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

DBGCTRLDebug control

Address
0x145
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0DBGRUN
1 field
FieldBitsWhat it does
DBGRUN0Run in debug

CLKSELClock Select

Address
0x147
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1CLKSEL1
  8. 0CLKSEL0
1 field
FieldBitsWhat it does
CLKSEL1:0Clock Select
  • 0 Internal 32kHz OSC
  • 1 Internal 1kHz OSC
  • 2 32KHz Crystal OSC
  • 3 External Clock

CNTCounter

Address
0x148
Reset
0x0000
Access
read/write
Size
16-bit

PERPeriod

Address
0x14A
Reset
0x0000
Access
read/write
Size
16-bit

CMPCompare

Address
0x14C
Reset
0x0000
Access
read/write
Size
16-bit

PITCTRLAPIT Control A

Address
0x150
Reset
0x00
Access
read/write
  1. 7–
  2. 6PERIOD3
  3. 5PERIOD2
  4. 4PERIOD1
  5. 3PERIOD0
  6. 2–
  7. 1–
  8. 0PITEN
2 fields
FieldBitsWhat it does
PERIOD6:3Period
  • 0 Off
  • 1 RTC Clock Cycles 4
  • 2 RTC Clock Cycles 8
  • 3 RTC Clock Cycles 16
  • 4 RTC Clock Cycles 32
  • 5 RTC Clock Cycles 64
  • 6 RTC Clock Cycles 128
  • 7 RTC Clock Cycles 256
  • 8 RTC Clock Cycles 512
  • 9 RTC Clock Cycles 1024
  • 10 RTC Clock Cycles 2048
  • 11 RTC Clock Cycles 4096
  • 12 RTC Clock Cycles 8192
  • 13 RTC Clock Cycles 16384
  • 14 RTC Clock Cycles 32768
PITEN0Enable

PITSTATUSPIT Status

Address
0x151
Reset
0x00
Access
read only
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0CTRLBUSY
1 field
FieldBitsWhat it does
CTRLBUSY0CTRLA Synchronization Busy Flag

PITINTCTRLPIT Interrupt Control

Address
0x152
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0PI
1 field
FieldBitsWhat it does
PI0Periodic Interrupt

PITINTFLAGSPIT Interrupt Flags

Address
0x153
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0PI
1 field
FieldBitsWhat it does
PI0Periodic Interrupt

PITDBGCTRLPIT Debug control

Address
0x155
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0DBGRUN
1 field
FieldBitsWhat it does
DBGRUN0Run in debug

EVSYS Event System

ASYNCSTROBEAsynchronous Channel Strobe

Address
0x180
Reset
0x00
Access
write only
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

SYNCSTROBESynchronous Channel Strobe

Address
0x181
Reset
0x00
Access
write only
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

ASYNCCH0Asynchronous Channel 0 Generator Selection

Address
0x182
Reset
0x00
Access
read/write
  1. 7ASYNCCH07
  2. 6ASYNCCH06
  3. 5ASYNCCH05
  4. 4ASYNCCH04
  5. 3ASYNCCH03
  6. 2ASYNCCH02
  7. 1ASYNCCH01
  8. 0ASYNCCH00
1 field
FieldBitsWhat it does
ASYNCCH07:0Asynchronous Channel 0 Generator Selection
  • 0 Off
  • 1 Configurable Custom Logic LUT0
  • 2 Configurable Custom Logic LUT1
  • 3 Analog Comparator 0 out
  • 4 Timer/Counter D0 compare B clear
  • 5 Timer/Counter D0 compare A set
  • 6 Timer/Counter D0 compare B set
  • 7 Timer/Counter D0 program event
  • 8 Real Time Counter overflow
  • 9 Real Time Counter compare
  • 10 Asynchronous Event from Pin PA0
  • 11 Asynchronous Event from Pin PA1
  • 12 Asynchronous Event from Pin PA2
  • 13 Asynchronous Event from Pin PA3
  • 14 Asynchronous Event from Pin PA4
  • 15 Asynchronous Event from Pin PA5
  • 16 Asynchronous Event from Pin PA6
  • 17 Asynchronous Event from Pin PA7
  • 18 Unified Program and debug interface

ASYNCCH1Asynchronous Channel 1 Generator Selection

Address
0x183
Reset
0x00
Access
read/write
  1. 7ASYNCCH17
  2. 6ASYNCCH16
  3. 5ASYNCCH15
  4. 4ASYNCCH14
  5. 3ASYNCCH13
  6. 2ASYNCCH12
  7. 1ASYNCCH11
  8. 0ASYNCCH10
1 field
FieldBitsWhat it does
ASYNCCH17:0Asynchronous Channel 1 Generator Selection
  • 0 Off
  • 1 Configurable custom logic LUT0
  • 2 Configurable custom logic LUT1
  • 3 Analog Comparator 0 out
  • 4 Timer/Counter D0 compare B clear
  • 5 Timer/Counter D0 compare A set
  • 6 Timer/Counter D0 compare B set
  • 7 Timer/Counter D0 program event
  • 8 Real Time Counter overflow
  • 9 Real Time Counter compare
  • 10 Asynchronous Event from Pin PB0
  • 11 Asynchronous Event from Pin PB1
  • 12 Asynchronous Event from Pin PB2
  • 13 Asynchronous Event from Pin PB3
  • 14 Asynchronous Event from Pin PB4
  • 15 Asynchronous Event from Pin PB5
  • 16 Asynchronous Event from Pin PB6
  • 17 Asynchronous Event from Pin PB7

ASYNCCH2Asynchronous Channel 2 Generator Selection

Address
0x184
Reset
0x00
Access
read/write
  1. 7ASYNCCH27
  2. 6ASYNCCH26
  3. 5ASYNCCH25
  4. 4ASYNCCH24
  5. 3ASYNCCH23
  6. 2ASYNCCH22
  7. 1ASYNCCH21
  8. 0ASYNCCH20
1 field
FieldBitsWhat it does
ASYNCCH27:0Asynchronous Channel 2 Generator Selection
  • 0 Off
  • 1 Configurable Custom Logic LUT0
  • 2 Configurable Custom Logic LUT1
  • 3 Analog Comparator 0 out
  • 4 Timer/Counter D0 compare B clear
  • 5 Timer/Counter D0 compare A set
  • 6 Timer/Counter D0 compare B set
  • 7 Timer/Counter D0 program event
  • 8 Real Time Counter overflow
  • 9 Real Time Counter compare
  • 10 Asynchronous Event from Pin PC0
  • 11 Asynchronous Event from Pin PC1
  • 12 Asynchronous Event from Pin PC2
  • 13 Asynchronous Event from Pin PC3
  • 14 Asynchronous Event from Pin PC4
  • 15 Asynchronous Event from Pin PC5

ASYNCCH3Asynchronous Channel 3 Generator Selection

Address
0x185
Reset
0x00
Access
read/write
  1. 7ASYNCCH37
  2. 6ASYNCCH36
  3. 5ASYNCCH35
  4. 4ASYNCCH34
  5. 3ASYNCCH33
  6. 2ASYNCCH32
  7. 1ASYNCCH31
  8. 0ASYNCCH30
1 field
FieldBitsWhat it does
ASYNCCH37:0Asynchronous Channel 3 Generator Selection
  • 0 Off
  • 1 Configurable custom logic LUT0
  • 2 Configurable custom logic LUT1
  • 3 Analog Comparator 0 out
  • 4 Timer/Counter type D compare B clear
  • 5 Timer/Counter type D compare A set
  • 6 Timer/Counter type D compare B set
  • 7 Timer/Counter type D program event
  • 8 Real Time Counter overflow
  • 9 Real Time Counter compare
  • 10 Periodic Interrupt CLK_RTC div 8192
  • 11 Periodic Interrupt CLK_RTC div 4096
  • 12 Periodic Interrupt CLK_RTC div 2048
  • 13 Periodic Interrupt CLK_RTC div 1024
  • 14 Periodic Interrupt CLK_RTC div 512
  • 15 Periodic Interrupt CLK_RTC div 256
  • 16 Periodic Interrupt CLK_RTC div 128
  • 17 Periodic Interrupt CLK_RTC div 64

SYNCCH0Synchronous Channel 0 Generator Selection

Address
0x18A
Reset
0x00
Access
read/write
  1. 7SYNCCH07
  2. 6SYNCCH06
  3. 5SYNCCH05
  4. 4SYNCCH04
  5. 3SYNCCH03
  6. 2SYNCCH02
  7. 1SYNCCH01
  8. 0SYNCCH00
1 field
FieldBitsWhat it does
SYNCCH07:0Synchronous Channel 0 Generator Selection
  • 0 Off
  • 1 Timer/Counter B0
  • 2 Timer/Counter A0 overflow
  • 3 Timer/Counter A0 underflow high byte (split mode)
  • 4 Timer/Counter A0 compare 0
  • 5 Timer/Counter A0 compare 1
  • 6 Timer/Counter A0 compare 2
  • 7 Synchronous Event from Pin PC0
  • 8 Synchronous Event from Pin PC1
  • 9 Synchronous Event from Pin PC2
  • 10 Synchronous Event from Pin PC3
  • 11 Synchronous Event from Pin PC4
  • 12 Synchronous Event from Pin PC5
  • 13 Synchronous Event from Pin PA0
  • 14 Synchronous Event from Pin PA1
  • 15 Synchronous Event from Pin PA2
  • 16 Synchronous Event from Pin PA3
  • 17 Synchronous Event from Pin PA4
  • 18 Synchronous Event from Pin PA5
  • 19 Synchronous Event from Pin PA6
  • 20 Synchronous Event from Pin PA7

SYNCCH1Synchronous Channel 1 Generator Selection

Address
0x18B
Reset
0x00
Access
read/write
  1. 7SYNCCH17
  2. 6SYNCCH16
  3. 5SYNCCH15
  4. 4SYNCCH14
  5. 3SYNCCH13
  6. 2SYNCCH12
  7. 1SYNCCH11
  8. 0SYNCCH10
1 field
FieldBitsWhat it does
SYNCCH17:0Synchronous Channel 1 Generator Selection
  • 0 Off
  • 1 Timer/Counter B0
  • 2 Timer/Counter A0 overflow
  • 3 Timer/Counter A0 underflow high byte (split mode)
  • 4 Timer/Counter A0 compare 0
  • 5 Timer/Counter A0 compare 1
  • 6 Timer/Counter A0 compare 2
  • 8 Synchronous Event from Pin PB0
  • 9 Synchronous Event from Pin PB1
  • 10 Synchronous Event from Pin PB2
  • 11 Synchronous Event from Pin PB3
  • 12 Synchronous Event from Pin PB4
  • 13 Synchronous Event from Pin PB5
  • 14 Synchronous Event from Pin PB6
  • 15 Synchronous Event from Pin PB7

ASYNCUSER0Asynchronous User Ch 0 Input Selection - TCB0

Address
0x192
Reset
0x00
Access
read/write
  1. 7ASYNCUSER07
  2. 6ASYNCUSER06
  3. 5ASYNCUSER05
  4. 4ASYNCUSER04
  5. 3ASYNCUSER03
  6. 2ASYNCUSER02
  7. 1ASYNCUSER01
  8. 0ASYNCUSER00
1 field
FieldBitsWhat it does
ASYNCUSER07:0Asynchronous User Ch 0 Input Selection - TCB0
  • 0 Off
  • 1 Synchronous Event Channel 0
  • 2 Synchronous Event Channel 1
  • 3 Asynchronous Event Channel 0
  • 4 Asynchronous Event Channel 1
  • 5 Asynchronous Event Channel 2
  • 6 Asynchronous Event Channel 3

ASYNCUSER1Asynchronous User Ch 1 Input Selection - ADC0

Address
0x193
Reset
0x00
Access
read/write
  1. 7ASYNCUSER17
  2. 6ASYNCUSER16
  3. 5ASYNCUSER15
  4. 4ASYNCUSER14
  5. 3ASYNCUSER13
  6. 2ASYNCUSER12
  7. 1ASYNCUSER11
  8. 0ASYNCUSER10
1 field
FieldBitsWhat it does
ASYNCUSER17:0Asynchronous User Ch 1 Input Selection - ADC0
  • 0 Off
  • 1 Synchronous Event Channel 0
  • 2 Synchronous Event Channel 1
  • 3 Asynchronous Event Channel 0
  • 4 Asynchronous Event Channel 1
  • 5 Asynchronous Event Channel 2
  • 6 Asynchronous Event Channel 3

ASYNCUSER2Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0

Address
0x194
Reset
0x00
Access
read/write
  1. 7ASYNCUSER27
  2. 6ASYNCUSER26
  3. 5ASYNCUSER25
  4. 4ASYNCUSER24
  5. 3ASYNCUSER23
  6. 2ASYNCUSER22
  7. 1ASYNCUSER21
  8. 0ASYNCUSER20
1 field
FieldBitsWhat it does
ASYNCUSER27:0Asynchronous User Ch 2 Input Selection - CCL LUT0 Event 0
  • 0 Off
  • 1 Synchronous Event Channel 0
  • 2 Synchronous Event Channel 1
  • 3 Asynchronous Event Channel 0
  • 4 Asynchronous Event Channel 1
  • 5 Asynchronous Event Channel 2
  • 6 Asynchronous Event Channel 3

ASYNCUSER3Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0

Address
0x195
Reset
0x00
Access
read/write
  1. 7ASYNCUSER37
  2. 6ASYNCUSER36
  3. 5ASYNCUSER35
  4. 4ASYNCUSER34
  5. 3ASYNCUSER33
  6. 2ASYNCUSER32
  7. 1ASYNCUSER31
  8. 0ASYNCUSER30
1 field
FieldBitsWhat it does
ASYNCUSER37:0Asynchronous User Ch 3 Input Selection - CCL LUT1 Event 0
  • 0 Off
  • 1 Synchronous Event Channel 0
  • 2 Synchronous Event Channel 1
  • 3 Asynchronous Event Channel 0
  • 4 Asynchronous Event Channel 1
  • 5 Asynchronous Event Channel 2
  • 6 Asynchronous Event Channel 3

ASYNCUSER4Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1

Address
0x196
Reset
0x00
Access
read/write
  1. 7ASYNCUSER47
  2. 6ASYNCUSER46
  3. 5ASYNCUSER45
  4. 4ASYNCUSER44
  5. 3ASYNCUSER43
  6. 2ASYNCUSER42
  7. 1ASYNCUSER41
  8. 0ASYNCUSER40
1 field
FieldBitsWhat it does
ASYNCUSER47:0Asynchronous User Ch 4 Input Selection - CCL LUT0 Event 1
  • 0 Off
  • 1 Synchronous Event Channel 0
  • 2 Synchronous Event Channel 1
  • 3 Asynchronous Event Channel 0
  • 4 Asynchronous Event Channel 1
  • 5 Asynchronous Event Channel 2
  • 6 Asynchronous Event Channel 3

ASYNCUSER5Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1

Address
0x197
Reset
0x00
Access
read/write
  1. 7ASYNCUSER57
  2. 6ASYNCUSER56
  3. 5ASYNCUSER55
  4. 4ASYNCUSER54
  5. 3ASYNCUSER53
  6. 2ASYNCUSER52
  7. 1ASYNCUSER51
  8. 0ASYNCUSER50
1 field
FieldBitsWhat it does
ASYNCUSER57:0Asynchronous User Ch 5 Input Selection - CCL LUT1 Event 1
  • 0 Off
  • 1 Synchronous Event Channel 0
  • 2 Synchronous Event Channel 1
  • 3 Asynchronous Event Channel 0
  • 4 Asynchronous Event Channel 1
  • 5 Asynchronous Event Channel 2
  • 6 Asynchronous Event Channel 3

ASYNCUSER6Asynchronous User Ch 6 Input Selection - TCD0 Event 0

Address
0x198
Reset
0x00
Access
read/write
  1. 7ASYNCUSER67
  2. 6ASYNCUSER66
  3. 5ASYNCUSER65
  4. 4ASYNCUSER64
  5. 3ASYNCUSER63
  6. 2ASYNCUSER62
  7. 1ASYNCUSER61
  8. 0ASYNCUSER60
1 field
FieldBitsWhat it does
ASYNCUSER67:0Asynchronous User Ch 6 Input Selection - TCD0 Event 0
  • 0 Off
  • 1 Synchronous Event Channel 0
  • 2 Synchronous Event Channel 1
  • 3 Asynchronous Event Channel 0
  • 4 Asynchronous Event Channel 1
  • 5 Asynchronous Event Channel 2
  • 6 Asynchronous Event Channel 3

ASYNCUSER7Asynchronous User Ch 7 Input Selection - TCD0 Event 1

Address
0x199
Reset
0x00
Access
read/write
  1. 7ASYNCUSER77
  2. 6ASYNCUSER76
  3. 5ASYNCUSER75
  4. 4ASYNCUSER74
  5. 3ASYNCUSER73
  6. 2ASYNCUSER72
  7. 1ASYNCUSER71
  8. 0ASYNCUSER70
1 field
FieldBitsWhat it does
ASYNCUSER77:0Asynchronous User Ch 7 Input Selection - TCD0 Event 1
  • 0 Off
  • 1 Synchronous Event Channel 0
  • 2 Synchronous Event Channel 1
  • 3 Asynchronous Event Channel 0
  • 4 Asynchronous Event Channel 1
  • 5 Asynchronous Event Channel 2
  • 6 Asynchronous Event Channel 3

ASYNCUSER8Asynchronous User Ch 8 Input Selection - Event Out 0

Address
0x19A
Reset
0x00
Access
read/write
  1. 7ASYNCUSER87
  2. 6ASYNCUSER86
  3. 5ASYNCUSER85
  4. 4ASYNCUSER84
  5. 3ASYNCUSER83
  6. 2ASYNCUSER82
  7. 1ASYNCUSER81
  8. 0ASYNCUSER80
1 field
FieldBitsWhat it does
ASYNCUSER87:0Asynchronous User Ch 8 Input Selection - Event Out 0
  • 0 Off
  • 1 Synchronous Event Channel 0
  • 2 Synchronous Event Channel 1
  • 3 Asynchronous Event Channel 0
  • 4 Asynchronous Event Channel 1
  • 5 Asynchronous Event Channel 2
  • 6 Asynchronous Event Channel 3

ASYNCUSER9Asynchronous User Ch 9 Input Selection - Event Out 1

Address
0x19B
Reset
0x00
Access
read/write
  1. 7ASYNCUSER97
  2. 6ASYNCUSER96
  3. 5ASYNCUSER95
  4. 4ASYNCUSER94
  5. 3ASYNCUSER93
  6. 2ASYNCUSER92
  7. 1ASYNCUSER91
  8. 0ASYNCUSER90
1 field
FieldBitsWhat it does
ASYNCUSER97:0Asynchronous User Ch 9 Input Selection - Event Out 1
  • 0 Off
  • 1 Synchronous Event Channel 0
  • 2 Synchronous Event Channel 1
  • 3 Asynchronous Event Channel 0
  • 4 Asynchronous Event Channel 1
  • 5 Asynchronous Event Channel 2
  • 6 Asynchronous Event Channel 3

ASYNCUSER10Asynchronous User Ch 10 Input Selection - Event Out 2

Address
0x19C
Reset
0x00
Access
read/write
  1. 7ASYNCUSER107
  2. 6ASYNCUSER106
  3. 5ASYNCUSER105
  4. 4ASYNCUSER104
  5. 3ASYNCUSER103
  6. 2ASYNCUSER102
  7. 1ASYNCUSER101
  8. 0ASYNCUSER100
1 field
FieldBitsWhat it does
ASYNCUSER107:0Asynchronous User Ch 10 Input Selection - Event Out 2
  • 0 Off
  • 1 Synchronous Event Channel 0
  • 2 Synchronous Event Channel 1
  • 3 Asynchronous Event Channel 0
  • 4 Asynchronous Event Channel 1
  • 5 Asynchronous Event Channel 2
  • 6 Asynchronous Event Channel 3

SYNCUSER0Synchronous User Ch 0 Input Selection - TCA0

Address
0x1A2
Reset
0x00
Access
read/write
  1. 7SYNCUSER07
  2. 6SYNCUSER06
  3. 5SYNCUSER05
  4. 4SYNCUSER04
  5. 3SYNCUSER03
  6. 2SYNCUSER02
  7. 1SYNCUSER01
  8. 0SYNCUSER00
1 field
FieldBitsWhat it does
SYNCUSER07:0Synchronous User Ch 0 Input Selection - TCA0
  • 0 Off
  • 1 Synchronous Event Channel 0
  • 2 Synchronous Event Channel 1

SYNCUSER1Synchronous User Ch 1 Input Selection - USART0

Address
0x1A3
Reset
0x00
Access
read/write
  1. 7SYNCUSER17
  2. 6SYNCUSER16
  3. 5SYNCUSER15
  4. 4SYNCUSER14
  5. 3SYNCUSER13
  6. 2SYNCUSER12
  7. 1SYNCUSER11
  8. 0SYNCUSER10
1 field
FieldBitsWhat it does
SYNCUSER17:0Synchronous User Ch 1 Input Selection - USART0
  • 0 Off
  • 1 Synchronous Event Channel 0
  • 2 Synchronous Event Channel 1

CCL Configurable Custom Logic

CTRLAControl Register A

Address
0x1C0
Reset
0x00
Access
read/write
  1. 7–
  2. 6RUNSTDBY
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0ENABLE
2 fields
FieldBitsWhat it does
RUNSTDBY6Run in Standby
ENABLE0Enable

SEQCTRL0Sequential Control 0

Address
0x1C1
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2SEQSEL2
  7. 1SEQSEL1
  8. 0SEQSEL0
1 field
FieldBitsWhat it does
SEQSEL2:0Sequential Selection
  • 0 Sequential logic disabled
  • 1 D FlipFlop
  • 2 JK FlipFlop
  • 3 D Latch
  • 4 RS Latch

LUT0CTRLALUT Control 0 A

Address
0x1C5
Reset
0x00
Access
read/write
  1. 7EDGEDET
  2. 6CLKSRC
  3. 5FILTSEL1
  4. 4FILTSEL0
  5. 3OUTEN
  6. 2–
  7. 1–
  8. 0ENABLE
5 fields
FieldBitsWhat it does
EDGEDET7Edge Detection Enable
  • 0 Edge detector is disabled
  • 1 Edge detector is enabled
CLKSRC6Clock Source Selection
  • 0 CLK_PER is clocking the LUT
  • 1 IN[2] is clocking the LUT
FILTSEL5:4Filter Selection
  • 0 Filter disabled
  • 1 Synchronizer enabled
  • 2 Filter enabled
OUTEN3Output Enable
ENABLE0LUT Enable

LUT0CTRLBLUT Control 0 B

Address
0x1C6
Reset
0x00
Access
read/write
  1. 7INSEL13
  2. 6INSEL12
  3. 5INSEL11
  4. 4INSEL10
  5. 3INSEL03
  6. 2INSEL02
  7. 1INSEL01
  8. 0INSEL00
2 fields
FieldBitsWhat it does
INSEL17:4LUT Input 1 Source Selection
  • 0 Masked input
  • 1 Feedback input source
  • 2 Linked LUT input source
  • 3 Event input source 0
  • 4 Event input source 1
  • 5 IO pin LUTn-N1 input source
  • 6 AC0 OUT input source
  • 7 TCB0 WO input source
  • 8 TCA0 WO1 input source
  • 9 TCD0 WOB input source
  • 10 USART0 TXD input source
  • 11 SPI0 MOSI input source
INSEL03:0LUT Input 0 Source Selection
  • 0 Masked input
  • 1 Feedback input source
  • 2 Linked LUT input source
  • 3 Event input source 0
  • 4 Event input source 1
  • 5 IO pin LUTn-IN0 input source
  • 6 AC0 OUT input source
  • 7 TCB0 WO input source
  • 8 TCA0 WO0 input source
  • 9 TCD0 WOA input source
  • 10 USART0 XCK input source
  • 11 SPI0 SCK source

LUT0CTRLCLUT Control 0 C

Address
0x1C7
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3INSEL23
  6. 2INSEL22
  7. 1INSEL21
  8. 0INSEL20
1 field
FieldBitsWhat it does
INSEL23:0LUT Input 2 Source Selection
  • 0 Masked input
  • 1 Feedback input source
  • 2 Linked LUT input source
  • 3 Event input source 0
  • 4 Event input source 1
  • 5 IO pin LUTn-IN2 input source
  • 6 AC0 OUT input source
  • 7 TCB0 WO input source
  • 8 TCA0 WO2 input source
  • 9 TCD0 WOA input source
  • 11 SPI0 MISO source

TRUTH0Truth 0

Address
0x1C8
Reset
0x00
Access
read/write
  1. 7TRUTH7
  2. 6TRUTH6
  3. 5TRUTH5
  4. 4TRUTH4
  5. 3TRUTH3
  6. 2TRUTH2
  7. 1TRUTH1
  8. 0TRUTH0
1 field
FieldBitsWhat it does
TRUTH7:0Truth Table

LUT1CTRLALUT Control 1 A

Address
0x1C9
Reset
0x00
Access
read/write
  1. 7EDGEDET
  2. 6CLKSRC
  3. 5FILTSEL1
  4. 4FILTSEL0
  5. 3OUTEN
  6. 2–
  7. 1–
  8. 0ENABLE
5 fields
FieldBitsWhat it does
EDGEDET7Edge Detection Enable
  • 0 Edge detector is disabled
  • 1 Edge detector is enabled
CLKSRC6Clock Source Selection
  • 0 CLK_PER is clocking the LUT
  • 1 IN[2] is clocking the LUT
FILTSEL5:4Filter Selection
  • 0 Filter disabled
  • 1 Synchronizer enabled
  • 2 Filter enabled
OUTEN3Output Enable
ENABLE0LUT Enable

LUT1CTRLBLUT Control 1 B

Address
0x1CA
Reset
0x00
Access
read/write
  1. 7INSEL13
  2. 6INSEL12
  3. 5INSEL11
  4. 4INSEL10
  5. 3INSEL03
  6. 2INSEL02
  7. 1INSEL01
  8. 0INSEL00
2 fields
FieldBitsWhat it does
INSEL17:4LUT Input 1 Source Selection
  • 0 Masked input
  • 1 Feedback input source
  • 2 Linked LUT input source
  • 3 Event input source 0
  • 4 Event input source 1
  • 5 IO pin LUTn-N1 input source
  • 6 AC0 OUT input source
  • 7 TCB0 WO input source
  • 8 TCA0 WO1 input source
  • 9 TCD0 WOB input source
  • 10 USART0 TXD input source
  • 11 SPI0 MOSI input source
INSEL03:0LUT Input 0 Source Selection
  • 0 Masked input
  • 1 Feedback input source
  • 2 Linked LUT input source
  • 3 Event input source 0
  • 4 Event input source 1
  • 5 IO pin LUTn-IN0 input source
  • 6 AC0 OUT input source
  • 7 TCB0 WO input source
  • 8 TCA0 WO0 input source
  • 9 TCD0 WOA input source
  • 10 USART0 XCK input source
  • 11 SPI0 SCK source

LUT1CTRLCLUT Control 1 C

Address
0x1CB
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3INSEL23
  6. 2INSEL22
  7. 1INSEL21
  8. 0INSEL20
1 field
FieldBitsWhat it does
INSEL23:0LUT Input 2 Source Selection
  • 0 Masked input
  • 1 Feedback input source
  • 2 Linked LUT input source
  • 3 Event input source 0
  • 4 Event input source 1
  • 5 IO pin LUTn-IN2 input source
  • 6 AC0 OUT input source
  • 7 TCB0 WO input source
  • 8 TCA0 WO2 input source
  • 9 TCD0 WOA input source
  • 11 SPI0 MISO source

TRUTH1Truth 1

Address
0x1CC
Reset
0x00
Access
read/write
  1. 7TRUTH7
  2. 6TRUTH6
  3. 5TRUTH5
  4. 4TRUTH4
  5. 3TRUTH3
  6. 2TRUTH2
  7. 1TRUTH1
  8. 0TRUTH0
1 field
FieldBitsWhat it does
TRUTH7:0Truth Table

PORTMUX Port Multiplexer

CTRLAPort Multiplexer Control A

Address
0x200
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5LUT1
  4. 4LUT0
  5. 3–
  6. 2EVOUT2
  7. 1EVOUT1
  8. 0EVOUT0
5 fields
FieldBitsWhat it does
LUT15Configurable Custom Logic LUT1
  • 0 Default pin
  • 1 Alternate pin
LUT04Configurable Custom Logic LUT0
  • 0 Default pin
  • 1 Alternate pin
EVOUT22Event Output 2
EVOUT11Event Output 1
EVOUT00Event Output 0

CTRLBPort Multiplexer Control B

Address
0x201
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2SPI0
  7. 1–
  8. 0USART0
2 fields
FieldBitsWhat it does
SPI02Port Multiplexer SPI0
  • 0 Default pins
  • 1 Alternate pins
USART00Port Multiplexer USART0
  • 0 Default pins
  • 1 Alternate pins

CTRLCPort Multiplexer Control C

Address
0x202
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3TCA03
  6. 2TCA02
  7. 1TCA01
  8. 0TCA00
4 fields
FieldBitsWhat it does
TCA033Port Multiplexer TCA0 Output 3
  • 0 Default pin
  • 1 Alternate pin
TCA022Port Multiplexer TCA0 Output 2
  • 0 Default pin
  • 1 Alternate pin
TCA011Port Multiplexer TCA0 Output 1
  • 0 Default pin
  • 1 Alternate pin
TCA000Port Multiplexer TCA0 Output 0
  • 0 Default pin
  • 1 Alternate pin

CTRLDPort Multiplexer Control D

Address
0x203
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0TCB0
1 field
FieldBitsWhat it does
TCB00Port Multiplexer TCB
  • 0 Default pin
  • 1 Alternate pin

PORTA I/O Ports

DIRData Direction

Address
0x400
Reset
0x00
Access
read/write
  1. 7DIR7
  2. 6DIR6
  3. 5DIR5
  4. 4DIR4
  5. 3DIR3
  6. 2DIR2
  7. 1DIR1
  8. 0DIR0

DIRSETData Direction Set

Address
0x401
Reset
0x00
Access
read/write
  1. 7DIRSET7
  2. 6DIRSET6
  3. 5DIRSET5
  4. 4DIRSET4
  5. 3DIRSET3
  6. 2DIRSET2
  7. 1DIRSET1
  8. 0DIRSET0

DIRCLRData Direction Clear

Address
0x402
Reset
0x00
Access
read/write
  1. 7DIRCLR7
  2. 6DIRCLR6
  3. 5DIRCLR5
  4. 4DIRCLR4
  5. 3DIRCLR3
  6. 2DIRCLR2
  7. 1DIRCLR1
  8. 0DIRCLR0

DIRTGLData Direction Toggle

Address
0x403
Reset
0x00
Access
read/write
  1. 7DIRTGL7
  2. 6DIRTGL6
  3. 5DIRTGL5
  4. 4DIRTGL4
  5. 3DIRTGL3
  6. 2DIRTGL2
  7. 1DIRTGL1
  8. 0DIRTGL0

OUTOutput Value

Address
0x404
Reset
0x00
Access
read/write
  1. 7OUT7
  2. 6OUT6
  3. 5OUT5
  4. 4OUT4
  5. 3OUT3
  6. 2OUT2
  7. 1OUT1
  8. 0OUT0

OUTSETOutput Value Set

Address
0x405
Reset
0x00
Access
read/write
  1. 7OUTSET7
  2. 6OUTSET6
  3. 5OUTSET5
  4. 4OUTSET4
  5. 3OUTSET3
  6. 2OUTSET2
  7. 1OUTSET1
  8. 0OUTSET0

OUTCLROutput Value Clear

Address
0x406
Reset
0x00
Access
read/write
  1. 7OUTCLR7
  2. 6OUTCLR6
  3. 5OUTCLR5
  4. 4OUTCLR4
  5. 3OUTCLR3
  6. 2OUTCLR2
  7. 1OUTCLR1
  8. 0OUTCLR0

OUTTGLOutput Value Toggle

Address
0x407
Reset
0x00
Access
read/write
  1. 7OUTTGL7
  2. 6OUTTGL6
  3. 5OUTTGL5
  4. 4OUTTGL4
  5. 3OUTTGL3
  6. 2OUTTGL2
  7. 1OUTTGL1
  8. 0OUTTGL0

INInput Value

Address
0x408
Reset
0x00
Access
read/write
  1. 7IN7
  2. 6IN6
  3. 5IN5
  4. 4IN4
  5. 3IN3
  6. 2IN2
  7. 1IN1
  8. 0IN0

INTFLAGSInterrupt Flags

Address
0x409
Reset
0x00
Access
read/write
  1. 7INT7
  2. 6INT6
  3. 5INT5
  4. 4INT4
  5. 3INT3
  6. 2INT2
  7. 1INT1
  8. 0INT0
1 field
FieldBitsWhat it does
INT7:0Pin Interrupt

PIN0CTRLPin 0 Control

Address
0x410
Reset
0x00
Access
read/write
  1. 7INVEN
  2. 6–
  3. 5–
  4. 4–
  5. 3PULLUPEN
  6. 2ISC2
  7. 1ISC1
  8. 0ISC0
3 fields
FieldBitsWhat it does
INVEN7Inverted I/O Enable
PULLUPEN3Pullup enable
ISC2:0Input/Sense Configuration
  • 0 Interrupt disabled but input buffer enabled
  • 1 Sense Both Edges
  • 2 Sense Rising Edge
  • 3 Sense Falling Edge
  • 4 Digital Input Buffer disabled
  • 5 Sense low Level

PIN1CTRLPin 1 Control

Address
0x411
Reset
0x00
Access
read/write
  1. 7INVEN
  2. 6–
  3. 5–
  4. 4–
  5. 3PULLUPEN
  6. 2ISC2
  7. 1ISC1
  8. 0ISC0
3 fields
FieldBitsWhat it does
INVEN7Inverted I/O Enable
PULLUPEN3Pullup enable
ISC2:0Input/Sense Configuration
  • 0 Interrupt disabled but input buffer enabled
  • 1 Sense Both Edges
  • 2 Sense Rising Edge
  • 3 Sense Falling Edge
  • 4 Digital Input Buffer disabled
  • 5 Sense low Level

PIN2CTRLPin 2 Control

Address
0x412
Reset
0x00
Access
read/write
  1. 7INVEN
  2. 6–
  3. 5–
  4. 4–
  5. 3PULLUPEN
  6. 2ISC2
  7. 1ISC1
  8. 0ISC0
3 fields
FieldBitsWhat it does
INVEN7Inverted I/O Enable
PULLUPEN3Pullup enable
ISC2:0Input/Sense Configuration
  • 0 Interrupt disabled but input buffer enabled
  • 1 Sense Both Edges
  • 2 Sense Rising Edge
  • 3 Sense Falling Edge
  • 4 Digital Input Buffer disabled
  • 5 Sense low Level

PIN3CTRLPin 3 Control

Address
0x413
Reset
0x00
Access
read/write
  1. 7INVEN
  2. 6–
  3. 5–
  4. 4–
  5. 3PULLUPEN
  6. 2ISC2
  7. 1ISC1
  8. 0ISC0
3 fields
FieldBitsWhat it does
INVEN7Inverted I/O Enable
PULLUPEN3Pullup enable
ISC2:0Input/Sense Configuration
  • 0 Interrupt disabled but input buffer enabled
  • 1 Sense Both Edges
  • 2 Sense Rising Edge
  • 3 Sense Falling Edge
  • 4 Digital Input Buffer disabled
  • 5 Sense low Level

PIN4CTRLPin 4 Control

Address
0x414
Reset
0x00
Access
read/write
  1. 7INVEN
  2. 6–
  3. 5–
  4. 4–
  5. 3PULLUPEN
  6. 2ISC2
  7. 1ISC1
  8. 0ISC0
3 fields
FieldBitsWhat it does
INVEN7Inverted I/O Enable
PULLUPEN3Pullup enable
ISC2:0Input/Sense Configuration
  • 0 Interrupt disabled but input buffer enabled
  • 1 Sense Both Edges
  • 2 Sense Rising Edge
  • 3 Sense Falling Edge
  • 4 Digital Input Buffer disabled
  • 5 Sense low Level

PIN5CTRLPin 5 Control

Address
0x415
Reset
0x00
Access
read/write
  1. 7INVEN
  2. 6–
  3. 5–
  4. 4–
  5. 3PULLUPEN
  6. 2ISC2
  7. 1ISC1
  8. 0ISC0
3 fields
FieldBitsWhat it does
INVEN7Inverted I/O Enable
PULLUPEN3Pullup enable
ISC2:0Input/Sense Configuration
  • 0 Interrupt disabled but input buffer enabled
  • 1 Sense Both Edges
  • 2 Sense Rising Edge
  • 3 Sense Falling Edge
  • 4 Digital Input Buffer disabled
  • 5 Sense low Level

PIN6CTRLPin 6 Control

Address
0x416
Reset
0x00
Access
read/write
  1. 7INVEN
  2. 6–
  3. 5–
  4. 4–
  5. 3PULLUPEN
  6. 2ISC2
  7. 1ISC1
  8. 0ISC0
3 fields
FieldBitsWhat it does
INVEN7Inverted I/O Enable
PULLUPEN3Pullup enable
ISC2:0Input/Sense Configuration
  • 0 Interrupt disabled but input buffer enabled
  • 1 Sense Both Edges
  • 2 Sense Rising Edge
  • 3 Sense Falling Edge
  • 4 Digital Input Buffer disabled
  • 5 Sense low Level

PIN7CTRLPin 7 Control

Address
0x417
Reset
0x00
Access
read/write
  1. 7INVEN
  2. 6–
  3. 5–
  4. 4–
  5. 3PULLUPEN
  6. 2ISC2
  7. 1ISC1
  8. 0ISC0
3 fields
FieldBitsWhat it does
INVEN7Inverted I/O Enable
PULLUPEN3Pullup enable
ISC2:0Input/Sense Configuration
  • 0 Interrupt disabled but input buffer enabled
  • 1 Sense Both Edges
  • 2 Sense Rising Edge
  • 3 Sense Falling Edge
  • 4 Digital Input Buffer disabled
  • 5 Sense low Level

ADC0 Analog to Digital Converter

CTRLAControl A

Address
0x600
Reset
0x00
Access
read/write
  1. 7RUNSTBY
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2RESSEL
  7. 1FREERUN
  8. 0ENABLE
4 fields
FieldBitsWhat it does
RUNSTBY7Run standby mode
RESSEL2ADC Resolution
  • 0 10-bit mode
  • 1 8-bit mode
FREERUN1ADC Freerun mode
ENABLE0ADC Enable

CTRLBControl B

Address
0x601
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2SAMPNUM2
  7. 1SAMPNUM1
  8. 0SAMPNUM0
1 field
FieldBitsWhat it does
SAMPNUM2:0Accumulation Samples
  • 0 1 ADC sample
  • 1 Accumulate 2 samples
  • 2 Accumulate 4 samples
  • 3 Accumulate 8 samples
  • 4 Accumulate 16 samples
  • 5 Accumulate 32 samples
  • 6 Accumulate 64 samples

CTRLCControl C

Address
0x602
Reset
0x00
Access
read/write
  1. 7–
  2. 6SAMPCAP
  3. 5REFSEL1
  4. 4REFSEL0
  5. 3–
  6. 2PRESC2
  7. 1PRESC1
  8. 0PRESC0
3 fields
FieldBitsWhat it does
SAMPCAP6Sample Capacitance Selection
REFSEL5:4Reference Selection
  • 0 Internal reference
  • 1 VDD
PRESC2:0Clock Pre-scaler
  • 0 CLK_PER divided by 2
  • 1 CLK_PER divided by 4
  • 2 CLK_PER divided by 8
  • 3 CLK_PER divided by 16
  • 4 CLK_PER divided by 32
  • 5 CLK_PER divided by 64
  • 6 CLK_PER divided by 128
  • 7 CLK_PER divided by 256

CTRLDControl D

Address
0x603
Reset
0x00
Access
read/write
  1. 7INITDLY2
  2. 6INITDLY1
  3. 5INITDLY0
  4. 4ASDV
  5. 3SAMPDLY3
  6. 2SAMPDLY2
  7. 1SAMPDLY1
  8. 0SAMPDLY0
3 fields
FieldBitsWhat it does
INITDLY7:5Initial Delay Selection
  • 0 Delay 0 CLK_ADC cycles
  • 1 Delay 16 CLK_ADC cycles
  • 2 Delay 32 CLK_ADC cycles
  • 3 Delay 64 CLK_ADC cycles
  • 4 Delay 128 CLK_ADC cycles
  • 5 Delay 256 CLK_ADC cycles
ASDV4Automatic Sampling Delay Variation
  • 0 The Automatic Sampling Delay Variation is disabled
  • 1 The Automatic Sampling Delay Variation is enabled
SAMPDLY3:0Sampling Delay Selection

CTRLEControl E

Address
0x604
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2WINCM2
  7. 1WINCM1
  8. 0WINCM0
1 field
FieldBitsWhat it does
WINCM2:0Window Comparator Mode
  • 0 No Window Comparison
  • 1 Below Window
  • 2 Above Window
  • 3 Inside Window
  • 4 Outside Window

SAMPCTRLSample Control

Address
0x605
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4SAMPLEN4
  5. 3SAMPLEN3
  6. 2SAMPLEN2
  7. 1SAMPLEN1
  8. 0SAMPLEN0
1 field
FieldBitsWhat it does
SAMPLEN4:0Sample lenght

MUXPOSPositive mux input

Address
0x606
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4MUXPOS4
  5. 3MUXPOS3
  6. 2MUXPOS2
  7. 1MUXPOS1
  8. 0MUXPOS0
1 field
FieldBitsWhat it does
MUXPOS4:0Analog Channel Selection Bits
  • 0 ADC input pin 0
  • 1 ADC input pin 1
  • 2 ADC input pin 2
  • 3 ADC input pin 3
  • 4 ADC input pin 4
  • 5 ADC input pin 5
  • 6 ADC input pin 6
  • 7 ADC input pin 7
  • 8 ADC input pin 8
  • 9 ADC input pin 9
  • 10 ADC input pin 10
  • 11 ADC input pin 11
  • 28 DAC0
  • 29 Internal Ref
  • 30 Temp sensor
  • 31 GND

COMMANDCommand

Address
0x608
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0STCONV
1 field
FieldBitsWhat it does
STCONV0Start Conversion Operation

EVCTRLEvent Control

Address
0x609
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0STARTEI
1 field
FieldBitsWhat it does
STARTEI0Start Event Input Enable

INTCTRLInterrupt Control

Address
0x60A
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1WCMP
  8. 0RESRDY
2 fields
FieldBitsWhat it does
WCMP1Window Comparator Interrupt Enable
RESRDY0Result Ready Interrupt Enable

INTFLAGSInterrupt Flags

Address
0x60B
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1WCMP
  8. 0RESRDY
2 fields
FieldBitsWhat it does
WCMP1Window Comparator Flag
RESRDY0Result Ready Flag

DBGCTRLDebug Control

Address
0x60C
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0DBGRUN
1 field
FieldBitsWhat it does
DBGRUN0Debug run

TEMPTemporary Data

Address
0x60D
Reset
0x00
Access
read/write
  1. 7TEMP7
  2. 6TEMP6
  3. 5TEMP5
  4. 4TEMP4
  5. 3TEMP3
  6. 2TEMP2
  7. 1TEMP1
  8. 0TEMP0
1 field
FieldBitsWhat it does
TEMP7:0Temporary

RESADC Accumulator Result

Address
0x610
Reset
0x0000
Access
read only
Size
16-bit

WINLTWindow comparator low threshold

Address
0x612
Reset
0x0000
Access
read/write
Size
16-bit

WINHTWindow comparator high threshold

Address
0x614
Reset
0x0000
Access
read/write
Size
16-bit

CALIBCalibration

Address
0x616
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0DUTYCYC
1 field
FieldBitsWhat it does
DUTYCYC0Duty Cycle
  • 0 50% Duty cycle
  • 1 25% Duty cycle

AC0 Analog Comparator

CTRLAControl A

Address
0x670
Reset
0x00
Access
read/write
  1. 7RUNSTDBY
  2. 6OUTEN
  3. 5INTMODE1
  4. 4INTMODE0
  5. 3LPMODE
  6. 2HYSMODE1
  7. 1HYSMODE0
  8. 0ENABLE
6 fields
FieldBitsWhat it does
RUNSTDBY7Run in Standby Mode
OUTEN6Output Buffer Enable
INTMODE5:4Interrupt Mode
  • 0 Any Edge
  • 2 Negative Edge
  • 3 Positive Edge
LPMODE3Low Power Mode
  • 0 Low power mode disabled
  • 1 Low power mode enabled
HYSMODE2:1Hysteresis Mode
  • 0 No hysteresis
  • 1 10mV hysteresis
  • 2 25mV hysteresis
  • 3 50mV hysteresis
ENABLE0Enable

MUXCTRLAMux Control A

Address
0x672
Reset
0x00
Access
read/write
  1. 7INVERT
  2. 6–
  3. 5–
  4. 4MUXPOS1
  5. 3MUXPOS0
  6. 2–
  7. 1MUXNEG1
  8. 0MUXNEG0
3 fields
FieldBitsWhat it does
INVERT7Invert AC Output
MUXPOS4:3Positive Input MUX Selection
  • 0 Positive Pin 0
MUXNEG1:0Negative Input MUX Selection
  • 0 Negative Pin 0
  • 2 Voltage Reference
  • 3 DAC output

INTCTRLInterrupt Control

Address
0x676
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0CMP
1 field
FieldBitsWhat it does
CMP0Analog Comparator 0 Interrupt Enable

STATUSStatus

Address
0x677
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4STATE
  5. 3–
  6. 2–
  7. 1–
  8. 0CMP
2 fields
FieldBitsWhat it does
STATE4Analog Comparator State
CMP0Analog Comparator Interrupt Flag

DAC0 Digital to Analog Converter

CTRLAControl Register A

Address
0x680
Reset
0x00
Access
read/write
  1. 7RUNSTDBY
  2. 6OUTEN
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0ENABLE
3 fields
FieldBitsWhat it does
RUNSTDBY7Run in Standby Mode
OUTEN6Output Buffer Enable
ENABLE0DAC Enable

DATADATA Register

Address
0x681
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

USART0 Universal Synchronous and Asynchronous Receiver and Transmitter

RXDATALReceive Data Low Byte

Address
0x800
Reset
0x00
Access
read only
  1. 7DATA7
  2. 6DATA6
  3. 5DATA5
  4. 4DATA4
  5. 3DATA3
  6. 2DATA2
  7. 1DATA1
  8. 0DATA0
1 field
FieldBitsWhat it does
DATA7:0RX Data

RXDATAHReceive Data High Byte

Address
0x801
Reset
0x00
Access
read only
  1. 7RXCIF
  2. 6BUFOVF
  3. 5–
  4. 4–
  5. 3–
  6. 2FERR
  7. 1PERR
  8. 0DATA8
5 fields
FieldBitsWhat it does
RXCIF7Receive Complete Interrupt Flag
BUFOVF6Buffer Overflow
FERR2Frame Error
PERR1Parity Error
DATA80Receiver Data Register

TXDATALTransmit Data Low Byte

Address
0x802
Reset
0x00
Access
read/write
  1. 7DATA7
  2. 6DATA6
  3. 5DATA5
  4. 4DATA4
  5. 3DATA3
  6. 2DATA2
  7. 1DATA1
  8. 0DATA0
1 field
FieldBitsWhat it does
DATA7:0Transmit Data Register

TXDATAHTransmit Data High Byte

Address
0x803
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0DATA8
1 field
FieldBitsWhat it does
DATA80Transmit Data Register (CHSIZE=9bit)

STATUSStatus

Address
0x804
Reset
0x00
Access
read/write
  1. 7RXCIF
  2. 6TXCIF
  3. 5DREIF
  4. 4RXSIF
  5. 3ISFIF
  6. 2–
  7. 1BDF
  8. 0WFB
7 fields
FieldBitsWhat it does
RXCIF7Receive Complete Interrupt Flag
TXCIF6Transmit Interrupt Flag
DREIF5Data Register Empty Flag
RXSIF4Receive Start Interrupt
ISFIF3Inconsistent Sync Field Interrupt Flag
BDF1Break Detected Flag
WFB0Wait For Break

CTRLAControl A

Address
0x805
Reset
0x00
Access
read/write
  1. 7RXCIE
  2. 6TXCIE
  3. 5DREIE
  4. 4RXSIE
  5. 3LBME
  6. 2ABEIE
  7. 1RS4851
  8. 0RS4850
7 fields
FieldBitsWhat it does
RXCIE7Receive Complete Interrupt Enable
TXCIE6Transmit Complete Interrupt Enable
DREIE5Data Register Empty Interrupt Enable
RXSIE4Receiver Start Frame Interrupt Enable
LBME3Loop-back Mode Enable
ABEIE2Auto-baud Error Interrupt Enable
RS4851:0RS485 Mode internal transmitter
  • 0 RS485 Mode disabled
  • 1 RS485 Mode External drive
  • 2 RS485 Mode Internal drive

CTRLBControl B

Address
0x806
Reset
0x00
Access
read/write
  1. 7RXEN
  2. 6TXEN
  3. 5–
  4. 4SFDEN
  5. 3ODME
  6. 2RXMODE1
  7. 1RXMODE0
  8. 0MPCM
6 fields
FieldBitsWhat it does
RXEN7Reciever enable
TXEN6Transmitter Enable
SFDEN4Start Frame Detection Enable
ODME3Open Drain Mode Enable
RXMODE2:1Receiver Mode
  • 0 Normal mode
  • 1 CLK2x mode
  • 2 Generic autobaud mode
  • 3 LIN constrained autobaud mode
MPCM0Multi-processor Communication Mode

CTRLCControl C

Address
0x807
Reset
0x03
Access
read/write
  1. 7CMODE1
  2. 6CMODE0
  3. 5PMODE1
  4. 4PMODE0
  5. 3SBMODE
  6. 2CHSIZE2
  7. 1CHSIZE1
  8. 0CHSIZE0
6 fields
FieldBitsWhat it does
CMODE7:6Communication Mode
  • 0 Asynchronous Mode
  • 1 Synchronous Mode
  • 2 Infrared Communication
  • 3 SPI Host Mode
PMODE5:4Parity Mode
  • 0 No Parity
  • 2 Even Parity
  • 3 Odd Parity
SBMODE3Stop Bit Mode
  • 0 1 stop bit
  • 1 2 stop bits
CHSIZE2:0Character Size
  • 0 Character size: 5 bit
  • 1 Character size: 6 bit
  • 2 Character size: 7 bit
  • 3 Character size: 8 bit
  • 6 Character size: 9 bit read low byte first
  • 7 Character size: 9 bit read high byte first
UDORD2SPI Host Mode, Data Order
UCPHA1SPI Host Mode, Clock Phase

BAUDBaud Rate

Address
0x808
Reset
0x0000
Access
read/write
Size
16-bit

DBGCTRLDebug Control

Address
0x80B
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0DBGRUN
1 field
FieldBitsWhat it does
DBGRUN0Debug Run

EVCTRLEvent Control

Address
0x80C
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0IREI
1 field
FieldBitsWhat it does
IREI0IrDA Event Input Enable

TXPLCTRLIRCOM Transmitter Pulse Length Control

Address
0x80D
Reset
0x00
Access
read/write
  1. 7TXPL7
  2. 6TXPL6
  3. 5TXPL5
  4. 4TXPL4
  5. 3TXPL3
  6. 2TXPL2
  7. 1TXPL1
  8. 0TXPL0
1 field
FieldBitsWhat it does
TXPL7:0Transmit pulse length

RXPLCTRLIRCOM Receiver Pulse Length Control

Address
0x80E
Reset
0x00
Access
read/write
  1. 7–
  2. 6RXPL6
  3. 5RXPL5
  4. 4RXPL4
  5. 3RXPL3
  6. 2RXPL2
  7. 1RXPL1
  8. 0RXPL0
1 field
FieldBitsWhat it does
RXPL6:0Receiver Pulse Lenght

TWI0 Two-Wire Interface

CTRLAControl A

Address
0x810
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4SDASETUP
  5. 3SDAHOLD1
  6. 2SDAHOLD0
  7. 1FMPEN
  8. 0–
3 fields
FieldBitsWhat it does
SDASETUP4SDA Setup Time
  • 0 SDA setup time is 4 clock cycles
  • 1 SDA setup time is 8 clock cycles
SDAHOLD3:2SDA Hold Time
  • 0 SDA hold time off
  • 1 Typical 50ns hold time
  • 2 Typical 300ns hold time
  • 3 Typical 500ns hold time
FMPEN1FM Plus Enable

DBGCTRLDebug Control Register

Address
0x812
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0DBGRUN
1 field
FieldBitsWhat it does
DBGRUN0Debug Run

MCTRLAHost Control A

Address
0x813
Reset
0x00
Access
read/write
  1. 7RIEN
  2. 6WIEN
  3. 5–
  4. 4QCEN
  5. 3TIMEOUT1
  6. 2TIMEOUT0
  7. 1SMEN
  8. 0ENABLE
6 fields
FieldBitsWhat it does
RIEN7Read Interrupt Enable
WIEN6Write Interrupt Enable
QCEN4Quick Command Enable
TIMEOUT3:2Inactive Bus Timeout
  • 0 Bus Timeout Disabled
  • 1 50 Microseconds
  • 2 100 Microseconds
  • 3 200 Microseconds
SMEN1Smart Mode Enable
ENABLE0Enable TWI Host

MCTRLBHost Control B

Address
0x814
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3FLUSH
  6. 2ACKACT
  7. 1MCMD1
  8. 0MCMD0
3 fields
FieldBitsWhat it does
FLUSH3Flush
ACKACT2Acknowledge Action
  • 0 Send ACK
  • 1 Send NACK
MCMD1:0Command
  • 0 No Action
  • 1 Issue Repeated Start Condition
  • 2 Receive or Transmit Data, depending on DIR
  • 3 Issue Stop Condition

MSTATUSHost Status

Address
0x815
Reset
0x00
Access
read/write
  1. 7RIF
  2. 6WIF
  3. 5CLKHOLD
  4. 4RXACK
  5. 3ARBLOST
  6. 2BUSERR
  7. 1BUSSTATE1
  8. 0BUSSTATE0
7 fields
FieldBitsWhat it does
RIF7Read Interrupt Flag
WIF6Write Interrupt Flag
CLKHOLD5Clock Hold
RXACK4Received Acknowledge
ARBLOST3Arbitration Lost
BUSERR2Bus Error
BUSSTATE1:0Bus State
  • 0 Unknown Bus State
  • 1 Bus is Idle
  • 2 This Module Controls The Bus
  • 3 The Bus is Busy

MBAUDHost Baud Rate Control

Address
0x816
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

MADDRHost Address

Address
0x817
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

MDATAHost Data

Address
0x818
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

SCTRLAClient Control A

Address
0x819
Reset
0x00
Access
read/write
  1. 7DIEN
  2. 6APIEN
  3. 5PIEN
  4. 4–
  5. 3–
  6. 2PMEN
  7. 1SMEN
  8. 0ENABLE
6 fields
FieldBitsWhat it does
DIEN7Data Interrupt Enable
APIEN6Address/Stop Interrupt Enable
PIEN5Stop Interrupt Enable
PMEN2Promiscuous Mode Enable
SMEN1Smart Mode Enable
ENABLE0Enable TWI Client

SCTRLBClient Control B

Address
0x81A
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2ACKACT
  7. 1SCMD1
  8. 0SCMD0
2 fields
FieldBitsWhat it does
ACKACT2Acknowledge Action
  • 0 Send ACK
  • 1 Send NACK
SCMD1:0Command
  • 0 No Action
  • 2 Used To Complete a Transaction
  • 3 Used in Response to Address/Data Interrupt

SSTATUSClient Status

Address
0x81B
Reset
0x00
Access
read/write
  1. 7DIF
  2. 6APIF
  3. 5CLKHOLD
  4. 4RXACK
  5. 3COLL
  6. 2BUSERR
  7. 1DIR
  8. 0AP
8 fields
FieldBitsWhat it does
DIF7Data Interrupt Flag
APIF6Address/Stop Interrupt Flag
CLKHOLD5Clock Hold
RXACK4Received Acknowledge
COLL3Collision
BUSERR2Bus Error
DIR1Read/Write Direction
AP0Client Address or Stop
  • 0 Stop condition generated APIF
  • 1 Address detection generated APIF

SADDRClient Address

Address
0x81C
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

SDATAClient Data

Address
0x81D
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

SADDRMASKClient Address Mask

Address
0x81E
Reset
0x00
Access
read/write
  1. 7ADDRMASK6
  2. 6ADDRMASK5
  3. 5ADDRMASK4
  4. 4ADDRMASK3
  5. 3ADDRMASK2
  6. 2ADDRMASK1
  7. 1ADDRMASK0
  8. 0ADDREN
2 fields
FieldBitsWhat it does
ADDRMASK7:1Address Mask
ADDREN0Address Enable

SPI0 Serial Peripheral Interface

CTRLAControl A

Address
0x820
Reset
0x00
Access
read/write
  1. 7–
  2. 6DORD
  3. 5MASTER
  4. 4CLK2X
  5. 3–
  6. 2PRESC1
  7. 1PRESC0
  8. 0ENABLE
5 fields
FieldBitsWhat it does
DORD6Data Order Setting
MASTER5Host Operation Enable
CLK2X4Enable Double Speed
PRESC2:1Prescaler
  • 0 System Clock / 4
  • 1 System Clock / 16
  • 2 System Clock / 64
  • 3 System Clock / 128
ENABLE0Enable Module

CTRLBControl B

Address
0x821
Reset
0x00
Access
read/write
  1. 7BUFEN
  2. 6BUFWR
  3. 5–
  4. 4–
  5. 3–
  6. 2SSD
  7. 1MODE1
  8. 0MODE0
4 fields
FieldBitsWhat it does
BUFEN7Buffer Mode Enable
BUFWR6Buffer Write Mode
SSD2Client Select Disable
MODE1:0SPI Mode
  • 0 SPI Mode 0
  • 1 SPI Mode 1
  • 2 SPI Mode 2
  • 3 SPI Mode 3

INTCTRLInterrupt Control

Address
0x822
Reset
0x00
Access
read/write
  1. 7RXCIE
  2. 6TXCIE
  3. 5DREIE
  4. 4SSIE
  5. 3–
  6. 2–
  7. 1–
  8. 0IE
5 fields
FieldBitsWhat it does
RXCIE7Receive Complete Interrupt Enable
TXCIE6Transfer Complete Interrupt Enable
DREIE5Data Register Empty Interrupt Enable
SSIE4Client Select Trigger Interrupt Enable
IE0Interrupt Enable

INTFLAGSInterrupt Flags

Address
0x823
Reset
0x00
Access
read/write
  1. 7IF
  2. 6TXCIF
  3. 5DREIF
  4. 4SSIF
  5. 3–
  6. 2–
  7. 1–
  8. 0BUFOVF
7 fields
FieldBitsWhat it does
IF7Interrupt Flag
RXCIF7Receive Complete Interrupt Flag
TXCIF6Transfer Complete Interrupt Flag
WRCOL6Write Collision
DREIF5Data Register Empty Interrupt Flag
SSIF4Client Select Trigger Interrupt Flag
BUFOVF0Buffer Overflow

DATAData

Address
0x824
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

TCA0 16-bit Timer/Counter Type A

CTRLAControl A

Address
0xA00
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3CLKSEL2
  6. 2CLKSEL1
  7. 1CLKSEL0
  8. 0ENABLE
2 fields
FieldBitsWhat it does
CLKSEL3:1Clock Selection
  • 0 System Clock
  • 1 System Clock / 2
  • 2 System Clock / 4
  • 3 System Clock / 8
  • 4 System Clock / 16
  • 5 System Clock / 64
  • 6 System Clock / 256
  • 7 System Clock / 1024
ENABLE0Module Enable

CTRLAControl A

Address
0xA00
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3CLKSEL2
  6. 2CLKSEL1
  7. 1CLKSEL0
  8. 0ENABLE
2 fields
FieldBitsWhat it does
CLKSEL3:1Clock Selection
  • 0 System Clock
  • 1 System Clock / 2
  • 2 System Clock / 4
  • 3 System Clock / 8
  • 4 System Clock / 16
  • 5 System Clock / 64
  • 6 System Clock / 256
  • 7 System Clock / 1024
ENABLE0Module Enable

CTRLBControl B

Address
0xA01
Reset
0x00
Access
read/write
  1. 7–
  2. 6CMP2EN
  3. 5CMP1EN
  4. 4CMP0EN
  5. 3ALUPD
  6. 2WGMODE2
  7. 1WGMODE1
  8. 0WGMODE0
5 fields
FieldBitsWhat it does
CMP2EN6Compare 2 Enable
CMP1EN5Compare 1 Enable
CMP0EN4Compare 0 Enable
ALUPD3Auto Lock Update
WGMODE2:0Waveform generation mode
  • 0 Normal Mode
  • 1 Frequency Generation Mode
  • 3 Single Slope PWM
  • 5 Dual Slope PWM, overflow on TOP
  • 6 Dual Slope PWM, overflow on TOP and BOTTOM
  • 7 Dual Slope PWM, overflow on BOTTOM

CTRLBControl B

Address
0xA01
Reset
0x00
Access
read/write
  1. 7–
  2. 6HCMP2EN
  3. 5HCMP1EN
  4. 4HCMP0EN
  5. 3–
  6. 2LCMP2EN
  7. 1LCMP1EN
  8. 0LCMP0EN
6 fields
FieldBitsWhat it does
HCMP2EN6High Compare 2 Enable
HCMP1EN5High Compare 1 Enable
HCMP0EN4High Compare 0 Enable
LCMP2EN2Low Compare 2 Enable
LCMP1EN1Low Compare 1 Enable
LCMP0EN0Low Compare 0 Enable

CTRLCControl C

Address
0xA02
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2CMP2OV
  7. 1CMP1OV
  8. 0CMP0OV
3 fields
FieldBitsWhat it does
CMP2OV2Compare 2 Waveform Output Value
CMP1OV1Compare 1 Waveform Output Value
CMP0OV0Compare 0 Waveform Output Value

CTRLCControl C

Address
0xA02
Reset
0x00
Access
read/write
  1. 7–
  2. 6HCMP2OV
  3. 5HCMP1OV
  4. 4HCMP0OV
  5. 3–
  6. 2LCMP2OV
  7. 1LCMP1OV
  8. 0LCMP0OV
6 fields
FieldBitsWhat it does
HCMP2OV6High Compare 2 Output Value
HCMP1OV5High Compare 1 Output Value
HCMP0OV4High Compare 0 Output Value
LCMP2OV2Low Compare 2 Output Value
LCMP1OV1Low Compare 1 Output Value
LCMP0OV0Low Compare 0 Output Value

CTRLDControl D

Address
0xA03
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0SPLITM
1 field
FieldBitsWhat it does
SPLITM0Split Mode Enable

CTRLDControl D

Address
0xA03
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0SPLITM
1 field
FieldBitsWhat it does
SPLITM0Split Mode Enable

CTRLECLRControl E Clear

Address
0xA04
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3CMD1
  6. 2CMD0
  7. 1LUPD
  8. 0DIR
3 fields
FieldBitsWhat it does
CMD3:2Command
  • 0 No Command
  • 1 Force Update
  • 2 Force Restart
  • 3 Force Hard Reset
LUPD1Lock Update
DIR0Direction

CTRLECLRControl E Clear

Address
0xA04
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3CMD1
  6. 2CMD0
  7. 1–
  8. 0–
1 field
FieldBitsWhat it does
CMD3:2Command
  • 0 No Command
  • 1 Force Update
  • 2 Force Restart
  • 3 Force Hard Reset

CTRLESETControl E Set

Address
0xA05
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3CMD1
  6. 2CMD0
  7. 1LUPD
  8. 0DIR
3 fields
FieldBitsWhat it does
CMD3:2Command
  • 0 No Command
  • 1 Force Update
  • 2 Force Restart
  • 3 Force Hard Reset
LUPD1Lock Update
DIR0Direction
  • 0 Count up
  • 1 Count down

CTRLESETControl E Set

Address
0xA05
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3CMD1
  6. 2CMD0
  7. 1–
  8. 0–
1 field
FieldBitsWhat it does
CMD3:2Command
  • 0 No Command
  • 1 Force Update
  • 2 Force Restart
  • 3 Force Hard Reset

CTRLFCLRControl F Clear

Address
0xA06
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3CMP2BV
  6. 2CMP1BV
  7. 1CMP0BV
  8. 0PERBV
4 fields
FieldBitsWhat it does
CMP2BV3Compare 2 Buffer Valid
CMP1BV2Compare 1 Buffer Valid
CMP0BV1Compare 0 Buffer Valid
PERBV0Period Buffer Valid

CTRLFSETControl F Set

Address
0xA07
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3CMP2BV
  6. 2CMP1BV
  7. 1CMP0BV
  8. 0PERBV
4 fields
FieldBitsWhat it does
CMP2BV3Compare 2 Buffer Valid
CMP1BV2Compare 1 Buffer Valid
CMP0BV1Compare 0 Buffer Valid
PERBV0Period Buffer Valid

EVCTRLEvent Control

Address
0xA09
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2EVACT1
  7. 1EVACT0
  8. 0CNTEI
2 fields
FieldBitsWhat it does
EVACT2:1Event Action
  • 0 Count on positive edge event
  • 1 Count on any edge event
  • 2 Count on prescaled clock while event line is 1.
  • 3 Count on prescaled clock. Event controls count direction. Up-count when event line is 0, down-count when event line is 1.
CNTEI0Count on Event Input

INTCTRLInterrupt Control

Address
0xA0A
Reset
0x00
Access
read/write
  1. 7–
  2. 6CMP2
  3. 5CMP1
  4. 4CMP0
  5. 3–
  6. 2–
  7. 1–
  8. 0OVF
4 fields
FieldBitsWhat it does
CMP26Compare 2 Interrupt
CMP15Compare 1 Interrupt
CMP04Compare 0 Interrupt
OVF0Overflow Interrupt

INTCTRLInterrupt Control

Address
0xA0A
Reset
0x00
Access
read/write
  1. 7–
  2. 6LCMP2
  3. 5LCMP1
  4. 4LCMP0
  5. 3–
  6. 2–
  7. 1HUNF
  8. 0LUNF
5 fields
FieldBitsWhat it does
LCMP26Low Compare 2 Interrupt Enable
LCMP15Low Compare 1 Interrupt Enable
LCMP04Low Compare 0 Interrupt Enable
HUNF1High Underflow Interrupt Enable
LUNF0Low Underflow Interrupt Enable

INTFLAGSInterrupt Flags

Address
0xA0B
Reset
0x00
Access
read/write
  1. 7–
  2. 6CMP2
  3. 5CMP1
  4. 4CMP0
  5. 3–
  6. 2–
  7. 1–
  8. 0OVF
4 fields
FieldBitsWhat it does
CMP26Compare 2 Interrupt
CMP15Compare 1 Interrupt
CMP04Compare 0 Interrupt
OVF0Overflow Interrupt

INTFLAGSInterrupt Flags

Address
0xA0B
Reset
0x00
Access
read/write
  1. 7–
  2. 6LCMP2
  3. 5LCMP1
  4. 4LCMP0
  5. 3–
  6. 2–
  7. 1HUNF
  8. 0LUNF
5 fields
FieldBitsWhat it does
LCMP26Low Compare 0 Interrupt Flag
LCMP15Low Compare 1 Interrupt Flag
LCMP04Low Compare 2 Interrupt Flag
HUNF1High Underflow Interrupt Flag
LUNF0Low Underflow Interrupt Flag

DBGCTRLDegbug Control

Address
0xA0E
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0DBGRUN
1 field
FieldBitsWhat it does
DBGRUN0Debug Run

DBGCTRLDegbug Control

Address
0xA0E
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0DBGRUN
1 field
FieldBitsWhat it does
DBGRUN0Debug Run

TEMPTemporary data for 16-bit Access

Address
0xA0F
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

CNTCount

Address
0xA20
Reset
0x0000
Access
read/write
Size
16-bit

LCNTLow Count

Address
0xA20
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

HCNTHigh Count

Address
0xA21
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

LPERLow Period

Address
0xA26
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

PERPeriod

Address
0xA26
Reset
0x0000
Access
read/write
Size
16-bit

HPERHigh Period

Address
0xA27
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

CMP0Compare 0

Address
0xA28
Reset
0x0000
Access
read/write
Size
16-bit

LCMP0Low Compare

Address
0xA28
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

HCMP0High Compare

Address
0xA29
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

CMP1Compare 1

Address
0xA2A
Reset
0x0000
Access
read/write
Size
16-bit

LCMP1Low Compare

Address
0xA2A
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

HCMP1High Compare

Address
0xA2B
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

CMP2Compare 2

Address
0xA2C
Reset
0x0000
Access
read/write
Size
16-bit

LCMP2Low Compare

Address
0xA2C
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

HCMP2High Compare

Address
0xA2D
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

PERBUFPeriod Buffer

Address
0xA36
Reset
0x0000
Access
read/write
Size
16-bit

CMP0BUFCompare 0 Buffer

Address
0xA38
Reset
0x0000
Access
read/write
Size
16-bit

CMP1BUFCompare 1 Buffer

Address
0xA3A
Reset
0x0000
Access
read/write
Size
16-bit

CMP2BUFCompare 2 Buffer

Address
0xA3C
Reset
0x0000
Access
read/write
Size
16-bit

TCB0 16-bit Timer Type B

CTRLAControl A

Address
0xA40
Reset
0x00
Access
read/write
  1. 7–
  2. 6RUNSTDBY
  3. 5–
  4. 4SYNCUPD
  5. 3–
  6. 2CLKSEL1
  7. 1CLKSEL0
  8. 0ENABLE
4 fields
FieldBitsWhat it does
RUNSTDBY6Run Standby
SYNCUPD4Synchronize Update
CLKSEL2:1Clock Select
  • 0 CLK_PER (No Prescaling)
  • 1 CLK_PER/2 (From Prescaler)
  • 2 Use Clock from TCA
ENABLE0Enable

CTRLBControl Register B

Address
0xA41
Reset
0x00
Access
read/write
  1. 7–
  2. 6ASYNC
  3. 5CCMPINIT
  4. 4CCMPEN
  5. 3–
  6. 2CNTMODE2
  7. 1CNTMODE1
  8. 0CNTMODE0
4 fields
FieldBitsWhat it does
ASYNC6Asynchronous Enable
CCMPINIT5Pin Initial State
CCMPEN4Pin Output Enable
CNTMODE2:0Timer Mode
  • 0 Periodic Interrupt
  • 1 Periodic Timeout
  • 2 Input Capture Event
  • 3 Input Capture Frequency measurement
  • 4 Input Capture Pulse-Width measurement
  • 5 Input Capture Frequency and Pulse-Width measurement
  • 6 Single Shot
  • 7 8-bit PWM

EVCTRLEvent Control

Address
0xA44
Reset
0x00
Access
read/write
  1. 7–
  2. 6FILTER
  3. 5–
  4. 4EDGE
  5. 3–
  6. 2–
  7. 1–
  8. 0CAPTEI
3 fields
FieldBitsWhat it does
FILTER6Input Capture Noise Cancellation Filter
EDGE4Event Edge
CAPTEI0Event Input Enable

INTCTRLInterrupt Control

Address
0xA45
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0CAPT
1 field
FieldBitsWhat it does
CAPT0Capture or Timeout

INTFLAGSInterrupt Flags

Address
0xA46
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0CAPT
1 field
FieldBitsWhat it does
CAPT0Capture or Timeout

STATUSStatus

Address
0xA47
Reset
0x00
Access
read only
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0RUN
1 field
FieldBitsWhat it does
RUN0Run

DBGCTRLDebug Control

Address
0xA48
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0DBGRUN
1 field
FieldBitsWhat it does
DBGRUN0Debug Run

TEMPTemporary Value

Address
0xA49
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

CNTCount

Address
0xA4A
Reset
0x0000
Access
read/write
Size
16-bit

CCMPCompare or Capture

Address
0xA4C
Reset
0x0000
Access
read/write
Size
16-bit

TCD0 Timer Counter D

CTRLAControl A

Address
0xA80
Reset
0x00
Access
read/write
  1. 7–
  2. 6CLKSEL1
  3. 5CLKSEL0
  4. 4CNTPRES1
  5. 3CNTPRES0
  6. 2SYNCPRES1
  7. 1SYNCPRES0
  8. 0ENABLE
4 fields
FieldBitsWhat it does
CLKSEL6:5clock select
  • 0 20 MHz oscillator
  • 2 External clock
  • 3 System clock
CNTPRES4:3counter prescaler
  • 0 Sync clock divided by 1
  • 1 Sync clock divided by 4
  • 2 Sync clock divided by 32
SYNCPRES2:1Syncronization prescaler
  • 0 Selevted clock source divided by 1
  • 1 Selevted clock source divided by 2
  • 2 Selevted clock source divided by 4
  • 3 Selevted clock source divided by 8
ENABLE0Enable

CTRLBControl B

Address
0xA81
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1WGMODE1
  8. 0WGMODE0
1 field
FieldBitsWhat it does
WGMODE1:0Waveform generation mode
  • 0 One ramp mode
  • 1 Two ramp mode
  • 2 Four ramp mode
  • 3 Dual slope mode

CTRLCControl C

Address
0xA82
Reset
0x00
Access
read/write
  1. 7CMPDSEL
  2. 6CMPCSEL
  3. 5–
  4. 4–
  5. 3FIFTY
  6. 2–
  7. 1AUPDATE
  8. 0CMPOVR
5 fields
FieldBitsWhat it does
CMPDSEL7Compare D output select
  • 0 PWM A output
  • 1 PWM B output
CMPCSEL6Compare C output select
  • 0 PWM A output
  • 1 PWM B output
FIFTY3Fifty percent waveform
AUPDATE1Auto update
CMPOVR0Compare output value override

CTRLDControl D

Address
0xA83
Reset
0x00
Access
read/write
  1. 7CMPBVAL3
  2. 6CMPBVAL2
  3. 5CMPBVAL1
  4. 4CMPBVAL0
  5. 3CMPAVAL3
  6. 2CMPAVAL2
  7. 1CMPAVAL1
  8. 0CMPAVAL0
2 fields
FieldBitsWhat it does
CMPBVAL7:4Compare B value
CMPAVAL3:0Compare A value

CTRLEControl E

Address
0xA84
Reset
0x00
Access
read/write
  1. 7DISEOC
  2. 6–
  3. 5–
  4. 4SCAPTUREB
  5. 3SCAPTUREA
  6. 2RESTART
  7. 1SYNC
  8. 0SYNCEOC
6 fields
FieldBitsWhat it does
DISEOC7Disable at end of cycle
SCAPTUREB4Software Capture B Strobe
SCAPTUREA3Software Capture A Strobe
RESTART2Restart strobe
SYNC1Synchronize strobe
SYNCEOC0Synchronize end of cycle strobe

EVCTRLAEVCTRLA

Address
0xA88
Reset
0x00
Access
read/write
  1. 7CFG1
  2. 6CFG0
  3. 5–
  4. 4EDGE
  5. 3–
  6. 2ACTION
  7. 1–
  8. 0TRIGEI
4 fields
FieldBitsWhat it does
CFG7:6Event config
  • 0 Neither Filter nor Asynchronous Event is enabled
  • 1 Input Capture Noise Cancellation Filter enabled
  • 2 Asynchronous Event output qualification enabled
EDGE4Edge select
  • 0 The falling edge or low level of event generates retrigger or fault action
  • 1 The rising edge or high level of event generates retrigger or fault action
ACTION2Event action
  • 0 Event trigger a fault
  • 1 Event trigger a fault and capture
TRIGEI0Trigger event enable

EVCTRLBEVCTRLB

Address
0xA89
Reset
0x00
Access
read/write
  1. 7CFG1
  2. 6CFG0
  3. 5–
  4. 4EDGE
  5. 3–
  6. 2ACTION
  7. 1–
  8. 0TRIGEI
4 fields
FieldBitsWhat it does
CFG7:6Event config
  • 0 Neither Filter nor Asynchronous Event is enabled
  • 1 Input Capture Noise Cancellation Filter enabled
  • 2 Asynchronous Event output qualification enabled
EDGE4Edge select
  • 0 The falling edge or low level of event generates retrigger or fault action
  • 1 The rising edge or high level of event generates retrigger or fault action
ACTION2Event action
  • 0 Event trigger a fault
  • 1 Event trigger a fault and capture
TRIGEI0Trigger event enable

INTCTRLInterrupt Control

Address
0xA8C
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3TRIGB
  6. 2TRIGA
  7. 1–
  8. 0OVF
3 fields
FieldBitsWhat it does
TRIGB3Trigger B interrupt enable
TRIGA2Trigger A interrupt enable
OVF0Overflow interrupt enable

INTFLAGSInterrupt Flags

Address
0xA8D
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3TRIGB
  6. 2TRIGA
  7. 1–
  8. 0OVF
3 fields
FieldBitsWhat it does
TRIGB3Trigger B interrupt enable
TRIGA2Trigger A interrupt enable
OVF0Overflow interrupt enable

STATUSStatus

Address
0xA8E
Reset
0x00
Access
read/write
  1. 7PWMACTB
  2. 6PWMACTA
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1CMDRDY
  8. 0ENRDY
4 fields
FieldBitsWhat it does
PWMACTB7PWM activity on B
PWMACTA6PWM activity on A
CMDRDY1Command ready
ENRDY0Enable ready

INPUTCTRLAInput Control A

Address
0xA90
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3INPUTMODE3
  6. 2INPUTMODE2
  7. 1INPUTMODE1
  8. 0INPUTMODE0
1 field
FieldBitsWhat it does
INPUTMODE3:0Input mode
  • 0 Input has no actions
  • 1 Stop output, jump to opposite compare cycle and wait
  • 2 Stop output, execute opposite compare cycle and wait
  • 3 stop output, execute opposite compare cycle while fault active
  • 4 Stop all outputs, maintain frequency
  • 5 Stop all outputs, execute dead time while fault active
  • 6 Stop all outputs, jump to next compare cycle and wait
  • 7 Stop all outputs, wait for software action
  • 8 Stop output on edge, jump to next compare cycle
  • 9 Stop output on edge, maintain frequency
  • 10 Stop output at level, maintain frequency

INPUTCTRLBInput Control B

Address
0xA91
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3INPUTMODE3
  6. 2INPUTMODE2
  7. 1INPUTMODE1
  8. 0INPUTMODE0
1 field
FieldBitsWhat it does
INPUTMODE3:0Input mode
  • 0 Input has no actions
  • 1 Stop output, jump to opposite compare cycle and wait
  • 2 Stop output, execute opposite compare cycle and wait
  • 3 stop output, execute opposite compare cycle while fault active
  • 4 Stop all outputs, maintain frequency
  • 5 Stop all outputs, execute dead time while fault active
  • 6 Stop all outputs, jump to next compare cycle and wait
  • 7 Stop all outputs, wait for software action
  • 8 Stop output on edge, jump to next compare cycle
  • 9 Stop output on edge, maintain frequency
  • 10 Stop output at level, maintain frequency

FAULTCTRLFault Control

Address
0xA92
Reset
0x00
Access
read/write
  1. 7CMPDEN
  2. 6CMPCEN
  3. 5CMPBEN
  4. 4CMPAEN
  5. 3CMPD
  6. 2CMPC
  7. 1CMPB
  8. 0CMPA
8 fields
FieldBitsWhat it does
CMPDEN7Compare D enable
CMPCEN6Compare C enable
CMPBEN5Compare B enable
CMPAEN4Compare A enable
CMPD3Compare D vaule
CMPC2Compare C value
CMPB1Compare B value
CMPA0Compare A value

DLYCTRLDelay Control

Address
0xA94
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5DLYPRESC1
  4. 4DLYPRESC0
  5. 3DLYTRIG1
  6. 2DLYTRIG0
  7. 1DLYSEL1
  8. 0DLYSEL0
3 fields
FieldBitsWhat it does
DLYPRESC5:4Delay prescaler
  • 0 No prescaling
  • 1 Prescale with 2
  • 2 Prescale with 4
  • 3 Prescale with 8
DLYTRIG3:2Delay trigger
  • 0 Compare A set
  • 1 Compare A clear
  • 2 Compare B set
  • 3 Compare B clear
DLYSEL1:0Delay select
  • 0 No delay
  • 1 Input blanking enabled
  • 2 Event delay enabled

DLYVALDelay value

Address
0xA95
Reset
0x00
Access
read/write
  1. 7DLYVAL7
  2. 6DLYVAL6
  3. 5DLYVAL5
  4. 4DLYVAL4
  5. 3DLYVAL3
  6. 2DLYVAL2
  7. 1DLYVAL1
  8. 0DLYVAL0
1 field
FieldBitsWhat it does
DLYVAL7:0Delay value

DITCTRLDither Control A

Address
0xA98
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1DITHERSEL1
  8. 0DITHERSEL0
1 field
FieldBitsWhat it does
DITHERSEL1:0Dither select
  • 0 On-time ramp B
  • 1 On-time ramp A and B
  • 2 Dead-time rampB
  • 3 Dead-time ramp A and B

DITVALDither value

Address
0xA99
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3DITHER3
  6. 2DITHER2
  7. 1DITHER1
  8. 0DITHER0
1 field
FieldBitsWhat it does
DITHER3:0Dither value

DBGCTRLDebug Control

Address
0xA9E
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2FAULTDET
  7. 1–
  8. 0DBGRUN
2 fields
FieldBitsWhat it does
FAULTDET2Fault detection
DBGRUN0Debug run

CAPTUREACapture A

Address
0xAA2
Reset
0x0000
Access
read only
Size
16-bit

CAPTUREBCapture B

Address
0xAA4
Reset
0x0000
Access
read only
Size
16-bit

CMPASETCompare A Set

Address
0xAA8
Reset
0x0000
Access
read/write
Size
16-bit
1 field
FieldBitsWhat it does
CMPASET11:0Compare A Set

CMPACLRCompare A Clear

Address
0xAAA
Reset
0x0000
Access
read/write
Size
16-bit
1 field
FieldBitsWhat it does
CMPACLR11:0Compare A Set

CMPBSETCompare B Set

Address
0xAAC
Reset
0x0000
Access
read/write
Size
16-bit
1 field
FieldBitsWhat it does
CMPBSET11:0Compare B Set

CMPBCLRCompare B Clear

Address
0xAAE
Reset
0x0000
Access
read/write
Size
16-bit
1 field
FieldBitsWhat it does
CMPBCLR11:0Compare B Clear

SYSCFG System Configuration Registers

REVIDRevision ID

Address
0xF01
Reset
0x00
Access
read only
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

EXTBRKExternal Break

Address
0xF02
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0ENEXTBRK
1 field
FieldBitsWhat it does
ENEXTBRK0External break enable

NVMCTRL Non-volatile Memory Controller

CTRLAControl A

Address
0x1000
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2CMD2
  7. 1CMD1
  8. 0CMD0
1 field
FieldBitsWhat it does
CMD2:0Command
  • 0 No Command
  • 1 Write page
  • 2 Erase page
  • 3 Erase and write page
  • 4 Page buffer clear
  • 5 Chip erase
  • 6 EEPROM erase
  • 7 Write fuse (PDI only)

CTRLBControl B

Address
0x1001
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1BOOTLOCK
  8. 0APCWP
2 fields
FieldBitsWhat it does
BOOTLOCK1Boot Lock
APCWP0Application code write protect

STATUSStatus

Address
0x1002
Reset
0x00
Access
read only
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2WRERROR
  7. 1EEBUSY
  8. 0FBUSY
3 fields
FieldBitsWhat it does
WRERROR2Write error
EEBUSY1EEPROM busy
FBUSY0Flash busy

INTCTRLInterrupt Control

Address
0x1003
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0EEREADY
1 field
FieldBitsWhat it does
EEREADY0EEPROM Ready

INTFLAGSInterrupt Flags

Address
0x1004
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0EEREADY
1 field
FieldBitsWhat it does
EEREADY0EEPROM Ready

DATAData

Address
0x1006
Reset
0x0000
Access
read/write
Size
16-bit

ADDRAddress

Address
0x1008
Reset
0x0000
Access
read/write
Size
16-bit

SIGROW Signature row

DEVICEID0Device ID Byte 0

Address
0x1100
Reset
0x00
Access
read only
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

DEVICEID1Device ID Byte 1

Address
0x1101
Reset
0x00
Access
read only
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

DEVICEID2Device ID Byte 2

Address
0x1102
Reset
0x00
Access
read only
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

SERNUM0Serial Number Byte 0

Address
0x1103
Reset
0x00
Access
read only
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

SERNUM1Serial Number Byte 1

Address
0x1104
Reset
0x00
Access
read only
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

SERNUM2Serial Number Byte 2

Address
0x1105
Reset
0x00
Access
read only
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

SERNUM3Serial Number Byte 3

Address
0x1106
Reset
0x00
Access
read only
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

SERNUM4Serial Number Byte 4

Address
0x1107
Reset
0x00
Access
read only
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

SERNUM5Serial Number Byte 5

Address
0x1108
Reset
0x00
Access
read only
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

SERNUM6Serial Number Byte 6

Address
0x1109
Reset
0x00
Access
read only
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

SERNUM7Serial Number Byte 7

Address
0x110A
Reset
0x00
Access
read only
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

SERNUM8Serial Number Byte 8

Address
0x110B
Reset
0x00
Access
read only
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

SERNUM9Serial Number Byte 9

Address
0x110C
Reset
0x00
Access
read only
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

TEMPSENSE0Temperature Sensor Calibration Byte 0

Address
0x1120
Reset
0x00
Access
read only
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

TEMPSENSE1Temperature Sensor Calibration Byte 1

Address
0x1121
Reset
0x00
Access
read only
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

OSC16ERR3VOSC16 error at 3V

Address
0x1122
Reset
0x00
Access
read only
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

OSC16ERR5VOSC16 error at 5V

Address
0x1123
Reset
0x00
Access
read only
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

OSC20ERR3VOSC20 error at 3V

Address
0x1124
Reset
0x00
Access
read only
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

OSC20ERR5VOSC20 error at 5V

Address
0x1125
Reset
0x00
Access
read only
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

FUSE Fuses

WDTCFGWatchdog Configuration

Address
0x1280
Reset
0x00
Access
read/write
  1. 7WINDOW3
  2. 6WINDOW2
  3. 5WINDOW1
  4. 4WINDOW0
  5. 3PERIOD3
  6. 2PERIOD2
  7. 1PERIOD1
  8. 0PERIOD0
2 fields
FieldBitsWhat it does
WINDOW7:4Watchdog Window Timeout Period
  • 0 Window mode off
  • 1 8 cycles (8ms)
  • 2 16 cycles (16ms)
  • 3 32 cycles (32ms)
  • 4 64 cycles (64ms)
  • 5 128 cycles (0.128s)
  • 6 256 cycles (0.256s)
  • 7 512 cycles (0.512s)
  • 8 1K cycles (1.0s)
  • 9 2K cycles (2.0s)
  • 10 4K cycles (4.1s)
  • 11 8K cycles (8.2s)
PERIOD3:0Watchdog Timeout Period
  • 0 Watch-Dog timer Off
  • 1 8 cycles (8ms)
  • 2 16 cycles (16ms)
  • 3 32 cycles (32ms)
  • 4 64 cycles (64ms)
  • 5 128 cycles (0.128s)
  • 6 256 cycles (0.256s)
  • 7 512 cycles (0.512s)
  • 8 1K cycles (1.0s)
  • 9 2K cycles (2.0s)
  • 10 4K cycles (4.1s)
  • 11 8K cycles (8.2s)

BODCFGBOD Configuration

Address
0x1281
Reset
0x00
Access
read/write
  1. 7LVL2
  2. 6LVL1
  3. 5LVL0
  4. 4SAMPFREQ
  5. 3ACTIVE1
  6. 2ACTIVE0
  7. 1SLEEP1
  8. 0SLEEP0
4 fields
FieldBitsWhat it does
LVL7:5BOD Level
  • 0 1.8 V
  • 2 2.6 V
  • 7 4.2 V
SAMPFREQ4BOD Sample Frequency
  • 0 1kHz sampling frequency
  • 1 125Hz sampling frequency
ACTIVE3:2BOD Operation in Active Mode
  • 0 Disabled
  • 1 Enabled
  • 2 Sampled
  • 3 Enabled with wake-up halted until BOD is ready
SLEEP1:0BOD Operation in Sleep Mode
  • 0 Disabled
  • 1 Enabled
  • 2 Sampled

OSCCFGOscillator Configuration

Address
0x1282
Reset
0x7E
Access
read/write
  1. 7OSCLOCK
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1FREQSEL1
  8. 0FREQSEL0
2 fields
FieldBitsWhat it does
OSCLOCK7Oscillator Lock
FREQSEL1:0Frequency Select
  • 1 16 MHz
  • 2 20 MHz

TCD0CFGTCD0 Configuration

Address
0x1284
Reset
0x00
Access
read/write
  1. 7CMPDEN
  2. 6CMPCEN
  3. 5CMPBEN
  4. 4CMPAEN
  5. 3CMPD
  6. 2CMPC
  7. 1CMPB
  8. 0CMPA
8 fields
FieldBitsWhat it does
CMPDEN7Compare D Output Enable
CMPCEN6Compare C Output Enable
CMPBEN5Compare B Output Enable
CMPAEN4Compare A Output Enable
CMPD3Compare D Default Output Value
CMPC2Compare C Default Output Value
CMPB1Compare B Default Output Value
CMPA0Compare A Default Output Value

SYSCFG0System Configuration 0

Address
0x1285
Reset
0xF6
Access
read/write
  1. 7CRCSRC1
  2. 6CRCSRC0
  3. 5–
  4. 4–
  5. 3RSTPINCFG1
  6. 2RSTPINCFG0
  7. 1–
  8. 0EESAVE
3 fields
FieldBitsWhat it does
CRCSRC7:6CRC Source
  • 0 The CRC is performed on the entire Flash (boot, application code and application data section).
  • 1 The CRC is performed on the boot section of Flash
  • 2 The CRC is performed on the boot and application code section of Flash
  • 3 Disable CRC.
RSTPINCFG3:2Reset Pin Configuration
  • 0 GPIO mode
  • 1 UPDI mode
  • 2 Reset mode
EESAVE0EEPROM Save

SYSCFG1System Configuration 1

Address
0x1286
Reset
0xFF
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2SUT2
  7. 1SUT1
  8. 0SUT0
1 field
FieldBitsWhat it does
SUT2:0Startup Time
  • 0 0 ms
  • 1 1 ms
  • 2 2 ms
  • 3 4 ms
  • 4 8 ms
  • 5 16 ms
  • 6 32 ms
  • 7 64 ms

APPENDApplication Code Section End

Address
0x1287
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

BOOTENDBoot Section End

Address
0x1288
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

LOCKBIT Lockbit

LOCKBITLock bits

Address
0x128A
Reset
0xC5
Access
read/write
  1. 7LB7
  2. 6LB6
  3. 5LB5
  4. 4LB4
  5. 3LB3
  6. 2LB2
  7. 1LB1
  8. 0LB0
1 field
FieldBitsWhat it does
LB7:0Lock Bits
  • 58 Read and write lock
  • 197 No locks

USERROW User Row

USERROW0User Row Byte 0

Address
0x1300
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

USERROW1User Row Byte 1

Address
0x1301
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

USERROW2User Row Byte 2

Address
0x1302
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

USERROW3User Row Byte 3

Address
0x1303
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

USERROW4User Row Byte 4

Address
0x1304
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

USERROW5User Row Byte 5

Address
0x1305
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

USERROW6User Row Byte 6

Address
0x1306
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

USERROW7User Row Byte 7

Address
0x1307
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

USERROW8User Row Byte 8

Address
0x1308
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

USERROW9User Row Byte 9

Address
0x1309
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

USERROW10User Row Byte 10

Address
0x130A
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

USERROW11User Row Byte 11

Address
0x130B
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

USERROW12User Row Byte 12

Address
0x130C
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

USERROW13User Row Byte 13

Address
0x130D
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

USERROW14User Row Byte 14

Address
0x130E
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

USERROW15User Row Byte 15

Address
0x130F
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

USERROW16User Row Byte 16

Address
0x1310
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

USERROW17User Row Byte 17

Address
0x1311
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

USERROW18User Row Byte 18

Address
0x1312
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

USERROW19User Row Byte 19

Address
0x1313
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

USERROW20User Row Byte 20

Address
0x1314
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

USERROW21User Row Byte 21

Address
0x1315
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

USERROW22User Row Byte 22

Address
0x1316
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

USERROW23User Row Byte 23

Address
0x1317
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

USERROW24User Row Byte 24

Address
0x1318
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

USERROW25User Row Byte 25

Address
0x1319
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

USERROW26User Row Byte 26

Address
0x131A
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

USERROW27User Row Byte 27

Address
0x131B
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

USERROW28User Row Byte 28

Address
0x131C
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

USERROW29User Row Byte 29

Address
0x131D
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

USERROW30User Row Byte 30

Address
0x131E
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

USERROW31User Row Byte 31

Address
0x131F
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–