AI Interactive Datasheet ATtiny87
AVR · tinyAVR

ATtiny87 registers

All 80 registers by peripheral, at their data-space address (the I/O address IN and OUT use is shown beside it), with their reset value and every bit.

PORTA I/O Port

PINAPort A Input Pins

Address
0x20 I/O 0x00
Reset
0x00
Access
read/write
  1. 7PINA7
  2. 6PINA6
  3. 5PINA5
  4. 4PINA4
  5. 3PINA3
  6. 2PINA2
  7. 1PINA1
  8. 0PINA0

DDRAPort A Data Direction Register

Address
0x21 I/O 0x01
Reset
0x00
Access
read/write
  1. 7DDA7
  2. 6DDA6
  3. 5DDA5
  4. 4DDA4
  5. 3DDA3
  6. 2DDA2
  7. 1DDA1
  8. 0DDA0

PORTAPort A Data Register

Address
0x22 I/O 0x02
Reset
0x00
Access
read/write
  1. 7PORTA7
  2. 6PORTA6
  3. 5PORTA5
  4. 4PORTA4
  5. 3PORTA3
  6. 2PORTA2
  7. 1PORTA1
  8. 0PORTA0

PORTB I/O Port

PINBPort B Input Pins

Address
0x23 I/O 0x03
Reset
0x00
Access
read/write
  1. 7PINB7
  2. 6PINB6
  3. 5PINB5
  4. 4PINB4
  5. 3PINB3
  6. 2PINB2
  7. 1PINB1
  8. 0PINB0

DDRBPort B Data Direction Register

Address
0x24 I/O 0x04
Reset
0x00
Access
read/write
  1. 7DDB7
  2. 6DDB6
  3. 5DDB5
  4. 4DDB4
  5. 3DDB3
  6. 2DDB2
  7. 1DDB1
  8. 0DDB0

PORTBPort B Data Register

Address
0x25 I/O 0x05
Reset
0x00
Access
read/write
  1. 7PORTB7
  2. 6PORTB6
  3. 5PORTB5
  4. 4PORTB4
  5. 3PORTB3
  6. 2PORTB2
  7. 1PORTB1
  8. 0PORTB0

CPU CPU Registers

PORTCRPort Control Register

Address
0x32 I/O 0x12
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5BBMB
  4. 4BBMA
  5. 3–
  6. 2–
  7. 1PUDB
  8. 0PUDA
4 fields
FieldBitsWhat it does
BBMB5
BBMA4
PUDB1
PUDA0

GPIOR0General purpose register 0

Address
0x3E I/O 0x1E
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

GPIOR1General Purpose register 1

Address
0x4A I/O 0x2A
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

GPIOR2General Purpose IO register 2

Address
0x4B I/O 0x2B
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

DWDRDebugWire data register

Address
0x51 I/O 0x31
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

SMCRSleep Mode Control Register

Address
0x53 I/O 0x33
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2SM1
  7. 1SM0
  8. 0SE
2 fields
FieldBitsWhat it does
SM2:1Sleep Mode Select Bits
  • 0 Idle
  • 1 ADC Noise Reduction (If Available)
  • 2 Power Down
  • 3 Reserved
SE0Sleep Enable

MCUSRMCU Status register

Address
0x54 I/O 0x34
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3WDRF
  6. 2BORF
  7. 1EXTRF
  8. 0PORF
4 fields
FieldBitsWhat it does
WDRF3Watchdog Reset Flag
BORF2Brown-out Reset Flag
EXTRF1External Reset Flag
PORF0Power-On Reset Flag

MCUCRMCU Control Register

Address
0x55 I/O 0x35
Reset
0x00
Access
read/write
  1. 7–
  2. 6BODS
  3. 5BODSE
  4. 4PUD
  5. 3–
  6. 2–
  7. 1–
  8. 0–
3 fields
FieldBitsWhat it does
BODS6BOD Sleep
BODSE5BOD Sleep Enable
PUD4Pull-up Disable

SPStack Pointer Bytes

Address
0x5D I/O 0x3D
Reset
0x02FF
Access
read/write
Size
16-bit

SREGStatus Register

Address
0x5F I/O 0x3F
Reset
0x00
Access
read/write
  1. 7I
  2. 6T
  3. 5H
  4. 4S
  5. 3V
  6. 2N
  7. 1Z
  8. 0C
8 fields
FieldBitsWhat it does
I7Global Interrupt Enable
T6Bit Copy Storage
H5Half Carry Flag
S4Sign Bit
V3Two's Complement Overflow Flag
N2Negative Flag
Z1Zero Flag
C0Carry Flag

CLKPRClock Prescale Register

Address
0x61
Reset
0x00
Access
read/write
  1. 7CLKPCE
  2. 6–
  3. 5–
  4. 4–
  5. 3CLKPS3
  6. 2CLKPS2
  7. 1CLKPS1
  8. 0CLKPS0
2 fields
FieldBitsWhat it does
CLKPCE7Clock Prescaler Change Enable
CLKPS3:0Clock Prescaler Select Bits
  • 0 1
  • 1 2
  • 2 4
  • 3 8
  • 4 16
  • 5 32
  • 6 64
  • 7 128
  • 8 256

CLKCSRClock Control & Status Register

Address
0x62
Reset
0x00
Access
read/write
  1. 7CLKCCE
  2. 6–
  3. 5–
  4. 4CLKRDY
  5. 3CLKC3
  6. 2CLKC2
  7. 1CLKC1
  8. 0CLKC0
3 fields
FieldBitsWhat it does
CLKCCE7Clock Control Change Enable
CLKRDY4Clock Ready Flag
CLKC3:0Clock Control bits
  • 0 No Command
  • 1 Disable Clock Source
  • 2 Enable Clock Source
  • 3 Request for Clock Availability
  • 4 Clock Source Switch
  • 5 Recovery System Clock Source Code
  • 6 Enable Watchdog in Automatic Reload Mode
  • 7 CKOUT Command
  • 8 From 0x08 up to 0x0F: No command

CLKSELRClock Selection Register

Address
0x63
Reset
0x00
Access
read/write
  1. 7–
  2. 6COUT
  3. 5CSUT1
  4. 4CSUT0
  5. 3CSEL3
  6. 2CSEL2
  7. 1CSEL1
  8. 0CSEL0
3 fields
FieldBitsWhat it does
COUT6Clock Out - CKOUT fuse substitution
CSUT5:4Clock Start-up Time bit 1 - SUT1 fuse substitution
CSEL3:0Clock Source Select bit 3 - CKSEL3 fuse substitution

PRRPower Reduction Register

Address
0x64
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5PRLIN
  4. 4PRSPI
  5. 3PRTIM1
  6. 2PRTIM0
  7. 1PRUSI
  8. 0PRADC
6 fields
FieldBitsWhat it does
PRLIN5Power Reduction LINUART
PRSPI4Power Reduction SPI
PRTIM13Power Reduction Timer/Counter1
PRTIM02Power Reduction Timer/Counter0
PRUSI1Power Reduction USI
PRADC0Power Reduction ADC

OSCCALOscillator Calibration Register

Address
0x66
Reset
0x00
Access
read/write
  1. 7OSCCAL7
  2. 6OSCCAL6
  3. 5OSCCAL5
  4. 4OSCCAL4
  5. 3OSCCAL3
  6. 2OSCCAL2
  7. 1OSCCAL1
  8. 0OSCCAL0
1 field
FieldBitsWhat it does
OSCCAL7:0Oscillator Calibration

TC0 Timer/Counter, 8-bit Async

TIFR0Timer/Counter0 Interrupt Flag Register

Address
0x35 I/O 0x15
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1OCF0A
  8. 0TOV0
2 fields
FieldBitsWhat it does
OCF0A1Output Compare Flag 0A
TOV00Timer/Counter0 Overflow Flag

GTCCRGeneral Timer Counter Control register

Address
0x43 I/O 0x23
Reset
0x00
Access
read/write
  1. 7TSM
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1PSR0
  8. 0PSR1
3 fields
FieldBitsWhat it does
TSM7Timer/Counter Synchronization Mode
PSR01Prescaler Reset Asynchronous 8-bit Timer/Counter0
PSR10Prescaler Reset Synchronous 16-bit Timer/Counter1

TCCR0ATimer/Counter0 Control Register A

Address
0x45 I/O 0x25
Reset
0x00
Access
read/write
  1. 7COM0A1
  2. 6COM0A0
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1WGM01
  8. 0WGM00
2 fields
FieldBitsWhat it does
COM0A7:6Compare Output Mode bits
WGM01:0Waveform Generation Mode bits

TCCR0BTimer/Counter0 Control Register B

Address
0x46 I/O 0x26
Reset
0x00
Access
read/write
  1. 7FOC0A
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2CS02
  7. 1CS01
  8. 0CS00
2 fields
FieldBitsWhat it does
FOC0A7Force Output Compare A
CS02:0Clock Select bits
  • 0 No Clock Source (Stopped)
  • 1 Running, No Prescaling
  • 2 Running, CLK/8
  • 3 Running, CLK/32
  • 4 Running, CLK/64
  • 5 Running, CLK/128
  • 6 Running, CLK/256
  • 7 Running, CLK/1024

TCNT0Timer/Counter0

Address
0x47 I/O 0x27
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

OCR0ATimer/Counter0 Output Compare Register A

Address
0x48 I/O 0x28
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

TIMSK0Timer/Counter0 Interrupt Mask register

Address
0x6E
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1OCIE0A
  8. 0TOIE0
2 fields
FieldBitsWhat it does
OCIE0A1Timer/Counter0 Output Compare Match A Interrupt Enable
TOIE00Timer/Counter0 Overflow Interrupt Enable

ASSRAsynchronous Status Register

Address
0xB6
Reset
0x00
Access
read/write
  1. 7–
  2. 6EXCLK
  3. 5AS0
  4. 4TCN0UB
  5. 3OCR0AUB
  6. 2–
  7. 1TCR0AUB
  8. 0TCR0BUB
6 fields
FieldBitsWhat it does
EXCLK6Enable External Clock Input
AS05Asynchronous Timer/Counter0
TCN0UB4Timer/Counter0 Update Busy
OCR0AUB3Output Compare Register 0A Update Busy
TCR0AUB1Timer/Counter0 Control Register A Update Busy
TCR0BUB0Timer/Counter0 Control Register B Update Busy

TC1 Timer/Counter, 16-bit

TIFR1Timer/Counter1 Interrupt Flag register

Address
0x36 I/O 0x16
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5ICF1
  4. 4–
  5. 3–
  6. 2OCF1B
  7. 1OCF1A
  8. 0TOV1
4 fields
FieldBitsWhat it does
ICF15Timer/Counter1 Input Capture Flag
OCF1B2Timer/Counter1 Output Compare B Match Flag
OCF1A1Timer/Counter1 Output Compare A Match Flag
TOV10Timer/Counter1 Overflow Flag

TIMSK1Timer/Counter1 Interrupt Mask Register

Address
0x6F
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5ICIE1
  4. 4–
  5. 3–
  6. 2OCIE1B
  7. 1OCIE1A
  8. 0TOIE1
4 fields
FieldBitsWhat it does
ICIE15Timer/Counter1 Input Capture Interrupt Enable
OCIE1B2Timer/Counter1 Output Compare B Match Interrupt Enable
OCIE1A1Timer/Counter1 Output Compare A Match Interrupt Enable
TOIE10Timer/Counter1 Overflow Interrupt Enable

TCCR1ATimer/Counter1 Control Register A

Address
0x80
Reset
0x00
Access
read/write
  1. 7COM1A1
  2. 6COM1A0
  3. 5COM1B1
  4. 4COM1B0
  5. 3–
  6. 2–
  7. 1WGM11
  8. 0WGM10
3 fields
FieldBitsWhat it does
COM1A7:6Compare Output Mode 1A, bits
COM1B5:4Compare Output Mode 1B, bits
WGM11:0Pulse Width Modulator Select Bits

TCCR1BTimer/Counter1 Control Register B

Address
0x81
Reset
0x00
Access
read/write
  1. 7ICNC1
  2. 6ICES1
  3. 5–
  4. 4WGM11
  5. 3WGM10
  6. 2CS12
  7. 1CS11
  8. 0CS10
4 fields
FieldBitsWhat it does
ICNC17Input Capture 1 Noise Canceler
ICES16Input Capture 1 Edge Select
WGM14:3Waveform Generation Mode Bits
CS12:0Timer/Counter1 Clock Select bits
  • 0 No Clock Source (Stopped)
  • 1 Running, No Prescaling
  • 2 Running, CLK/8
  • 3 Running, CLK/64
  • 4 Running, CLK/256
  • 5 Running, CLK/1024
  • 6 Running, ExtClk Tn Falling Edge
  • 7 Running, ExtClk Tn Rising Edge

TCCR1CTimer/Counter1 Control Register C

Address
0x82
Reset
0x00
Access
read/write
  1. 7FOC1A
  2. 6FOC1B
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–
2 fields
FieldBitsWhat it does
FOC1A7Timer/Counter1 Force Output Compare for Channel A
FOC1B6Timer/Counter1 Force Output Compare for Channel B

TCCR1DTimer/Counter1 Control Register D

Address
0x83
Reset
0x00
Access
read/write
  1. 7OC1BX
  2. 6OC1BW
  3. 5OC1BV
  4. 4OC1BU
  5. 3OC1AX
  6. 2OC1AW
  7. 1OC1AV
  8. 0OC1AU
8 fields
FieldBitsWhat it does
OC1BX7Timer/Counter1 Output Compare X-pin Enable for Channel B
OC1BW6Timer/Counter1 Output Compare W-pin Enable for Channel B
OC1BV5Timer/Counter1 Output Compare V-pin Enable for Channel B
OC1BU4Timer/Counter1 Output Compare U-pin Enable for Channel B
OC1AX3Timer/Counter1 Output Compare X-pin Enable for Channel A
OC1AW2Timer/Counter1 Output Compare W-pin Enable for Channel A
OC1AV1Timer/Counter1 Output Compare V-pin Enable for Channel A
OC1AU0Timer/Counter1 Output Compare U-pin Enable for Channel A

TCNT1Timer/Counter1 Bytes

Address
0x84
Reset
0x0000
Access
read/write
Size
16-bit

ICR1Timer/Counter1 Input Capture Register Bytes

Address
0x86
Reset
0x0000
Access
read/write
Size
16-bit

OCR1ATimer/Counter1 Output Compare Register A Bytes

Address
0x88
Reset
0x0000
Access
read/write
Size
16-bit

OCR1BTimer/Counter1 Output Compare Register B Bytes

Address
0x8A
Reset
0x0000
Access
read/write
Size
16-bit

EXINT External Interrupts

PCIFRPin Change Interrupt Flag Register

Address
0x3B I/O 0x1B
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1PCIF1
  8. 0PCIF0
1 field
FieldBitsWhat it does
PCIF1:0Pin Change Interrupt Flags

EIFRExternal Interrupt Flag Register

Address
0x3C I/O 0x1C
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1INTF1
  8. 0INTF0
1 field
FieldBitsWhat it does
INTF1:0External Interrupt Flags

EIMSKExternal Interrupt Mask Register

Address
0x3D I/O 0x1D
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1INT1
  8. 0INT0
1 field
FieldBitsWhat it does
INT1:0External Interrupt Request 1 Enable

PCICRPin Change Interrupt Control Register

Address
0x68
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1PCIE1
  8. 0PCIE0
1 field
FieldBitsWhat it does
PCIE1:0Pin Change Interrupt Enable on any PCINT14..8 pin

EICRAExternal Interrupt Control Register

Address
0x69
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3ISC11
  6. 2ISC10
  7. 1ISC01
  8. 0ISC00
2 fields
FieldBitsWhat it does
ISC13:2External Interrupt Sense Control 1 Bits
  • 0 Low Level of INTX
  • 1 Any Logical Change in INTX
  • 2 Falling Edge of INTX
  • 3 Rising Edge of INTX
ISC01:0External Interrupt Sense Control 0 Bits
  • 0 Low Level of INTX
  • 1 Any Logical Change in INTX
  • 2 Falling Edge of INTX
  • 3 Rising Edge of INTX

PCMSK0Pin Change Mask Register 0

Address
0x6B
Reset
0x00
Access
read/write
  1. 7PCINT7
  2. 6PCINT6
  3. 5PCINT5
  4. 4PCINT4
  5. 3PCINT3
  6. 2PCINT2
  7. 1PCINT1
  8. 0PCINT0
1 field
FieldBitsWhat it does
PCINT7:0Pin Change Enable Masks

PCMSK1Pin Change Mask Register 1

Address
0x6C
Reset
0x00
Access
read/write
  1. 7PCINT7
  2. 6PCINT6
  3. 5PCINT5
  4. 4PCINT4
  5. 3PCINT3
  6. 2PCINT2
  7. 1PCINT1
  8. 0PCINT0
1 field
FieldBitsWhat it does
PCINT7:0Pin Change Enable Masks

EEPROM EEPROM

EECREEPROM Control Register

Address
0x3F I/O 0x1F
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5EEPM1
  4. 4EEPM0
  5. 3EERIE
  6. 2EEMPE
  7. 1EEPE
  8. 0EERE
5 fields
FieldBitsWhat it does
EEPM5:4EEPROM Programming Mode Bits
  • 0 Erase and Write in one operation
  • 1 Erase Only
  • 2 Write Only
EERIE3EEPROM Ready Interrupt Enable
EEMPE2EEPROM Master Write Enable
EEPE1EEPROM Write Enable
EERE0EEPROM Read Enable

EEDREEPROM Data Register

Address
0x40 I/O 0x20
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

EEAREEPROM Address Register Bytes

Address
0x41 I/O 0x21
Reset
0x0000
Access
read/write
Size
16-bit

SPI Serial Peripheral Interface

SPCRSPI Control Register

Address
0x4C I/O 0x2C
Reset
0x00
Access
read/write
  1. 7SPIE
  2. 6SPE
  3. 5DORD
  4. 4MSTR
  5. 3CPOL
  6. 2CPHA
  7. 1SPR1
  8. 0SPR0
7 fields
FieldBitsWhat it does
SPIE7SPI Interrupt Enable
SPE6SPI Enable
DORD5Data Order
MSTR4Master/Slave Select
CPOL3Clock polarity
CPHA2Clock Phase
SPR1:0SPI Clock Rate Selects
  • 0 fosc/4
  • 1 fosc/16
  • 2 fosc/64
  • 3 fosc/128
  • 4 fosc/2
  • 5 fosc/8
  • 6 fosc/32
  • 7 fosc/64

SPSRSPI Status Register

Address
0x4D I/O 0x2D
Reset
0x00
Access
read/write
  1. 7SPIF
  2. 6WCOL
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0SPI2X
3 fields
FieldBitsWhat it does
SPIF7SPI Interrupt Flag
WCOL6Write Collision Flag
SPI2X0Double SPI Speed Bit

SPDRSPI Data Register

Address
0x4E I/O 0x2E
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

AC Analog Comparator

ACSRAnalog Comparator Control And Status Register

Address
0x50 I/O 0x30
Reset
0x00
Access
read/write
  1. 7ACD
  2. 6ACIRS
  3. 5ACO
  4. 4ACI
  5. 3ACIE
  6. 2ACIC
  7. 1ACIS1
  8. 0ACIS0
7 fields
FieldBitsWhat it does
ACD7Analog Comparator Disable
ACIRS6Analog Comparator Internal Reference Select
ACO5Analog Compare Output
ACI4Analog Comparator Interrupt Flag
ACIE3Analog Comparator Interrupt Enable
ACIC2Analog Comparator Input Capture Enable
ACIS1:0Analog Comparator Interrupt Mode Select bits
  • 0 Interrupt on Toggle
  • 1 Reserved
  • 2 Interrupt on Falling Edge
  • 3 Interrupt on Rising Edge

ADCSRBAnalog Comparator & ADC Control and Status Register B (Shared with AD_CONVERTER IO_MODULE)

Address
0x7B
Reset
0x00
Access
read/write
  1. 7–
  2. 6ACME
  3. 5ACIR1
  4. 4ACIR0
  5. 3–
  6. 2–
  7. 1–
  8. 0–
2 fields
FieldBitsWhat it does
ACME6Analog Comparator Multiplexer Enable
ACIR5:4Analog Comparator Internal Voltage Reference Select Bits

BOOT_LOAD Bootloader

SPMCSRStore Program Memory Control Register

Address
0x57 I/O 0x37
Reset
0x00
Access
read/write
  1. 7–
  2. 6RWWSB
  3. 5SIGRD
  4. 4CTPB
  5. 3RFLB
  6. 2PGWRT
  7. 1PGERS
  8. 0SPMEN
7 fields
FieldBitsWhat it does
RWWSB6Read While Write Section Busy
SIGRD5Signature Row Read
CTPB4Clear Temporary Page Buffer
RFLB3Read Fuse and Lock Bits
PGWRT2Page Write
PGERS1Page Erase
SPMEN0Store Program Memory Enable

WDT Watchdog Timer

WDTCRWatchdog Timer Control Register

Address
0x60
Reset
0x00
Access
read/write
  1. 7WDIF
  2. 6WDIE
  3. 5WDP5
  4. 4WDCE
  5. 3WDE
  6. 2WDP2
  7. 1WDP1
  8. 0WDP0
5 fields
FieldBitsWhat it does
WDIF7Watchdog Timeout Interrupt Flag
WDIE6Watchdog Timeout Interrupt Enable
WDP5,2,1,0Watchdog Timer Prescaler Bits
  • 0 Oscillator Cycles 2K
  • 1 Oscillator Cycles 4K
  • 2 Oscillator Cycles 8K
  • 3 Oscillator Cycles 16K
  • 4 Oscillator Cycles 32K
  • 5 Oscillator Cycles 64K
  • 6 Oscillator Cycles 128K
  • 7 Oscillator Cycles 256K
  • 8 Oscillator Cycles 512K
  • 9 Oscillator Cycles 1024K
WDCE4Watchdog Change Enable
WDE3Watch Dog Enable

ADC Analog-to-Digital Converter

AMISCRAnalog Miscellaneous Control Register (Shared with CURRENT_SOURCE IO_MODULE)

Address
0x77
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2AREFEN
  7. 1XREFEN
  8. 0–
2 fields
FieldBitsWhat it does
AREFEN2External Voltage Reference Input Enable
XREFEN1Internal Voltage Reference Output Enable

ADCADC Data Register Bytes

Address
0x78
Reset
0x0000
Access
read/write
Size
16-bit

ADCSRAThe ADC Control and Status register A

Address
0x7A
Reset
0x00
Access
read/write
  1. 7ADEN
  2. 6ADSC
  3. 5ADATE
  4. 4ADIF
  5. 3ADIE
  6. 2ADPS2
  7. 1ADPS1
  8. 0ADPS0
6 fields
FieldBitsWhat it does
ADEN7ADC Enable
ADSC6ADC Start Conversion
ADATE5ADC Auto Trigger Enable
ADIF4ADC Interrupt Flag
ADIE3ADC Interrupt Enable
ADPS2:0ADC Prescaler Select Bits
  • 0 2
  • 1 2
  • 2 4
  • 3 8
  • 4 16
  • 5 32
  • 6 64
  • 7 128

ADCSRBThe ADC Control and Status register B (Shared with ANALOG_COMPARATOR IO_MODULE)

Address
0x7B
Reset
0x00
Access
read/write
  1. 7BIN
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2ADTS2
  7. 1ADTS1
  8. 0ADTS0
2 fields
FieldBitsWhat it does
BIN7Bipolar Input Mode
ADTS2:0ADC Auto Trigger Source bits
  • 0 Free Running mode
  • 1 Analog Comparator
  • 2 External Interrupt Request 0
  • 3 Timer/Counter1 Compare Match A
  • 4 Timer/Counter1 Overflow
  • 5 Timer/Counter1 Compare Match B
  • 6 Timer/Counter1 Capture Event
  • 7 Watchdog Interrupt Request

ADMUXThe ADC multiplexer Selection Register

Address
0x7C
Reset
0x00
Access
read/write
  1. 7REFS1
  2. 6REFS0
  3. 5ADLAR
  4. 4MUX4
  5. 3MUX3
  6. 2MUX2
  7. 1MUX1
  8. 0MUX0
3 fields
FieldBitsWhat it does
REFS7:6Reference Selection Bits
  • 0 If AREFEN==0 then Internal AVCC as Voltage Reference. If AREFEN==1 then AREF pin as Voltage Reference.
  • 1 If AREFEN==0 then Internal 1.1V as Voltage Reference without external capacitor. If AREFEN==1 then Internal 1.1V as Voltage Reference with external capacitor at AREF pin.
  • 2 If AREFEN==0 then Internal AVCC as Voltage Reference. If AREFEN==1 then AREF pin as Voltage Reference.
  • 3 If AREFEN==0 then Internal 2.56V as Voltage Reference without external capacitor. If AREFEN==1 then Internal 2.56V as Voltage Reference with external capacitor at AREF pin.
ADLAR5Left Adjust Result
MUX4:0Analog Channel and Gain Selection Bits

DIDR0Digital Input Disable Register 0

Address
0x7E
Reset
0x00
Access
read/write
  1. 7ADC7D
  2. 6ADC6D
  3. 5ADC5D
  4. 4ADC4D
  5. 3ADC3D
  6. 2ADC2D
  7. 1ADC1D
  8. 0ADC0D
8 fields
FieldBitsWhat it does
ADC7D7
ADC6D6
ADC5D5
ADC4D4
ADC3D3
ADC2D2
ADC1D1
ADC0D0

DIDR1Digital Input Disable Register 1

Address
0x7F
Reset
0x00
Access
read/write
  1. 7–
  2. 6ADC10D
  3. 5ADC9D
  4. 4ADC8D
  5. 3–
  6. 2–
  7. 1–
  8. 0–
3 fields
FieldBitsWhat it does
ADC10D6
ADC9D5
ADC8D4

CURRENT_SOURCE Current Source

AMISCRAnalog Miscellaneous Control Register (Shared with AD_CONVERTER IO_MODULE)

Address
0x77
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0ISRCEN
1 field
FieldBitsWhat it does
ISRCEN0Current Source Enable

USI Universal Serial Interface

USICRUSI Control Register

Address
0xB8
Reset
0x00
Access
read/write
  1. 7USISIE
  2. 6USIOIE
  3. 5USIWM1
  4. 4USIWM0
  5. 3USICS1
  6. 2USICS0
  7. 1USICLK
  8. 0USITC
6 fields
FieldBitsWhat it does
USISIE7Start Condition Interrupt Enable
USIOIE6Counter Overflow Interrupt Enable
USIWM5:4USI Wire Mode Bits
  • 0 Normal Operation
  • 1 Three-Wire Mode
  • 2 Two-Wire Mode
  • 3 Two-Wire Mode Held Low
USICS3:2USI Clock Source Select Bits
USICLK1Clock Strobe
USITC0Toggle Clock Port Pin

USISRUSI Status Register

Address
0xB9
Reset
0x00
Access
read/write
  1. 7USISIF
  2. 6USIOIF
  3. 5USIPF
  4. 4USIDC
  5. 3USICNT3
  6. 2USICNT2
  7. 1USICNT1
  8. 0USICNT0
5 fields
FieldBitsWhat it does
USISIF7Start Condition Interrupt Flag
USIOIF6Counter Overflow Interrupt Flag
USIPF5Stop Condition Flag
USIDC4Data Output Collision
USICNT3:0USI Counter Value Bits

USIDRUSI Data Register

Address
0xBA
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

USIBRUSI Buffer Register

Address
0xBB
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

USIPPUSI Pin Position

Address
0xBC
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3–
  6. 2–
  7. 1–
  8. 0–

LINUART Local Interconnect Network

LINCRLIN Control Register

Address
0xC8
Reset
0x00
Access
read/write
  1. 7LSWRES
  2. 6LIN13
  3. 5LCONF1
  4. 4LCONF0
  5. 3LENA
  6. 2LCMD2
  7. 1LCMD1
  8. 0LCMD0
5 fields
FieldBitsWhat it does
LSWRES7Software Reset
LIN136LIN Standard
LCONF5:4LIN Configuration bits
LENA3LIN or UART Enable
LCMD2:0LIN Command and Mode bits

LINSIRLIN Status and Interrupt Register

Address
0xC9
Reset
0x00
Access
read/write
  1. 7LIDST2
  2. 6LIDST1
  3. 5LIDST0
  4. 4LBUSY
  5. 3LERR
  6. 2LIDOK
  7. 1LTXOK
  8. 0LRXOK
6 fields
FieldBitsWhat it does
LIDST7:5Identifier Status bits
LBUSY4Busy Signal
LERR3Error Interrupt
LIDOK2Identifier Interrupt
LTXOK1Transmit Performed Interrupt
LRXOK0Receive Performed Interrupt

LINENIRLIN Enable Interrupt Register

Address
0xCA
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3LENERR
  6. 2LENIDOK
  7. 1LENTXOK
  8. 0LENRXOK
4 fields
FieldBitsWhat it does
LENERR3Enable Error Interrupt
LENIDOK2Enable Identifier Interrupt
LENTXOK1Enable Transmit Performed Interrupt
LENRXOK0Enable Receive Performed Interrupt

LINERRLIN Error Register

Address
0xCB
Reset
0x00
Access
read/write
  1. 7LABORT
  2. 6LTOERR
  3. 5LOVERR
  4. 4LFERR
  5. 3LSERR
  6. 2LPERR
  7. 1LCERR
  8. 0LBERR
8 fields
FieldBitsWhat it does
LABORT7Abort Flag
LTOERR6Frame Time Out Error Flag
LOVERR5Overrun Error Flag
LFERR4Framing Error Flag
LSERR3Synchronization Error Flag
LPERR2Parity Error Flag
LCERR1Checksum Error Flag
LBERR0Bit Error Flag

LINBTRLIN Bit Timing Register

Address
0xCC
Reset
0x00
Access
read/write
  1. 7LDISR
  2. 6–
  3. 5LBT5
  4. 4LBT4
  5. 3LBT3
  6. 2LBT2
  7. 1LBT1
  8. 0LBT0
2 fields
FieldBitsWhat it does
LDISR7Disable Bit Timing Resynchronization
LBT5:0LIN Bit Timing bits

LINBRRLLIN Baud Rate Low Register

Address
0xCD
Reset
0x00
Access
read/write
  1. 7LDIV7
  2. 6LDIV6
  3. 5LDIV5
  4. 4LDIV4
  5. 3LDIV3
  6. 2LDIV2
  7. 1LDIV1
  8. 0LDIV0
1 field
FieldBitsWhat it does
LDIV7:0

LINBRRHLIN Baud Rate High Register

Address
0xCE
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3LDIV3
  6. 2LDIV2
  7. 1LDIV1
  8. 0LDIV0
1 field
FieldBitsWhat it does
LDIV3:0

LINDLRLIN Data Length Register

Address
0xCF
Reset
0x00
Access
read/write
  1. 7LTXDL3
  2. 6LTXDL2
  3. 5LTXDL1
  4. 4LTXDL0
  5. 3LRXDL3
  6. 2LRXDL2
  7. 1LRXDL1
  8. 0LRXDL0
2 fields
FieldBitsWhat it does
LTXDL7:4LIN Transmit Data Length bits
LRXDL3:0LIN Receive Data Length bits

LINIDRLIN Identifier Register

Address
0xD0
Reset
0x00
Access
read/write
  1. 7LP1
  2. 6LP0
  3. 5LID5
  4. 4LID4
  5. 3LID3
  6. 2LID2
  7. 1LID1
  8. 0LID0
2 fields
FieldBitsWhat it does
LP7:6Parity bits
LID5:0Identifier bit 5 or Data Length bits

LINSELLIN Data Buffer Selection Register

Address
0xD1
Reset
0x00
Access
read/write
  1. 7–
  2. 6–
  3. 5–
  4. 4–
  5. 3LAINC
  6. 2LINDX2
  7. 1LINDX1
  8. 0LINDX0
2 fields
FieldBitsWhat it does
LAINC3Auto Increment of Data Buffer Index (Active Low)
LINDX2:0FIFO LIN Data Buffer Index bits

LINDATLIN Data Register

Address
0xD2
Reset
0x00
Access
read/write
  1. 7LDATA7
  2. 6LDATA6
  3. 5LDATA5
  4. 4LDATA4
  5. 3LDATA3
  6. 2LDATA2
  7. 1LDATA1
  8. 0LDATA0
1 field
FieldBitsWhat it does
LDATA7:0