ATxmega16E5 registers All 379 registers by peripheral, at their data-space address (the I/O address IN and OUT use is shown beside it), with their reset value and every bit.
GPIO General Purpose IO GPIOR0General Purpose IO Register 0
Address 0x00
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – GPIOR1General Purpose IO Register 1
Address 0x01
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – GPIOR2General Purpose IO Register 2
Address 0x02
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – GPIOR3General Purpose IO Register 3
Address 0x03
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – VPORT0 Virtual Ports DIRI/O Port Data Direction
Address 0x10
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – OUTI/O Port Output
Address 0x11
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – INI/O Port Input
Address 0x12
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – INTFLAGSInterrupt Flag Register
Address 0x13
Reset 0x00
Access read/write 7 INT7IF 6 INT6IF 5 INT5IF 4 INT4IF 3 INT3IF 2 INT2IF 1 INT1IF 0 INT0IF 8 fields
Field Bits What it does INT7IF 7 Interrupt Pin 7 Flag INT6IF 6 Interrupt Pin 6 Flag INT5IF 5 Interrupt Pin 5 Flag INT4IF 4 Interrupt Pin 4 Flag INT3IF 3 Interrupt Pin 3 Flag INT2IF 2 Interrupt Pin 2 Flag INT1IF 1 Interrupt Pin 1 Flag INT0IF 0 Interrupt Pin 0 Flag
VPORT1 Virtual Ports DIRI/O Port Data Direction
Address 0x14
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – OUTI/O Port Output
Address 0x15
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – INI/O Port Input
Address 0x16
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – INTFLAGSInterrupt Flag Register
Address 0x17
Reset 0x00
Access read/write 7 INT7IF 6 INT6IF 5 INT5IF 4 INT4IF 3 INT3IF 2 INT2IF 1 INT1IF 0 INT0IF 8 fields
Field Bits What it does INT7IF 7 Interrupt Pin 7 Flag INT6IF 6 Interrupt Pin 6 Flag INT5IF 5 Interrupt Pin 5 Flag INT4IF 4 Interrupt Pin 4 Flag INT3IF 3 Interrupt Pin 3 Flag INT2IF 2 Interrupt Pin 2 Flag INT1IF 1 Interrupt Pin 1 Flag INT0IF 0 Interrupt Pin 0 Flag
VPORT2 Virtual Ports DIRI/O Port Data Direction
Address 0x18
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – OUTI/O Port Output
Address 0x19
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – INI/O Port Input
Address 0x1A
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – INTFLAGSInterrupt Flag Register
Address 0x1B
Reset 0x00
Access read/write 7 INT7IF 6 INT6IF 5 INT5IF 4 INT4IF 3 INT3IF 2 INT2IF 1 INT1IF 0 INT0IF 8 fields
Field Bits What it does INT7IF 7 Interrupt Pin 7 Flag INT6IF 6 Interrupt Pin 6 Flag INT5IF 5 Interrupt Pin 5 Flag INT4IF 4 Interrupt Pin 4 Flag INT3IF 3 Interrupt Pin 3 Flag INT2IF 2 Interrupt Pin 2 Flag INT1IF 1 Interrupt Pin 1 Flag INT0IF 0 Interrupt Pin 0 Flag
VPORT3 Virtual Ports DIRI/O Port Data Direction
Address 0x1C
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – OUTI/O Port Output
Address 0x1D
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – INI/O Port Input
Address 0x1E
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – INTFLAGSInterrupt Flag Register
Address 0x1F
Reset 0x00
Access read/write 7 INT7IF 6 INT6IF 5 INT5IF 4 INT4IF 3 INT3IF 2 INT2IF 1 INT1IF 0 INT0IF 8 fields
Field Bits What it does INT7IF 7 Interrupt Pin 7 Flag INT6IF 6 Interrupt Pin 6 Flag INT5IF 5 Interrupt Pin 5 Flag INT4IF 4 Interrupt Pin 4 Flag INT3IF 3 Interrupt Pin 3 Flag INT2IF 2 Interrupt Pin 2 Flag INT1IF 1 Interrupt Pin 1 Flag INT0IF 0 Interrupt Pin 0 Flag
OCD On-Chip Debug System OCDR0OCD Register 0
Address 0x2E I/O 0x0E
Reset 0x00
Access read/write 7 OCDRD7 6 OCDRD6 5 OCDRD5 4 OCDRD4 3 OCDRD3 2 OCDRD2 1 OCDRD1 0 OCDRD0 1 field
Field Bits What it does OCDRD 7:0 OCDR Dirty
OCDR1OCD Register 1
Address 0x2F I/O 0x0F
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 OCDRD 1 field
Field Bits What it does OCDRD 0 OCDR Dirty
CPU CPU CCPConfiguration Change Protection
Address 0x34 I/O 0x14
Reset 0x00
Access read/write 7 CCP7 6 CCP6 5 CCP5 4 CCP4 3 CCP3 2 CCP2 1 CCP1 0 CCP0 1 field
Field Bits What it does CCP 7:0 CCP signature157 SPM Instruction Protection216 IO Register Protection
RAMPDRamp D
Address 0x38 I/O 0x18
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – RAMPXRamp X
Address 0x39 I/O 0x19
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – RAMPYRamp Y
Address 0x3A I/O 0x1A
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – RAMPZRamp Z
Address 0x3B I/O 0x1B
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – EINDExtended Indirect Jump
Address 0x3C I/O 0x1C
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – SPLStack Pointer Low
Address 0x3D I/O 0x1D
Reset 0xFF
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – SPHStack Pointer High
Address 0x3E I/O 0x1E
Reset 0x27
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – SREGStatus Register
Address 0x3F I/O 0x1F
Reset 0x00
Access read/write 7 I 6 T 5 H 4 S 3 V 2 N 1 Z 0 C 8 fields
Field Bits What it does I 7 Global Interrupt Enable Flag T 6 Transfer Bit H 5 Half Carry Flag S 4 N Exclusive Or V Flag V 3 Two's Complement Overflow Flag N 2 Negative Flag Z 1 Zero Flag C 0 Carry Flag
CLK Clock System CTRLControl Register
Address 0x40 I/O 0x20
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 SCLKSEL2 1 SCLKSEL1 0 SCLKSEL0 1 field
Field Bits What it does SCLKSEL 2:0 System Clock Selection0 Internal 2 MHz RC Oscillator1 Internal 32 MHz RC Oscillator2 Internal 32.768 kHz RC Oscillator3 External Crystal Oscillator or Clock4 Phase Locked Loop5 Internal 8 MHz RC Oscillator
PSCTRLPrescaler Control Register
Address 0x41 I/O 0x21
Reset 0x00
Access read/write 7 – 6 PSADIV4 5 PSADIV3 4 PSADIV2 3 PSADIV1 2 PSADIV0 1 PSBCDIV1 0 PSBCDIV0 2 fields
Field Bits What it does PSADIV 6:2 Prescaler A Division Factor0 Divide by 11 Divide by 23 Divide by 45 Divide by 87 Divide by 169 Divide by 3211 Divide by 6413 Divide by 12815 Divide by 25617 Divide by 51219 Divide by 621 Divide by 1023 Divide by 1225 Divide by 2427 Divide by 48 PSBCDIV 1:0 Prescaler B and C Division factor0 Divide B by 1 and C by 11 Divide B by 1 and C by 22 Divide B by 4 and C by 13 Divide B by 2 and C by 2
LOCKLock register
Address 0x42 I/O 0x22
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 LOCK 1 field
Field Bits What it does LOCK 0 Clock System Lock
RTCCTRLRTC Control Register
Address 0x43 I/O 0x23
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 RTCSRC2 2 RTCSRC1 1 RTCSRC0 0 RTCEN 2 fields
Field Bits What it does RTCSRC 3:1 Clock Source0 1.024 kHz from internal 32kHz ULP1 1.024 kHz from 32.768 kHz crystal oscillator on TOSC2 1.024 kHz from internal 32.768 kHz RC oscillator5 32.768 kHz from 32.768 kHz crystal oscillator on TOSC6 32.768 kHz from internal 32.768 kHz RC oscillator7 External Clock from TOSC1 RTCEN 0 Clock Source Enable
SLEEP Sleep Controller CTRLControl Register
Address 0x48 I/O 0x28
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 SMODE2 2 SMODE1 1 SMODE0 0 SEN 2 fields
Field Bits What it does SMODE 3:1 Sleep Mode0 Idle mode2 Power-down Mode3 Power-save Mode6 Standby Mode7 Extended Standby Mode SEN 0 Sleep Enable
OSC Oscillator CTRLControl Register
Address 0x50 I/O 0x30
Reset 0x00
Access read/write 7 – 6 RC8MLPM 5 RC8MEN 4 PLLEN 3 XOSCEN 2 RC32KEN 1 RC32MEN 0 RC2MEN 7 fields
Field Bits What it does RC8MLPM 6 Internal 8 MHz RC Low Power Mode Enable RC8MEN 5 Internal 8 MHz RC Oscillator Enable PLLEN 4 PLL Enable XOSCEN 3 External Oscillator Enable RC32KEN 2 Internal 32.768 kHz RC Oscillator Enable RC32MEN 1 Internal 32 MHz RC Oscillator Enable RC2MEN 0 Internal 2 MHz RC Oscillator Enable
STATUSStatus Register
Address 0x51 I/O 0x31
Reset 0x00
Access read/write 7 – 6 – 5 RC8MRDY 4 PLLRDY 3 XOSCRDY 2 RC32KRDY 1 RC32MRDY 0 RC2MRDY 6 fields
Field Bits What it does RC8MRDY 5 Internal 8 MHz RC Oscillator Ready PLLRDY 4 PLL Ready XOSCRDY 3 External Oscillator Ready RC32KRDY 2 Internal 32.768 kHz RC Oscillator Ready RC32MRDY 1 Internal 32 MHz RC Oscillator Ready RC2MRDY 0 Internal 2 MHz RC Oscillator Ready
XOSCCTRLExternal Oscillator Control Register
Address 0x52 I/O 0x32
Reset 0x00
Access read/write 7 FRQRANGE1 6 FRQRANGE0 5 X32KLPM 4 XOSCSEL4 3 XOSCSEL3 2 XOSCSEL2 1 XOSCSEL1 0 XOSCSEL0 4 fields
Field Bits What it does FRQRANGE 7:6 Frequency Range0 0.4 - 2 MHz1 2 - 9 MHz2 9 - 12 MHz3 12 - 16 MHz X32KLPM 5 32.768 kHz XTAL OSC Low-power Mode XOSCSEL 4:0 External Oscillator Selection and Startup Time0 External Clock on port R1 - 6 CLK2 32.768 kHz TOSC - 32K CLK3 0.4-16 MHz XTAL - 256 CLK7 0.4-16 MHz XTAL - 1K CLK11 0.4-16 MHz XTAL - 16K CLK20 External Clock on port C4 - 6 CLK XOSCPWR 4 16 MHz Crystal Oscillator High Power mode
XOSCFAILOscillator Failure Detection Register
Address 0x53 I/O 0x33
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 PLLFDIF 2 PLLFDEN 1 XOSCFDIF 0 XOSCFDEN 4 fields
Field Bits What it does PLLFDIF 3 PLL Failure Detection Interrupt Flag PLLFDEN 2 PLL Failure Detection Enable XOSCFDIF 1 XOSC Failure Detection Interrupt Flag XOSCFDEN 0 XOSC Failure Detection Enable
RC32KCAL32.768 kHz Internal Oscillator Calibration Register
Address 0x54 I/O 0x34
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – PLLCTRLPLL Control Register
Address 0x55 I/O 0x35
Reset 0x00
Access read/write 7 PLLSRC1 6 PLLSRC0 5 PLLDIV 4 PLLFAC4 3 PLLFAC3 2 PLLFAC2 1 PLLFAC1 0 PLLFAC0 3 fields
Field Bits What it does PLLSRC 7:6 Clock Source0 Internal 2 MHz RC Oscillator1 Internal 8 MHz RC Oscillator2 Internal 32 MHz RC Oscillator3 External Oscillator PLLDIV 5 Divide by 2 PLLFAC 4:0 Multiplication Factor
DFLLCTRLDFLL Control Register
Address 0x56 I/O 0x36
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 RC32MCREF1 1 RC32MCREF0 0 – 1 field
Field Bits What it does RC32MCREF 2:1 32 MHz DFLL Calibration Reference0 Internal 32.768 kHz RC Oscillator1 External 32.768 kHz Crystal Oscillator
RC8MCALInternal 8 MHz RC Oscillator Calibration Register
Address 0x57 I/O 0x37
Reset 0x00
Access read/write 7 RC8MCAL7 6 RC8MCAL6 5 RC8MCAL5 4 RC8MCAL4 3 RC8MCAL3 2 RC8MCAL2 1 RC8MCAL1 0 RC8MCAL0 1 field
Field Bits What it does RC8MCAL 7:0 Calibration Bits
DFLLRC32M DFLL CTRLControl Register
Address 0x60
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 ENABLE 1 field
Field Bits What it does ENABLE 0 DFLL Enable
CALACalibration Register A
Address 0x62
Reset 0x00
Access read/write 7 – 6 CALL6 5 CALL5 4 CALL4 3 CALL3 2 CALL2 1 CALL1 0 CALL0 1 field
Field Bits What it does CALL 6:0 DFLL Calibration Value A
CALBCalibration Register B
Address 0x63
Reset 0x00
Access read/write 7 – 6 – 5 CALH5 4 CALH4 3 CALH3 2 CALH2 1 CALH1 0 CALH0 1 field
Field Bits What it does CALH 5:0 DFLL Calibration Value B
COMP0Oscillator Compare Register 0
Address 0x64
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – COMP1Oscillator Compare Register 1
Address 0x65
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – COMP2Oscillator Compare Register 2
Address 0x66
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – PR Power Reduction PRGENGeneral Power Reduction
Address 0x70
Reset 0x00
Access read/write 7 XCL 6 – 5 – 4 – 3 – 2 RTC 1 EVSYS 0 EDMA 4 fields
Field Bits What it does XCL 7 XMEGA Custom Logic RTC 2 Real-time Counter EVSYS 1 Event System EDMA 0 Enhanced DMA-Controller
PRPAPower Reduction Port A
Address 0x71
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 DAC 1 ADC 0 AC 3 fields
Field Bits What it does DAC 2 Port A DAC ADC 1 Port A ADC AC 0 Port A Analog Comparator
PRPCPower Reduction Port C
Address 0x73
Reset 0x00
Access read/write 7 – 6 TWI 5 – 4 USART0 3 SPI 2 HIRES 1 TC5 0 TC4 6 fields
Field Bits What it does TWI 6 Port C Two-wire Interface USART0 4 Port C USART0 SPI 3 Port C SPI HIRES 2 Port C WEX TC5 1 Port C Timer/Counter5 TC4 0 Port C Timer/Counter4
PRPDPower Reduction Port D
Address 0x74
Reset 0x00
Access read/write 7 – 6 – 5 – 4 USART0 3 – 2 – 1 TC5 0 – 2 fields
Field Bits What it does USART0 4 Port D USART0 TC5 1 Port D Timer/Counter5
RST Reset STATUSStatus Register
Address 0x78
Reset 0x00
Access read/write 7 – 6 SDRF 5 SRF 4 PDIRF 3 WDRF 2 BORF 1 EXTRF 0 PORF 7 fields
Field Bits What it does SDRF 6 Spike Detection Reset Flag SRF 5 Software Reset Flag PDIRF 4 Programming and Debug Interface Interface Reset Flag WDRF 3 Watchdog Reset Flag BORF 2 Brown-out Reset Flag EXTRF 1 External Reset Flag PORF 0 Power-on Reset Flag
CTRLControl Register
Address 0x79
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 SWRST 1 field
Field Bits What it does SWRST 0 Software Reset
WDT Watch-Dog Timer CTRLControl
Address 0x80
Reset 0x00
Access read/write 7 – 6 – 5 PER3 4 PER2 3 PER1 2 PER0 1 ENABLE 0 CEN 3 fields
Field Bits What it does PER 5:2 Period0 8 cycles (8ms @ 3.3V)1 16 cycles (16ms @ 3.3V)2 32 cycles (32ms @ 3.3V)3 64 cycles (64ms @ 3.3V)4 128 cycles (0.128s @ 3.3V)5 256 cycles (0.256s @ 3.3V)6 512 cycles (0.512s @ 3.3V)7 1K cycles (1s @ 3.3V)8 2K cycles (2s @ 3.3V)9 4K cycles (4s @ 3.3V)10 8K cycles (8s @ 3.3V) ENABLE 1 Enable CEN 0 Change Enable
WINCTRLWindowed Mode Control
Address 0x81
Reset 0x00
Access read/write 7 – 6 – 5 WPER3 4 WPER2 3 WPER1 2 WPER0 1 WEN 0 WCEN 3 fields
Field Bits What it does WPER 5:2 Windowed Mode Period0 8 cycles (8ms @ 3.3V)1 16 cycles (16ms @ 3.3V)2 32 cycles (32ms @ 3.3V)3 64 cycles (64ms @ 3.3V)4 128 cycles (0.128s @ 3.3V)5 256 cycles (0.256s @ 3.3V)6 512 cycles (0.512s @ 3.3V)7 1K cycles (1s @ 3.3V)8 2K cycles (2s @ 3.3V)9 4K cycles (4s @ 3.3V)10 8K cycles (8s @ 3.3V) WEN 1 Windowed Mode Enable WCEN 0 Windowed Mode Change Enable
STATUSStatus
Address 0x82
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 SYNCBUSY 1 field
Field Bits What it does SYNCBUSY 0 Synchronization busy
MCU MCU Control DEVID0Device ID byte 0
Address 0x90
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – DEVID1Device ID byte 1
Address 0x91
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – DEVID2Device ID byte 2
Address 0x92
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – REVIDRevision ID
Address 0x93
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – ANAINITAnalog Startup Delay
Address 0x97
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 STARTUPDLYA1 0 STARTUPDLYA0 1 field
Field Bits What it does STARTUPDLYA 1:0 Analog startup delay Port A
EVSYSLOCKEvent System Lock
Address 0x98
Reset 0x00
Access read/write 7 – 6 – 5 – 4 EVSYS1LOCK 3 – 2 – 1 – 0 EVSYS0LOCK 2 fields
Field Bits What it does EVSYS1LOCK 4 Event Channel 4-7 Lock EVSYS0LOCK 0 Event Channel 0-3 Lock
WEXLOCKWEX Lock
Address 0x99
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 WEXCLOCK 1 field
Field Bits What it does WEXCLOCK 0 WeX on T/C C4 Lock
FAULTLOCKFAULT Lock
Address 0x9A
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 FAULTC5LOCK 0 FAULTC4LOCK 2 fields
Field Bits What it does FAULTC5LOCK 1 Fault on T/C C5 Lock FAULTC4LOCK 0 Fault on T/C C4 Lock
PMIC Programmable Multi-level Interrupt Controller STATUSStatus Register
Address 0xA0
Reset 0x00
Access read/write 7 NMIEX 6 – 5 – 4 – 3 – 2 HILVLEX 1 MEDLVLEX 0 LOLVLEX 4 fields
Field Bits What it does NMIEX 7 Non-maskable Interrupt Executing HILVLEX 2 High Level Interrupt Executing MEDLVLEX 1 Medium Level Interrupt Executing LOLVLEX 0 Low Level Interrupt Executing
INTPRIInterrupt Priority
Address 0xA1
Reset 0x00
Access read/write 7 INTPRI7 6 INTPRI6 5 INTPRI5 4 INTPRI4 3 INTPRI3 2 INTPRI2 1 INTPRI1 0 INTPRI0 1 field
Field Bits What it does INTPRI 7:0 Interrupt Priority
CTRLControl Register
Address 0xA2
Reset 0x00
Access read/write 7 RREN 6 IVSEL 5 – 4 – 3 – 2 HILVLEN 1 MEDLVLEN 0 LOLVLEN 5 fields
Field Bits What it does RREN 7 Round-Robin Priority Enable IVSEL 6 Interrupt Vector Select HILVLEN 2 High Level Enable MEDLVLEN 1 Medium Level Enable LOLVLEN 0 Low Level Enable
PORTCFG Port Configuration MPCMASKMulti-pin Configuration Mask
Address 0xB0
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – CLKOUTClock Out Register
Address 0xB4
Reset 0x00
Access read/write 7 CLKEVPIN 6 RTCOUT1 5 RTCOUT0 4 – 3 CLKOUTSEL1 2 CLKOUTSEL0 1 CLKOUT1 0 CLKOUT0 4 fields
Field Bits What it does CLKEVPIN 7 Clock and Event Output Pin Select0 Clock and Event Output on PIN 71 Clock and Event Output on PIN 4 RTCOUT 6:5 RTC Clock Output Enable0 System Clock Output Disabled1 System Clock Output on Port C pin 62 System Clock Output on Port D pin 63 System Clock Output on Port R pin 0 CLKOUTSEL 3:2 Clock Output Select0 1x Peripheral Clock Output to pin1 2x Peripheral Clock Output to pin2 4x Peripheral Clock Output to pin CLKOUT 1:0 Clock Output Port0 System Clock Output Disabled1 System Clock Output on Port C pin 72 System Clock Output on Port D pin 73 System Clock Output on Port R pin 0
ACEVOUTAnalog Comparator and Event Out Register
Address 0xB6
Reset 0x00
Access read/write 7 ACOUT1 6 ACOUT0 5 EVOUT1 4 EVOUT0 3 EVASYEN 2 EVOUTSEL2 1 EVOUTSEL1 0 EVOUTSEL0 4 fields
Field Bits What it does ACOUT 7:6 Analog Comparator Output Port0 Analog Comparator Outputs on Port A, Pin 6-71 Analog Comparator Outputs on Port C, Pin 6-72 Analog Comparator Outputs on Port D, Pin 6-73 Analog Comparator Outputs on Port R, Pin 0-1 EVOUT 5:4 Event Channel Output Port0 Event Output Disabled1 Event Channel n Output on Port C pin 72 Event Channel n Output on Port D pin 73 Event Channel n Output on Port R pin 0 EVASYEN 3 Asynchronous Event Enabled EVOUTSEL 2:0 Event Channel Output Selection0 Event Channel 0 output to pin1 Event Channel 1 output to pin2 Event Channel 2 output to pin3 Event Channel 3 output to pin4 Event Channel 4 output to pin5 Event Channel 5 output to pin6 Event Channel 6 output to pin7 Event Channel 7 output to pin
SRLCTRLSlew Rate Limit Control Register
Address 0xB7
Reset 0x00
Access read/write 7 SRLENRR 6 – 5 – 4 – 3 SRLENRD 2 SRLENRC 1 – 0 SRLENRA 4 fields
Field Bits What it does SRLENRR 7 Slew Rate Limit Enable on PORTR SRLENRD 3 Slew Rate Limit Enable on PORTD SRLENRC 2 Slew Rate Limit Enable on PORTC SRLENRA 0 Slew Rate Limit Enable on PORTA
CRC Cyclic Redundancy Checker CTRLControl Register
Address 0xD0
Reset 0x00
Access read/write 7 RESET1 6 RESET0 5 CRC32 4 – 3 SOURCE3 2 SOURCE2 1 SOURCE1 0 SOURCE0 3 fields
Field Bits What it does RESET 7:6 Reset0 No Reset2 Reset CRC with CHECKSUM to all zeros3 Reset CRC with CHECKSUM to all ones CRC32 5 CRC Mode SOURCE 3:0 Input Source0 Disabled1 I/O Interface2 Flash4 DMAC Channel 05 DMAC Channel 16 DMAC Channel 27 DMAC Channel 3
STATUSStatus Register
Address 0xD1
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 ZERO 0 BUSY 2 fields
Field Bits What it does ZERO 1 Zero detection BUSY 0 Busy
DATAINData Input
Address 0xD3
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – CHECKSUM0Checksum byte 0
Address 0xD4
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – CHECKSUM1Checksum byte 1
Address 0xD5
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – CHECKSUM2Checksum byte 2
Address 0xD6
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – CHECKSUM3Checksum byte 3
Address 0xD7
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – EDMA Enhanced DMA Controller CTRLControl
Address 0x100
Reset 0x00
Access read/write 7 ENABLE 6 RESET 5 CHMODE1 4 CHMODE0 3 DBUFMODE1 2 DBUFMODE0 1 PRIMODE1 0 PRIMODE0 5 fields
Field Bits What it does ENABLE 7 Enable RESET 6 Software Reset CHMODE 5:4 Channel Mode0 Channels 0, 1, 2 and 3 in peripheral conf.1 Channel 0 in standard conf.; channels 2 and 3 in peripheral conf.2 Channel 2 in standard conf.; channels 0 and 1 in peripheral conf.3 Channels 0 and 2 in standard conf. DBUFMODE 3:2 Double Buffer Mode0 No double buffer enabled1 Double buffer enabled on peripheral channels 0/1 (if exist) 2 Double buffer enabled on peripheral channels 2/3 (if exist)3 Double buffer enabled on peripheral channels 0/1 and 2/3 or standard channels 0/2 PRIMODE 1:0 Priority Mode0 Round robin on all channels1 Ch0 > round robin (Ch 1 ch2 Ch3)2 Ch0 > Ch 1 > round robin (Ch2 Ch3)3 Ch0 > Ch1 > Ch2 > Ch3
INTFLAGSTransfer Interrupt Status
Address 0x103
Reset 0x00
Access read/write 7 CH3ERRIF 6 CH2ERRIF 5 CH1ERRIF 4 CH0ERRIF 3 CH3TRNFIF 2 CH2TRNFIF 1 CH1TRNFIF 0 CH0TRNFIF 8 fields
Field Bits What it does CH3ERRIF 7 Channel 3 Transaction Error Interrupt Flag CH2ERRIF 6 Channel 2 Transaction Error Interrupt Flag CH1ERRIF 5 Channel 1 Transaction Error Interrupt Flag CH0ERRIF 4 Channel 0 Transaction Error Interrupt Flag CH3TRNFIF 3 Channel 3 Transaction Complete Interrupt Flag CH2TRNFIF 2 Channel 2 Transaction Complete Interrupt Flag CH1TRNFIF 1 Channel 1 Transaction Complete Interrupt Flag CH0TRNFIF 0 Channel 0 Transaction Complete Interrupt Flag
STATUSStatus
Address 0x104
Reset 0x00
Access read/write 7 CH3BUSY 6 CH2BUSY 5 CH1BUSY 4 CH0BUSY 3 CH3PEND 2 CH2PEND 1 CH1PEND 0 CH0PEND 8 fields
Field Bits What it does CH3BUSY 7 Channel 3 Busy Flag CH2BUSY 6 Channel 2 Busy Flag CH1BUSY 5 Channel 1 Busy Flag CH0BUSY 4 Channel 0 Busy Flag CH3PEND 3 Channel 3 Pending Flag CH2PEND 2 Channel 2 Pending Flag CH1PEND 1 Channel 1 Pending Flag CH0PEND 0 Channel 0 Pending Flag
TEMPTemporary Register For 16-bit Access
Address 0x106
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – EVSYS Event System CH0MUXEvent Channel 0 Multiplexer
Address 0x180
Reset 0x00
Access read/write 7 CHMUX7 6 CHMUX6 5 CHMUX5 4 CHMUX4 3 CHMUX3 2 CHMUX2 1 CHMUX1 0 CHMUX0 1 field
Field Bits What it does CHMUX 7:0 Event Channel 0 Multiplexer0 Off8 RTC Overflow9 RTC Compare Match16 Analog Comparator A Channel 017 Analog Comparator A Channel 118 Analog Comparator A Window32 ADC A Channel 080 Port A, Pin081 Port A, Pin182 Port A, Pin283 Port A, Pin384 Port A, Pin485 Port A, Pin586 Port A, Pin687 Port A, Pin796 Port C, Pin097 Port C, Pin198 Port C, Pin299 Port C, Pin3100 Port C, Pin4101 Port C, Pin5102 Port C, Pin6103 Port C, Pin7104 Port D, Pin0105 Port D, Pin1106 Port D, Pin2107 Port D, Pin3108 Port D, Pin4109 Port D, Pin5110 Port D, Pin6111 Port D, Pin7128 Prescaler, divide by 1129 Prescaler, divide by 2130 Prescaler, divide by 4131 Prescaler, divide by 8132 Prescaler, divide by 16133 Prescaler, divide by 32134 Prescaler, divide by 64135 Prescaler, divide by 128136 Prescaler, divide by 256137 Prescaler, divide by 512138 Prescaler, divide by 1024139 Prescaler, divide by 2048140 Prescaler, divide by 4096141 Prescaler, divide by 8192142 Prescaler, divide by 16384143 Prescaler, divide by 32768176 XCL BTC0 underflow177 XCL BTC1 underflow178 XCL BTC0 capture or compare179 XCL BTC1 capture or compare180 XCL PEC0 restart181 XCL PEC1 restart182 XCL LUT0 output183 XCL LUT1 output192 Timer/Counter C4 Overflow193 Timer/Counter C4 Error196 Timer/Counter C4 Compare or Capture A197 Timer/Counter C4 Compare or Capture B198 Timer/Counter C4 Compare or Capture C199 Timer/Counter C4 Compare or Capture D200 Timer/Counter C5 Overflow201 Timer/Counter C5 Error204 Timer/Counter C5 Compare or Capture A205 Timer/Counter C5 Compare or Capture B216 Timer/Counter D5 Overflow217 Timer/Counter D5 Error220 Timer/Counter D5 Compare or Capture A221 Timer/Counter D5 Compare or Capture B
CH1MUXEvent Channel 1 Multiplexer
Address 0x181
Reset 0x00
Access read/write 7 CHMUX7 6 CHMUX6 5 CHMUX5 4 CHMUX4 3 CHMUX3 2 CHMUX2 1 CHMUX1 0 CHMUX0 1 field
Field Bits What it does CHMUX 7:0 Event Channel 1 Multiplexer0 Off8 RTC Overflow9 RTC Compare Match16 Analog Comparator A Channel 017 Analog Comparator A Channel 118 Analog Comparator A Window32 ADC A Channel 080 Port A, Pin081 Port A, Pin182 Port A, Pin283 Port A, Pin384 Port A, Pin485 Port A, Pin586 Port A, Pin687 Port A, Pin796 Port C, Pin097 Port C, Pin198 Port C, Pin299 Port C, Pin3100 Port C, Pin4101 Port C, Pin5102 Port C, Pin6103 Port C, Pin7104 Port D, Pin0105 Port D, Pin1106 Port D, Pin2107 Port D, Pin3108 Port D, Pin4109 Port D, Pin5110 Port D, Pin6111 Port D, Pin7128 Prescaler, divide by 1129 Prescaler, divide by 2130 Prescaler, divide by 4131 Prescaler, divide by 8132 Prescaler, divide by 16133 Prescaler, divide by 32134 Prescaler, divide by 64135 Prescaler, divide by 128136 Prescaler, divide by 256137 Prescaler, divide by 512138 Prescaler, divide by 1024139 Prescaler, divide by 2048140 Prescaler, divide by 4096141 Prescaler, divide by 8192142 Prescaler, divide by 16384143 Prescaler, divide by 32768176 XCL BTC0 underflow177 XCL BTC1 underflow178 XCL BTC0 capture or compare179 XCL BTC1 capture or compare180 XCL PEC0 restart181 XCL PEC1 restart182 XCL LUT0 output183 XCL LUT1 output192 Timer/Counter C4 Overflow193 Timer/Counter C4 Error196 Timer/Counter C4 Compare or Capture A197 Timer/Counter C4 Compare or Capture B198 Timer/Counter C4 Compare or Capture C199 Timer/Counter C4 Compare or Capture D200 Timer/Counter C5 Overflow201 Timer/Counter C5 Error204 Timer/Counter C5 Compare or Capture A205 Timer/Counter C5 Compare or Capture B216 Timer/Counter D5 Overflow217 Timer/Counter D5 Error220 Timer/Counter D5 Compare or Capture A221 Timer/Counter D5 Compare or Capture B
CH2MUXEvent Channel 2 Multiplexer
Address 0x182
Reset 0x00
Access read/write 7 CHMUX7 6 CHMUX6 5 CHMUX5 4 CHMUX4 3 CHMUX3 2 CHMUX2 1 CHMUX1 0 CHMUX0 1 field
Field Bits What it does CHMUX 7:0 Event Channel 2 Multiplexer0 Off8 RTC Overflow9 RTC Compare Match16 Analog Comparator A Channel 017 Analog Comparator A Channel 118 Analog Comparator A Window32 ADC A Channel 080 Port A, Pin081 Port A, Pin182 Port A, Pin283 Port A, Pin384 Port A, Pin485 Port A, Pin586 Port A, Pin687 Port A, Pin796 Port C, Pin097 Port C, Pin198 Port C, Pin299 Port C, Pin3100 Port C, Pin4101 Port C, Pin5102 Port C, Pin6103 Port C, Pin7104 Port D, Pin0105 Port D, Pin1106 Port D, Pin2107 Port D, Pin3108 Port D, Pin4109 Port D, Pin5110 Port D, Pin6111 Port D, Pin7128 Prescaler, divide by 1129 Prescaler, divide by 2130 Prescaler, divide by 4131 Prescaler, divide by 8132 Prescaler, divide by 16133 Prescaler, divide by 32134 Prescaler, divide by 64135 Prescaler, divide by 128136 Prescaler, divide by 256137 Prescaler, divide by 512138 Prescaler, divide by 1024139 Prescaler, divide by 2048140 Prescaler, divide by 4096141 Prescaler, divide by 8192142 Prescaler, divide by 16384143 Prescaler, divide by 32768176 XCL BTC0 underflow177 XCL BTC1 underflow178 XCL BTC0 capture or compare179 XCL BTC1 capture or compare180 XCL PEC0 restart181 XCL PEC1 restart182 XCL LUT0 output183 XCL LUT1 output192 Timer/Counter C4 Overflow193 Timer/Counter C4 Error196 Timer/Counter C4 Compare or Capture A197 Timer/Counter C4 Compare or Capture B198 Timer/Counter C4 Compare or Capture C199 Timer/Counter C4 Compare or Capture D200 Timer/Counter C5 Overflow201 Timer/Counter C5 Error204 Timer/Counter C5 Compare or Capture A205 Timer/Counter C5 Compare or Capture B216 Timer/Counter D5 Overflow217 Timer/Counter D5 Error220 Timer/Counter D5 Compare or Capture A221 Timer/Counter D5 Compare or Capture B
CH3MUXEvent Channel 3 Multiplexer
Address 0x183
Reset 0x00
Access read/write 7 CHMUX7 6 CHMUX6 5 CHMUX5 4 CHMUX4 3 CHMUX3 2 CHMUX2 1 CHMUX1 0 CHMUX0 1 field
Field Bits What it does CHMUX 7:0 Event Channel 3 Multiplexer0 Off8 RTC Overflow9 RTC Compare Match16 Analog Comparator A Channel 017 Analog Comparator A Channel 118 Analog Comparator A Window32 ADC A Channel 080 Port A, Pin081 Port A, Pin182 Port A, Pin283 Port A, Pin384 Port A, Pin485 Port A, Pin586 Port A, Pin687 Port A, Pin796 Port C, Pin097 Port C, Pin198 Port C, Pin299 Port C, Pin3100 Port C, Pin4101 Port C, Pin5102 Port C, Pin6103 Port C, Pin7104 Port D, Pin0105 Port D, Pin1106 Port D, Pin2107 Port D, Pin3108 Port D, Pin4109 Port D, Pin5110 Port D, Pin6111 Port D, Pin7128 Prescaler, divide by 1129 Prescaler, divide by 2130 Prescaler, divide by 4131 Prescaler, divide by 8132 Prescaler, divide by 16133 Prescaler, divide by 32134 Prescaler, divide by 64135 Prescaler, divide by 128136 Prescaler, divide by 256137 Prescaler, divide by 512138 Prescaler, divide by 1024139 Prescaler, divide by 2048140 Prescaler, divide by 4096141 Prescaler, divide by 8192142 Prescaler, divide by 16384143 Prescaler, divide by 32768176 XCL BTC0 underflow177 XCL BTC1 underflow178 XCL BTC0 capture or compare179 XCL BTC1 capture or compare180 XCL PEC0 restart181 XCL PEC1 restart182 XCL LUT0 output183 XCL LUT1 output192 Timer/Counter C4 Overflow193 Timer/Counter C4 Error196 Timer/Counter C4 Compare or Capture A197 Timer/Counter C4 Compare or Capture B198 Timer/Counter C4 Compare or Capture C199 Timer/Counter C4 Compare or Capture D200 Timer/Counter C5 Overflow201 Timer/Counter C5 Error204 Timer/Counter C5 Compare or Capture A205 Timer/Counter C5 Compare or Capture B216 Timer/Counter D5 Overflow217 Timer/Counter D5 Error220 Timer/Counter D5 Compare or Capture A221 Timer/Counter D5 Compare or Capture B
CH4MUXEvent Channel 4 Multiplexer
Address 0x184
Reset 0x00
Access read/write 7 CHMUX7 6 CHMUX6 5 CHMUX5 4 CHMUX4 3 CHMUX3 2 CHMUX2 1 CHMUX1 0 CHMUX0 1 field
Field Bits What it does CHMUX 7:0 Event Channel 4 Multiplexer0 Off8 RTC Overflow9 RTC Compare Match16 Analog Comparator A Channel 017 Analog Comparator A Channel 118 Analog Comparator A Window32 ADC A Channel 080 Port A, Pin081 Port A, Pin182 Port A, Pin283 Port A, Pin384 Port A, Pin485 Port A, Pin586 Port A, Pin687 Port A, Pin796 Port C, Pin097 Port C, Pin198 Port C, Pin299 Port C, Pin3100 Port C, Pin4101 Port C, Pin5102 Port C, Pin6103 Port C, Pin7104 Port D, Pin0105 Port D, Pin1106 Port D, Pin2107 Port D, Pin3108 Port D, Pin4109 Port D, Pin5110 Port D, Pin6111 Port D, Pin7128 Prescaler, divide by 1129 Prescaler, divide by 2130 Prescaler, divide by 4131 Prescaler, divide by 8132 Prescaler, divide by 16133 Prescaler, divide by 32134 Prescaler, divide by 64135 Prescaler, divide by 128136 Prescaler, divide by 256137 Prescaler, divide by 512138 Prescaler, divide by 1024139 Prescaler, divide by 2048140 Prescaler, divide by 4096141 Prescaler, divide by 8192142 Prescaler, divide by 16384143 Prescaler, divide by 32768176 XCL BTC0 underflow177 XCL BTC1 underflow178 XCL BTC0 capture or compare179 XCL BTC1 capture or compare180 XCL PEC0 restart181 XCL PEC1 restart182 XCL LUT0 output183 XCL LUT1 output192 Timer/Counter C4 Overflow193 Timer/Counter C4 Error196 Timer/Counter C4 Compare or Capture A197 Timer/Counter C4 Compare or Capture B198 Timer/Counter C4 Compare or Capture C199 Timer/Counter C4 Compare or Capture D200 Timer/Counter C5 Overflow201 Timer/Counter C5 Error204 Timer/Counter C5 Compare or Capture A205 Timer/Counter C5 Compare or Capture B216 Timer/Counter D5 Overflow217 Timer/Counter D5 Error220 Timer/Counter D5 Compare or Capture A221 Timer/Counter D5 Compare or Capture B
CH5MUXEvent Channel 5 Multiplexer
Address 0x185
Reset 0x00
Access read/write 7 CHMUX7 6 CHMUX6 5 CHMUX5 4 CHMUX4 3 CHMUX3 2 CHMUX2 1 CHMUX1 0 CHMUX0 1 field
Field Bits What it does CHMUX 7:0 Event Channel 5 Multiplexer0 Off8 RTC Overflow9 RTC Compare Match16 Analog Comparator A Channel 017 Analog Comparator A Channel 118 Analog Comparator A Window32 ADC A Channel 080 Port A, Pin081 Port A, Pin182 Port A, Pin283 Port A, Pin384 Port A, Pin485 Port A, Pin586 Port A, Pin687 Port A, Pin796 Port C, Pin097 Port C, Pin198 Port C, Pin299 Port C, Pin3100 Port C, Pin4101 Port C, Pin5102 Port C, Pin6103 Port C, Pin7104 Port D, Pin0105 Port D, Pin1106 Port D, Pin2107 Port D, Pin3108 Port D, Pin4109 Port D, Pin5110 Port D, Pin6111 Port D, Pin7128 Prescaler, divide by 1129 Prescaler, divide by 2130 Prescaler, divide by 4131 Prescaler, divide by 8132 Prescaler, divide by 16133 Prescaler, divide by 32134 Prescaler, divide by 64135 Prescaler, divide by 128136 Prescaler, divide by 256137 Prescaler, divide by 512138 Prescaler, divide by 1024139 Prescaler, divide by 2048140 Prescaler, divide by 4096141 Prescaler, divide by 8192142 Prescaler, divide by 16384143 Prescaler, divide by 32768176 XCL BTC0 underflow177 XCL BTC1 underflow178 XCL BTC0 capture or compare179 XCL BTC1 capture or compare180 XCL PEC0 restart181 XCL PEC1 restart182 XCL LUT0 output183 XCL LUT1 output192 Timer/Counter C4 Overflow193 Timer/Counter C4 Error196 Timer/Counter C4 Compare or Capture A197 Timer/Counter C4 Compare or Capture B198 Timer/Counter C4 Compare or Capture C199 Timer/Counter C4 Compare or Capture D200 Timer/Counter C5 Overflow201 Timer/Counter C5 Error204 Timer/Counter C5 Compare or Capture A205 Timer/Counter C5 Compare or Capture B216 Timer/Counter D5 Overflow217 Timer/Counter D5 Error220 Timer/Counter D5 Compare or Capture A221 Timer/Counter D5 Compare or Capture B
CH6MUXEvent Channel 6 Multiplexer
Address 0x186
Reset 0x00
Access read/write 7 CHMUX7 6 CHMUX6 5 CHMUX5 4 CHMUX4 3 CHMUX3 2 CHMUX2 1 CHMUX1 0 CHMUX0 1 field
Field Bits What it does CHMUX 7:0 Event Channel 6 Multiplexer0 Off8 RTC Overflow9 RTC Compare Match16 Analog Comparator A Channel 017 Analog Comparator A Channel 118 Analog Comparator A Window32 ADC A Channel 080 Port A, Pin081 Port A, Pin182 Port A, Pin283 Port A, Pin384 Port A, Pin485 Port A, Pin586 Port A, Pin687 Port A, Pin796 Port C, Pin097 Port C, Pin198 Port C, Pin299 Port C, Pin3100 Port C, Pin4101 Port C, Pin5102 Port C, Pin6103 Port C, Pin7104 Port D, Pin0105 Port D, Pin1106 Port D, Pin2107 Port D, Pin3108 Port D, Pin4109 Port D, Pin5110 Port D, Pin6111 Port D, Pin7128 Prescaler, divide by 1129 Prescaler, divide by 2130 Prescaler, divide by 4131 Prescaler, divide by 8132 Prescaler, divide by 16133 Prescaler, divide by 32134 Prescaler, divide by 64135 Prescaler, divide by 128136 Prescaler, divide by 256137 Prescaler, divide by 512138 Prescaler, divide by 1024139 Prescaler, divide by 2048140 Prescaler, divide by 4096141 Prescaler, divide by 8192142 Prescaler, divide by 16384143 Prescaler, divide by 32768176 XCL BTC0 underflow177 XCL BTC1 underflow178 XCL BTC0 capture or compare179 XCL BTC1 capture or compare180 XCL PEC0 restart181 XCL PEC1 restart182 XCL LUT0 output183 XCL LUT1 output192 Timer/Counter C4 Overflow193 Timer/Counter C4 Error196 Timer/Counter C4 Compare or Capture A197 Timer/Counter C4 Compare or Capture B198 Timer/Counter C4 Compare or Capture C199 Timer/Counter C4 Compare or Capture D200 Timer/Counter C5 Overflow201 Timer/Counter C5 Error204 Timer/Counter C5 Compare or Capture A205 Timer/Counter C5 Compare or Capture B216 Timer/Counter D5 Overflow217 Timer/Counter D5 Error220 Timer/Counter D5 Compare or Capture A221 Timer/Counter D5 Compare or Capture B
CH7MUXEvent Channel 7 Multiplexer
Address 0x187
Reset 0x00
Access read/write 7 CHMUX7 6 CHMUX6 5 CHMUX5 4 CHMUX4 3 CHMUX3 2 CHMUX2 1 CHMUX1 0 CHMUX0 1 field
Field Bits What it does CHMUX 7:0 Event Channel 7 Multiplexer0 Off8 RTC Overflow9 RTC Compare Match16 Analog Comparator A Channel 017 Analog Comparator A Channel 118 Analog Comparator A Window32 ADC A Channel 080 Port A, Pin081 Port A, Pin182 Port A, Pin283 Port A, Pin384 Port A, Pin485 Port A, Pin586 Port A, Pin687 Port A, Pin796 Port C, Pin097 Port C, Pin198 Port C, Pin299 Port C, Pin3100 Port C, Pin4101 Port C, Pin5102 Port C, Pin6103 Port C, Pin7104 Port D, Pin0105 Port D, Pin1106 Port D, Pin2107 Port D, Pin3108 Port D, Pin4109 Port D, Pin5110 Port D, Pin6111 Port D, Pin7128 Prescaler, divide by 1129 Prescaler, divide by 2130 Prescaler, divide by 4131 Prescaler, divide by 8132 Prescaler, divide by 16133 Prescaler, divide by 32134 Prescaler, divide by 64135 Prescaler, divide by 128136 Prescaler, divide by 256137 Prescaler, divide by 512138 Prescaler, divide by 1024139 Prescaler, divide by 2048140 Prescaler, divide by 4096141 Prescaler, divide by 8192142 Prescaler, divide by 16384143 Prescaler, divide by 32768176 XCL BTC0 underflow177 XCL BTC1 underflow178 XCL BTC0 capture or compare179 XCL BTC1 capture or compare180 XCL PEC0 restart181 XCL PEC1 restart182 XCL LUT0 output183 XCL LUT1 output192 Timer/Counter C4 Overflow193 Timer/Counter C4 Error196 Timer/Counter C4 Compare or Capture A197 Timer/Counter C4 Compare or Capture B198 Timer/Counter C4 Compare or Capture C199 Timer/Counter C4 Compare or Capture D200 Timer/Counter C5 Overflow201 Timer/Counter C5 Error204 Timer/Counter C5 Compare or Capture A205 Timer/Counter C5 Compare or Capture B216 Timer/Counter D5 Overflow217 Timer/Counter D5 Error220 Timer/Counter D5 Compare or Capture A221 Timer/Counter D5 Compare or Capture B
CH0CTRLChannel 0 Control Register
Address 0x188
Reset 0x00
Access read/write 7 ROTARY 6 QDIRM1 5 QDIRM0 4 QDIEN 3 QDEN 2 DIGFILT2 1 DIGFILT1 0 DIGFILT0 5 fields
Field Bits What it does ROTARY 7 Rotary Decoder Enable QDIRM 6:5 Quadrature Decoder Index Recognition Mode0 QDPH0 = 0, QDPH90 = 01 QDPH0 = 0, QDPH90 = 12 QDPH0 = 1, QDPH90 = 03 QDPH0 = 1, QDPH90 = 1 QDIEN 4 Quadrature Decoder Index Enable QDEN 3 Quadrature Decoder Enable DIGFILT 2:0 Digital Filter0 1 SAMPLE1 2 SAMPLES2 3 SAMPLES3 4 SAMPLES4 5 SAMPLES5 6 SAMPLES6 7 SAMPLES7 8 SAMPLES
CH1CTRLChannel 1 Control Register
Address 0x189
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 DIGFILT2 1 DIGFILT1 0 DIGFILT0 1 field
Field Bits What it does DIGFILT 2:0 Digital Filter0 1 SAMPLE1 2 SAMPLES2 3 SAMPLES3 4 SAMPLES4 5 SAMPLES5 6 SAMPLES6 7 SAMPLES7 8 SAMPLES
CH2CTRLChannel 2 Control Register
Address 0x18A
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 DIGFILT2 1 DIGFILT1 0 DIGFILT0 1 field
Field Bits What it does DIGFILT 2:0 Digital Filter0 1 SAMPLE1 2 SAMPLES2 3 SAMPLES3 4 SAMPLES4 5 SAMPLES5 6 SAMPLES6 7 SAMPLES7 8 SAMPLES
CH3CTRLChannel 3 Control Register
Address 0x18B
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 DIGFILT2 1 DIGFILT1 0 DIGFILT0 1 field
Field Bits What it does DIGFILT 2:0 Digital Filter0 1 SAMPLE1 2 SAMPLES2 3 SAMPLES3 4 SAMPLES4 5 SAMPLES5 6 SAMPLES6 7 SAMPLES7 8 SAMPLES
CH4CTRLChannel 4 Control Register
Address 0x18C
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 DIGFILT2 1 DIGFILT1 0 DIGFILT0 1 field
Field Bits What it does DIGFILT 2:0 Digital Filter0 1 SAMPLE1 2 SAMPLES2 3 SAMPLES3 4 SAMPLES4 5 SAMPLES5 6 SAMPLES6 7 SAMPLES7 8 SAMPLES
CH5CTRLChannel 5 Control Register
Address 0x18D
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 DIGFILT2 1 DIGFILT1 0 DIGFILT0 1 field
Field Bits What it does DIGFILT 2:0 Digital Filter0 1 SAMPLE1 2 SAMPLES2 3 SAMPLES3 4 SAMPLES4 5 SAMPLES5 6 SAMPLES6 7 SAMPLES7 8 SAMPLES
CH6CTRLChannel 6 Control Register
Address 0x18E
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 DIGFILT2 1 DIGFILT1 0 DIGFILT0 1 field
Field Bits What it does DIGFILT 2:0 Digital Filter0 1 SAMPLE1 2 SAMPLES2 3 SAMPLES3 4 SAMPLES4 5 SAMPLES5 6 SAMPLES6 7 SAMPLES7 8 SAMPLES
CH7CTRLChannel 7 Control Register
Address 0x18F
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 DIGFILT2 1 DIGFILT1 0 DIGFILT0 1 field
Field Bits What it does DIGFILT 2:0 Digital Filter0 1 SAMPLE1 2 SAMPLES2 3 SAMPLES3 4 SAMPLES4 5 SAMPLES5 6 SAMPLES6 7 SAMPLES7 8 SAMPLES
STROBEEvent Strobe
Address 0x190
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – DATAEvent Data
Address 0x191
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – DFCTRLDigital Filter Control Register
Address 0x192
Reset 0x00
Access read/write 7 PRESCFILT3 6 PRESCFILT2 5 PRESCFILT1 4 PRESCFILT0 3 FILTSEL 2 PRESC2 1 PRESC1 0 PRESC0 3 fields
Field Bits What it does PRESCFILT 7:4 Prescaler Filter1 Enable prescaler filter for either channel 0 or 42 Enable prescaler filter for either channel 1 or 54 Enable prescaler filter for either channel 2 or 68 Enable prescaler filter for either channel 3 or 7 FILTSEL 3 Prescaler Filter Select PRESC 2:0 Prescaler0 CLKPER, divide by 81 CLKPER, divide by 642 CLKPER, divide by 5123 CLKPER, divide by 40964 CLKPER, divide by 32768
ADCA Analog/Digital Converter CTRLAControl Register A
Address 0x200
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 START 1 FLUSH 0 ENABLE 3 fields
Field Bits What it does START 2 Start Conversion FLUSH 1 ADC Flush ENABLE 0 Enable ADC
CTRLBControl Register B
Address 0x201
Reset 0x00
Access read/write 7 – 6 CURRLIMIT1 5 CURRLIMIT0 4 CONMODE 3 FREERUN 2 RESOLUTION1 1 RESOLUTION0 0 – 4 fields
Field Bits What it does CURRLIMIT 6:5 Current Limitation0 No current limit, 300ksps max sampling rate1 Low current limit, 250ksps max sampling rate2 Medium current limit, 150ksps max sampling rate3 High current limit, 50ksps max sampling rate CONMODE 4 Conversion Mode FREERUN 3 Free Running Mode Enable RESOLUTION 2:1 Result Resolution0 12-bit right-adjusted result1 More than 12-bit (oversapling) right-adjusted result2 8-bit right-adjusted result3 12-bit left-adjusted result
REFCTRLReference Control
Address 0x202
Reset 0x00
Access read/write 7 – 6 REFSEL2 5 REFSEL1 4 REFSEL0 3 – 2 – 1 BANDGAP 0 TEMPREF 3 fields
Field Bits What it does REFSEL 6:4 Reference Selection0 Internal 1V1 Internal VCC / 1.62 External reference on PORT A3 External reference on PORT D4 Internal VCC / 2 BANDGAP 1 Bandgap enable TEMPREF 0 Temperature Reference Enable
EVCTRLEvent Control
Address 0x203
Reset 0x00
Access read/write 7 – 6 – 5 EVSEL2 4 EVSEL1 3 EVSEL0 2 EVACT2 1 EVACT1 0 EVACT0 2 fields
Field Bits What it does EVSEL 5:3 Event Input Select0 Event Channel 01 Event Channel 12 Event Channel 23 Event Channel 34 Event Channel 45 Event Channel 56 Event Channel 67 Event Channel 7 EVACT 2:0 Event Action Select0 No event action1 First event triggers channel conversion6 The ADC is flushed and restarted for accurate timing
PRESCALERClock Prescaler
Address 0x204
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 PRESCALER2 1 PRESCALER1 0 PRESCALER0 1 field
Field Bits What it does PRESCALER 2:0 Clock Prescaler Selection0 Divide clock by 41 Divide clock by 82 Divide clock by 163 Divide clock by 324 Divide clock by 645 Divide clock by 1286 Divide clock by 2567 Divide clock by 512
INTFLAGSInterrupt Flags
Address 0x206
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 CH0IF 1 field
Field Bits What it does CH0IF 0 Channel 0 Interrupt Flag
TEMPTemporary Register
Address 0x207
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – SAMPCTRLADC Sampling Time Control Register
Address 0x208
Reset 0x00
Access read/write 7 – 6 – 5 SAMPVAL5 4 SAMPVAL4 3 SAMPVAL3 2 SAMPVAL2 1 SAMPVAL1 0 SAMPVAL0 1 field
Field Bits What it does SAMPVAL 5:0 Sampling time control register
CALCalibration Value
Address 0x20C
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – CH0RESChannel 0 Result
Address 0x210
Reset 0x0000
Access read/write
Size 16-bit CMPCompare Value
Address 0x218
Reset 0x0000
Access read/write
Size 16-bit DACA Digital/Analog Converter CTRLAControl Register A
Address 0x300
Reset 0x00
Access read/write 7 – 6 – 5 – 4 IDOEN 3 CH1EN 2 CH0EN 1 LPMODE 0 ENABLE 5 fields
Field Bits What it does IDOEN 4 Internal Output Enable CH1EN 3 Channel 1 Output Enable CH0EN 2 Channel 0 Output Enable LPMODE 1 Low Power Mode ENABLE 0 Enable
CTRLBControl Register B
Address 0x301
Reset 0x00
Access read/write 7 – 6 CHSEL1 5 CHSEL0 4 – 3 – 2 – 1 CH1TRIG 0 CH0TRIG 3 fields
Field Bits What it does CHSEL 6:5 Channel Select0 Single channel operation (Channel 0 only)1 Single channel operation (Channel 1 only)2 Dual channel operation (Channel 0 and channel 1) CH1TRIG 1 Channel 1 Event Trig Enable CH0TRIG 0 Channel 0 Event Trig Enable
CTRLCControl Register C
Address 0x302
Reset 0x00
Access read/write 7 – 6 – 5 – 4 REFSEL1 3 REFSEL0 2 – 1 – 0 LEFTADJ 2 fields
Field Bits What it does REFSEL 4:3 Reference Select0 Internal 1V 1 Analog supply voltage2 External reference on AREF on PORTA3 Define for PortB kept for legacy reasons3 External reference on AREF on PORTD LEFTADJ 0 Left-adjust Result
EVCTRLEvent Input Control
Address 0x303
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 EVSPLIT 2 EVSEL2 1 EVSEL1 0 EVSEL0 2 fields
Field Bits What it does EVSPLIT 3 Separate Event Channel Input for Channel 1 EVSEL 2:0 Event Input Selection0 Event Channel 01 Event Channel 12 Event Channel 23 Event Channel 34 Event Channel 45 Event Channel 56 Event Channel 67 Event Channel 7
STATUSStatus
Address 0x305
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 CH1DRE 0 CH0DRE 2 fields
Field Bits What it does CH1DRE 1 Channel 1 Data Register Empty CH0DRE 0 Channel 0 Data Register Empty
CH0GAINCALGain Calibration
Address 0x308
Reset 0x00
Access read/write 7 – 6 CH0GAINCAL6 5 CH0GAINCAL5 4 CH0GAINCAL4 3 CH0GAINCAL3 2 CH0GAINCAL2 1 CH0GAINCAL1 0 CH0GAINCAL0 1 field
Field Bits What it does CH0GAINCAL 6:0 Gain Calibration
CH0OFFSETCALOffset Calibration
Address 0x309
Reset 0x00
Access read/write 7 – 6 CH0OFFSETCAL6 5 CH0OFFSETCAL5 4 CH0OFFSETCAL4 3 CH0OFFSETCAL3 2 CH0OFFSETCAL2 1 CH0OFFSETCAL1 0 CH0OFFSETCAL0 1 field
Field Bits What it does CH0OFFSETCAL 6:0 Offset Calibration
CH1GAINCALGain Calibration
Address 0x30A
Reset 0x00
Access read/write 7 – 6 CH1GAINCAL6 5 CH1GAINCAL5 4 CH1GAINCAL4 3 CH1GAINCAL3 2 CH1GAINCAL2 1 CH1GAINCAL1 0 CH1GAINCAL0 1 field
Field Bits What it does CH1GAINCAL 6:0 Gain Calibration
CH1OFFSETCALOffset Calibration
Address 0x30B
Reset 0x00
Access read/write 7 – 6 CH1OFFSETCAL6 5 CH1OFFSETCAL5 4 CH1OFFSETCAL4 3 CH1OFFSETCAL3 2 CH1OFFSETCAL2 1 CH1OFFSETCAL1 0 CH1OFFSETCAL0 1 field
Field Bits What it does CH1OFFSETCAL 6:0 Offset Calibration
CH0DATAChannel 0 Data
Address 0x318
Reset 0x0000
Access read/write
Size 16-bit CH1DATAChannel 1 Data
Address 0x31A
Reset 0x0000
Access read/write
Size 16-bit RTC Real-Time Clounter CTRLControl Register
Address 0x400
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 CORREN 2 PRESCALER2 1 PRESCALER1 0 PRESCALER0 2 fields
Field Bits What it does CORREN 3 Correction Enable PRESCALER 2:0 Prescaling Factor0 RTC Off1 RTC Clock2 RTC Clock / 23 RTC Clock / 84 RTC Clock / 165 RTC Clock / 646 RTC Clock / 2567 RTC Clock / 1024
STATUSStatus Register
Address 0x401
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 SYNCBUSY 1 field
Field Bits What it does SYNCBUSY 0 Synchronization Busy Flag
INTCTRLInterrupt Control Register
Address 0x402
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 COMPINTLVL1 2 COMPINTLVL0 1 OVFINTLVL1 0 OVFINTLVL0 2 fields
Field Bits What it does COMPINTLVL 3:2 Compare Match Interrupt Level0 Interrupt Disabled1 Low Level2 Medium Level3 High Level OVFINTLVL 1:0 Overflow Interrupt Level0 Interrupt Disabled1 Low Level2 Medium Level3 High Level
INTFLAGSInterrupt Flags
Address 0x403
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 COMPIF 0 OVFIF 2 fields
Field Bits What it does COMPIF 1 Compare Match Interrupt Flag OVFIF 0 Overflow Interrupt Flag
TEMPTemporary register
Address 0x404
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – CALIBCalibration Register
Address 0x406
Reset 0x00
Access read/write 7 SIGN 6 ERROR6 5 ERROR5 4 ERROR4 3 ERROR3 2 ERROR2 1 ERROR1 0 ERROR0 2 fields
Field Bits What it does SIGN 7 Correction Sign ERROR 6:0 Error Value
CNTCount Register
Address 0x408
Reset 0x0000
Access read/write
Size 16-bit PERPeriod Register
Address 0x40A
Reset 0x0000
Access read/write
Size 16-bit COMPCompare Register
Address 0x40C
Reset 0x0000
Access read/write
Size 16-bit TWIC Two-Wire Interface CTRLTWI Common Control Register
Address 0x480
Reset 0x00
Access read/write 7 BRIDGEEN 6 SFMPEN 5 SSDAHOLD1 4 SSDAHOLD0 3 FMPEN 2 SDAHOLD1 1 SDAHOLD0 0 EDIEN 6 fields
Field Bits What it does BRIDGEEN 7 Bridge Enable SFMPEN 6 Slave Fast Mode Plus Enable SSDAHOLD 5:4 Slave SDA Hold Time Enable0 SDA Hold Time off1 SDA Hold Time 50 ns2 SDA Hold Time 300 ns3 SDA Hold Time 400 ns FMPEN 3 FMPLUS Enable SDAHOLD 2:1 SDA Hold Time Enable0 SDA Hold Time off1 SDA Hold Time 50 ns2 SDA Hold Time 300 ns3 SDA Hold Time 400 ns EDIEN 0 External Driver Interface Enable
FAULTC4 Fault Extension CTRLAControl A Register
Address 0x880
Reset 0x00
Access read/write 7 RAMP1 6 RAMP0 5 FDDBD 4 PORTCTRL 3 FUSE 2 FILTERE 1 SRCE1 0 SRCE0 6 fields
Field Bits What it does RAMP 7:6 Ramp Mode Selection0 Normal Mode2 RAMP2 Mode FDDBD 5 Fault on Debug Break Detection PORTCTRL 4 Port Control Mode FUSE 3 Fuse State FILTERE 2 Fault E Digital Filter Selection SRCE 1:0 Fault E Input selection0 Fault Protection Disabled1 Event Channel n2 Event Channel n+13 Event Channel n+2
CTRLBControl B Register
Address 0x881
Reset 0x00
Access read/write 7 SOFTA 6 HALTA1 5 HALTA0 4 RESTARTA 3 KEEPA 2 – 1 SRCA1 0 SRCA0 5 fields
Field Bits What it does SOFTA 7 Fault A Software Mode HALTA 6:5 Fault A Halt Action0 Halt Action Disabled1 Hardware Halt Action2 Software Halt Action RESTARTA 4 Fault A Restart Action KEEPA 3 Fault A Keep Action SRCA 1:0 Fault A Source Selection0 Fault A Disabled1 Event Channel n2 Event Channel n+13 Fault A linked to Fault B State from previous cycle
CTRLCControl C Register
Address 0x882
Reset 0x00
Access read/write 7 – 6 – 5 CAPTA 4 – 3 – 2 FILTERA 1 BLANKA 0 QUALA 4 fields
Field Bits What it does CAPTA 5 Fault A Capture FILTERA 2 Fault A Digital Filter Selection BLANKA 1 Fault A Blanking QUALA 0 Fault A Qualification
CTRLDControl D Register
Address 0x883
Reset 0x00
Access read/write 7 SOFTB 6 HALTB1 5 HALTB0 4 RESTARTB 3 KEEPB 2 – 1 SRCB1 0 SRCB0 5 fields
Field Bits What it does SOFTB 7 Fault B Software Mode HALTB 6:5 Fault B Halt Action0 Halt Action Disabled1 Hardware Halt Action2 Software Halt Action RESTARTB 4 Fault B Restart Action KEEPB 3 Fault B Keep Action SRCB 1:0 Fault B Source Selection0 Fault B disabled1 Event Channel n2 Event Channel n+13 Fault B linked to Fault A State from previous cycle
CTRLEControl E Register
Address 0x884
Reset 0x00
Access read/write 7 – 6 – 5 CAPTB 4 – 3 – 2 FILTERB 1 BLANKB 0 QUALB 4 fields
Field Bits What it does CAPTB 5 Fault B Capture FILTERB 2 Fault B Digital Filter Selection BLANKB 1 Fault B Blanking QUALB 0 Fault B Qualification
STATUSStatus Register
Address 0x885
Reset 0x00
Access read/write 7 STATEB 6 STATEA 5 STATEE 4 – 3 IDX 2 FAULTBIN 1 FAULTAIN 0 FAULTEIN 7 fields
Field Bits What it does STATEB 7 Fault B State STATEA 6 Fault A State STATEE 5 Fault E State IDX 3 Channel Index Flag FAULTBIN 2 Fault B Flag FAULTAIN 1 Fault A Flag FAULTEIN 0 Fault E Flag
CTRLGCLRControl Register G Clear
Address 0x886
Reset 0x00
Access read/write 7 HALTBCLR 6 HALTACLR 5 STATEECLR 4 – 3 – 2 FAULTB 1 FAULTA 0 FAULTE 6 fields
Field Bits What it does HALTBCLR 7 State B Clear HALTACLR 6 State A Clear STATEECLR 5 State E Clear FAULTB 2 Fault B Flag FAULTA 1 Fault A Flag FAULTE 0 Fault E Flag
CTRLGSETControl Register G set
Address 0x887
Reset 0x00
Access read/write 7 FAULTBSW 6 FAULTASW 5 FAULTESW 4 IDXCMD1 3 IDXCMD0 2 – 1 – 0 – 4 fields
Field Bits What it does FAULTBSW 7 Software Fault B FAULTASW 6 Software Fault A FAULTESW 5 Software Fault E IDXCMD 4:3 Channel index Command0 Command Disabled1 Force Cycle B in Next Cycle2 Force Cycle A in Next Cycle3 Hold Current Cycle Index in Next Cycle
FAULTC5 Fault Extension CTRLAControl A Register
Address 0x890
Reset 0x00
Access read/write 7 RAMP1 6 RAMP0 5 FDDBD 4 PORTCTRL 3 FUSE 2 FILTERE 1 SRCE1 0 SRCE0 6 fields
Field Bits What it does RAMP 7:6 Ramp Mode Selection0 Normal Mode2 RAMP2 Mode FDDBD 5 Fault on Debug Break Detection PORTCTRL 4 Port Control Mode FUSE 3 Fuse State FILTERE 2 Fault E Digital Filter Selection SRCE 1:0 Fault E Input selection0 Fault Protection Disabled1 Event Channel n2 Event Channel n+13 Event Channel n+2
CTRLBControl B Register
Address 0x891
Reset 0x00
Access read/write 7 SOFTA 6 HALTA1 5 HALTA0 4 RESTARTA 3 KEEPA 2 – 1 SRCA1 0 SRCA0 5 fields
Field Bits What it does SOFTA 7 Fault A Software Mode HALTA 6:5 Fault A Halt Action0 Halt Action Disabled1 Hardware Halt Action2 Software Halt Action RESTARTA 4 Fault A Restart Action KEEPA 3 Fault A Keep Action SRCA 1:0 Fault A Source Selection0 Fault A Disabled1 Event Channel n2 Event Channel n+13 Fault A linked to Fault B State from previous cycle
CTRLCControl C Register
Address 0x892
Reset 0x00
Access read/write 7 – 6 – 5 CAPTA 4 – 3 – 2 FILTERA 1 BLANKA 0 QUALA 4 fields
Field Bits What it does CAPTA 5 Fault A Capture FILTERA 2 Fault A Digital Filter Selection BLANKA 1 Fault A Blanking QUALA 0 Fault A Qualification
CTRLDControl D Register
Address 0x893
Reset 0x00
Access read/write 7 SOFTB 6 HALTB1 5 HALTB0 4 RESTARTB 3 KEEPB 2 – 1 SRCB1 0 SRCB0 5 fields
Field Bits What it does SOFTB 7 Fault B Software Mode HALTB 6:5 Fault B Halt Action0 Halt Action Disabled1 Hardware Halt Action2 Software Halt Action RESTARTB 4 Fault B Restart Action KEEPB 3 Fault B Keep Action SRCB 1:0 Fault B Source Selection0 Fault B disabled1 Event Channel n2 Event Channel n+13 Fault B linked to Fault A State from previous cycle
CTRLEControl E Register
Address 0x894
Reset 0x00
Access read/write 7 – 6 – 5 CAPTB 4 – 3 – 2 FILTERB 1 BLANKB 0 QUALB 4 fields
Field Bits What it does CAPTB 5 Fault B Capture FILTERB 2 Fault B Digital Filter Selection BLANKB 1 Fault B Blanking QUALB 0 Fault B Qualification
STATUSStatus Register
Address 0x895
Reset 0x00
Access read/write 7 STATEB 6 STATEA 5 STATEE 4 – 3 IDX 2 FAULTBIN 1 FAULTAIN 0 FAULTEIN 7 fields
Field Bits What it does STATEB 7 Fault B State STATEA 6 Fault A State STATEE 5 Fault E State IDX 3 Channel Index Flag FAULTBIN 2 Fault B Flag FAULTAIN 1 Fault A Flag FAULTEIN 0 Fault E Flag
CTRLGCLRControl Register G Clear
Address 0x896
Reset 0x00
Access read/write 7 HALTBCLR 6 HALTACLR 5 STATEECLR 4 – 3 – 2 FAULTB 1 FAULTA 0 FAULTE 6 fields
Field Bits What it does HALTBCLR 7 State B Clear HALTACLR 6 State A Clear STATEECLR 5 State E Clear FAULTB 2 Fault B Flag FAULTA 1 Fault A Flag FAULTE 0 Fault E Flag
CTRLGSETControl Register G set
Address 0x897
Reset 0x00
Access read/write 7 FAULTBSW 6 FAULTASW 5 FAULTESW 4 IDXCMD1 3 IDXCMD0 2 – 1 – 0 – 4 fields
Field Bits What it does FAULTBSW 7 Software Fault B FAULTASW 6 Software Fault A FAULTESW 5 Software Fault E IDXCMD 4:3 Channel index Command0 Command Disabled1 Force Cycle B in Next Cycle2 Force Cycle A in Next Cycle3 Hold Current Cycle Index in Next Cycle
WEXC Waveform Extension CTRLControl Register
Address 0x8A0
Reset 0x00
Access read/write 7 UPSEL 6 OTMX2 5 OTMX1 4 OTMX0 3 DTI3EN 2 DTI2EN 1 DTI1EN 0 DTI0EN 6 fields
Field Bits What it does UPSEL 7 Update Source Selection OTMX 6:4 Output Matrix0 Default Output Matrix Mode1 First Output matrix Mode2 Second Output matrix Mode3 Third Output matrix Mode4 Fourth Output matrix Mode DTI3EN 3 Dead-Time Insertion Generator 3 Enable DTI2EN 2 Dead-Time Insertion Generator 2 Enable DTI1EN 1 Dead-Time Insertion Generator 1 Enable DTI0EN 0 Dead-Time Insertion Generator 0 Enable
DTBOTHDead-time Concurrent Write to Both Sides Register
Address 0x8A1
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – DTLSDead-time Low Side Register
Address 0x8A2
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – DTHSDead-time High Side Register
Address 0x8A3
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – STATUSCLRStatus Clear Register
Address 0x8A4
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 SWAPBUF 1 PGVBUFV 0 PGOBUFV 3 fields
Field Bits What it does SWAPBUF 2 Swap Buffer Valid PGVBUFV 1 Pattern Generator Value Buffer Valid PGOBUFV 0 Pattern Generator Overwrite Buffer Valid
STATUSSETStatus Set Register
Address 0x8A5
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 SWAPBUF 1 PGVBUFV 0 PGOBUFV 3 fields
Field Bits What it does SWAPBUF 2 Swap Buffer Valid PGVBUFV 1 Pattern Generator Value Buffer Valid PGOBUFV 0 Pattern Generator Overwrite Buffer Valid
SWAPSwap Register
Address 0x8A6
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 SWAP3 2 SWAP2 1 SWAP1 0 SWAP0 4 fields
Field Bits What it does SWAP3 3 Swap DTI output pair 3 SWAP2 2 Swap DTI output pair 2 SWAP1 1 Swap DTI output pair 1 SWAP0 0 Swap DTI output pair 0
PGOPattern Generation Override Register
Address 0x8A7
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – PGVPattern Generation Value Register
Address 0x8A8
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – SWAPBUFDead Time Low Side Buffer
Address 0x8AA
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 SWAP3BUF 2 SWAP2BUF 1 SWAP1BUF 0 SWAP0BUF 4 fields
Field Bits What it does SWAP3BUF 3 Swap DTI output pair 3 SWAP2BUF 2 Swap DTI output pair 2 SWAP1BUF 1 Swap DTI output pair 1 SWAP0BUF 0 Swap DTI output pair 0
PGOBUFPattern Generation Overwrite Buffer Register
Address 0x8AB
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – PGVBUFPattern Generation Value Buffer Register
Address 0x8AC
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – OUTOVDISOutput Override Disable Register
Address 0x8AF
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – HIRESC High-Resolution Extension CTRLAControl Register A
Address 0x8B0
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 HRPLUS1 2 HRPLUS0 1 HREN1 0 HREN0 2 fields
Field Bits What it does HRPLUS 3:2 High Resolution Plus0 No Hi-Res Plus1 Hi-Res Plus enabled on Timer 42 Hi-Res Plus enabled on Timer 53 Hi-Res Plus enabled on Timer 4 and 5 HREN 1:0 High Resolution Mode0 No Hi-Res1 Hi-Res enabled on Timer 42 Hi-Res enabled on Timer 53 Hi-Res enabled on Timer 4 and 5
USARTC0 Universal Asynchronous Receiver-Transmitter DATAData Register
Address 0x8C0
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – STATUSStatus Register
Address 0x8C1
Reset 0x00
Access read/write 7 RXCIF 6 TXCIF 5 DREIF 4 FERR 3 BUFOVF 2 PERR 1 RXSIF 0 DRIF 9 fields
Field Bits What it does RXCIF 7 Receive Interrupt Flag TXCIF 6 Transmit Interrupt Flag DREIF 5 Data Register Empty Flag FERR 4 Frame Error BUFOVF 3 Buffer Overflow PERR 2 Parity Error RXSIF 1 Receive Start Bit Interrupt Flag DRIF 0 Data Reception Flag RXB8 0 Receive Bit 8
CTRLAControl Register A
Address 0x8C2
Reset 0x00
Access read/write 7 RXSIE 6 DRIE 5 RXCINTLVL1 4 RXCINTLVL0 3 TXCINTLVL1 2 TXCINTLVL0 1 DREINTLVL1 0 DREINTLVL0 5 fields
Field Bits What it does RXSIE 7 Receive Start Interrupt Enable DRIE 6 Data Reception Interrupt Enable RXCINTLVL 5:4 Receive Interrupt Level0 Interrupt Disabled1 Low Level2 Medium Level3 High Level TXCINTLVL 3:2 Transmit Interrupt Level0 Interrupt Disabled1 Low Level2 Medium Level3 High Level DREINTLVL 1:0 Data Register Empty Interrupt Level0 Interrupt Disabled1 Low Level2 Medium Level3 High Level
CTRLBControl Register B
Address 0x8C3
Reset 0x00
Access read/write 7 ONEWIRE 6 SFDEN 5 – 4 RXEN 3 TXEN 2 CLK2X 1 MPCM 0 TXB8 7 fields
Field Bits What it does ONEWIRE 7 One Wire Mode SFDEN 6 Start Frame Detection Enable RXEN 4 Receiver Enable TXEN 3 Transmitter Enable CLK2X 2 Double transmission speed MPCM 1 Multi-processor Communication Mode TXB8 0 Transmit bit 8
CTRLCControl Register C
Address 0x8C4
Reset 0x00
Access read/write 7 CMODE1 6 CMODE0 5 PMODE1 4 PMODE0 3 SBMODE 2 CHSIZE2 1 CHSIZE1 0 CHSIZE0 4 fields
Field Bits What it does CMODE 7:6 Communication Mode0 Asynchronous Mode1 Synchronous Mode2 IrDA Mode3 Master SPI Mode PMODE 5:4 Parity Mode0 No Parity2 Even Parity3 Odd Parity SBMODE 3 Stop Bit Mode CHSIZE 2:0 Character Size0 Character size: 5 bit1 Character size: 6 bit2 Character size: 7 bit3 Character size: 8 bit7 Character size: 9 bit
CTRLDControl Register D
Address 0x8C5
Reset 0x00
Access read/write 7 – 6 – 5 DECTYPE1 4 DECTYPE0 3 LUTACT1 2 LUTACT0 1 PECACT1 0 PECACT0 3 fields
Field Bits What it does DECTYPE 5:4 Receive Interrupt Level0 DATA Field Encoding2 Start and Data Fields Encoding3 Start and Data Fields Encoding, with inversion in START field LUTACT 3:2 Transmit Interrupt Level0 Standard Frame Configuration1 Receiver Decoding Enabled2 Transmitter Encoding Enabled3 Both Encoding and Decoding Enabled PECACT 1:0 Data Register Empty Interrupt Level0 Standard Mode1 Variable Data Length in Reception2 Variable Data Length in Transmission3 Variable Data Length in both Reception and Transmission
BAUDCTRLABaud Rate Control Register A
Address 0x8C6
Reset 0x00
Access read/write 7 BSEL7 6 BSEL6 5 BSEL5 4 BSEL4 3 BSEL3 2 BSEL2 1 BSEL1 0 BSEL0 1 field
Field Bits What it does BSEL 7:0 Baud Rate Selection Bits [7:0]
BAUDCTRLBBaud Rate Control Register B
Address 0x8C7
Reset 0x00
Access read/write 7 BSCALE3 6 BSCALE2 5 BSCALE1 4 BSCALE0 3 BSEL3 2 BSEL2 1 BSEL1 0 BSEL0 2 fields
Field Bits What it does BSCALE 7:4 Baud Rate Scale BSEL 3:0 Baud Rate Selection bits[11:8]
SPIC Serial Peripheral Interface CTRLControl Register
Address 0x8E0
Reset 0x00
Access read/write 7 CLK2X 6 ENABLE 5 DORD 4 MASTER 3 MODE1 2 MODE0 1 PRESCALER1 0 PRESCALER0 6 fields
Field Bits What it does CLK2X 7 Enable Double Speed ENABLE 6 Enable SPI Module DORD 5 Data Order Setting MASTER 4 Master Operation Enable MODE 3:2 SPI Mode0 SPI Mode 0, base clock at "0", sampling on leading edge (rising) & set-up on trailling edge (falling).1 SPI Mode 1, base clock at "0", set-up on leading edge (rising) & sampling on trailling edge (falling).2 SPI Mode 2, base clock at "1", sampling on leading edge (falling) & set-up on trailling edge (rising).3 SPI Mode 3, base clock at "1", set-up on leading edge (falling) & sampling on trailling edge (rising). PRESCALER 1:0 Prescaler0 If CLK2X=1 CLKper/2, else (CLK2X=0) CLKper/4.1 If CLK2X=1 CLKper/8, else (CLK2X=0) CLKper/16.2 If CLK2X=1 CLKper/32, else (CLK2X=0) CLKper/64.3 If CLK2X=1 CLKper/64, else (CLK2X=0) CLKper/128.
INTCTRLInterrupt Control Register
Address 0x8E1
Reset 0x00
Access read/write 7 RXCIE 6 TXCIE 5 DREIE 4 SSIE 3 – 2 – 1 INTLVL1 0 INTLVL0 5 fields
Field Bits What it does RXCIE 7 Receive Complete Interrupt Enable (In Buffer Modes Only). TXCIE 6 Transmit Complete Interrupt Enable (In Buffer Modes Only). DREIE 5 Data Register Empty Interrupt Enable (In Buffer Modes Only). SSIE 4 Slave Select Trigger Interrupt Enable (In Buffer Modes Only). INTLVL 1:0 Interrupt level0 Interrupt Disabled1 Low Level2 Medium Level3 High Level
STATUSStatus Register
Address 0x8E2
Reset 0x00
Access read/write 7 IF 6 TXCIF 5 DREIF 4 SSIF 3 – 2 – 1 – 0 BUFOVF 7 fields
Field Bits What it does IF 7 Interrupt Flag (In Standard Mode Only). RXCIF 7 Receive Complete Interrupt Flag (In Buffer Modes Only). TXCIF 6 Transmit Complete Interrupt Flag (In Buffer Modes Only). WRCOL 6 Write Collision Flag (In Standard Mode Only). DREIF 5 Data Register Empty Interrupt Flag (In Buffer Modes Only). SSIF 4 Slave Select Trigger Interrupt Flag (In Buffer Modes Only). BUFOVF 0 Buffer Overflow (In Buffer Modes Only).
DATAData Register
Address 0x8E3
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – CTRLBControl Register B
Address 0x8E4
Reset 0x00
Access read/write 7 BUFMODE1 6 BUFMODE0 5 – 4 – 3 – 2 SSD 1 – 0 – 2 fields
Field Bits What it does BUFMODE 7:6 Buffer Modes0 SPI Unbuffered Mode2 Buffer Mode 1 (with dummy byte)3 Buffer Mode 2 (no dummy byte) SSD 2 Slave Select Disable
IRCOM IR Communication Module CTRLControl Register
Address 0x8F8
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 EVSEL3 2 EVSEL2 1 EVSEL1 0 EVSEL0 1 field
Field Bits What it does EVSEL 3:0 Event Channel Select0 No Event Source8 Event Channel 09 Event Channel 110 Event Channel 211 Event Channel 312 Event Channel 413 Event Channel 514 Event Channel 615 Event Channel 7
TXPLCTRLIrDA Transmitter Pulse Length Control Register
Address 0x8F9
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – RXPLCTRLIrDA Receiver Pulse Length Control Register
Address 0x8FA
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – USARTD0 Universal Asynchronous Receiver-Transmitter DATAData Register
Address 0x9C0
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – STATUSStatus Register
Address 0x9C1
Reset 0x00
Access read/write 7 RXCIF 6 TXCIF 5 DREIF 4 FERR 3 BUFOVF 2 PERR 1 RXSIF 0 DRIF 9 fields
Field Bits What it does RXCIF 7 Receive Interrupt Flag TXCIF 6 Transmit Interrupt Flag DREIF 5 Data Register Empty Flag FERR 4 Frame Error BUFOVF 3 Buffer Overflow PERR 2 Parity Error RXSIF 1 Receive Start Bit Interrupt Flag DRIF 0 Data Reception Flag RXB8 0 Receive Bit 8
CTRLAControl Register A
Address 0x9C2
Reset 0x00
Access read/write 7 RXSIE 6 DRIE 5 RXCINTLVL1 4 RXCINTLVL0 3 TXCINTLVL1 2 TXCINTLVL0 1 DREINTLVL1 0 DREINTLVL0 5 fields
Field Bits What it does RXSIE 7 Receive Start Interrupt Enable DRIE 6 Data Reception Interrupt Enable RXCINTLVL 5:4 Receive Interrupt Level0 Interrupt Disabled1 Low Level2 Medium Level3 High Level TXCINTLVL 3:2 Transmit Interrupt Level0 Interrupt Disabled1 Low Level2 Medium Level3 High Level DREINTLVL 1:0 Data Register Empty Interrupt Level0 Interrupt Disabled1 Low Level2 Medium Level3 High Level
CTRLBControl Register B
Address 0x9C3
Reset 0x00
Access read/write 7 ONEWIRE 6 SFDEN 5 – 4 RXEN 3 TXEN 2 CLK2X 1 MPCM 0 TXB8 7 fields
Field Bits What it does ONEWIRE 7 One Wire Mode SFDEN 6 Start Frame Detection Enable RXEN 4 Receiver Enable TXEN 3 Transmitter Enable CLK2X 2 Double transmission speed MPCM 1 Multi-processor Communication Mode TXB8 0 Transmit bit 8
CTRLCControl Register C
Address 0x9C4
Reset 0x00
Access read/write 7 CMODE1 6 CMODE0 5 PMODE1 4 PMODE0 3 SBMODE 2 CHSIZE2 1 CHSIZE1 0 CHSIZE0 4 fields
Field Bits What it does CMODE 7:6 Communication Mode0 Asynchronous Mode1 Synchronous Mode2 IrDA Mode3 Master SPI Mode PMODE 5:4 Parity Mode0 No Parity2 Even Parity3 Odd Parity SBMODE 3 Stop Bit Mode CHSIZE 2:0 Character Size0 Character size: 5 bit1 Character size: 6 bit2 Character size: 7 bit3 Character size: 8 bit7 Character size: 9 bit
CTRLDControl Register D
Address 0x9C5
Reset 0x00
Access read/write 7 – 6 – 5 DECTYPE1 4 DECTYPE0 3 LUTACT1 2 LUTACT0 1 PECACT1 0 PECACT0 3 fields
Field Bits What it does DECTYPE 5:4 Receive Interrupt Level0 DATA Field Encoding2 Start and Data Fields Encoding3 Start and Data Fields Encoding, with inversion in START field LUTACT 3:2 Transmit Interrupt Level0 Standard Frame Configuration1 Receiver Decoding Enabled2 Transmitter Encoding Enabled3 Both Encoding and Decoding Enabled PECACT 1:0 Data Register Empty Interrupt Level0 Standard Mode1 Variable Data Length in Reception2 Variable Data Length in Transmission3 Variable Data Length in both Reception and Transmission
BAUDCTRLABaud Rate Control Register A
Address 0x9C6
Reset 0x00
Access read/write 7 BSEL7 6 BSEL6 5 BSEL5 4 BSEL4 3 BSEL3 2 BSEL2 1 BSEL1 0 BSEL0 1 field
Field Bits What it does BSEL 7:0 Baud Rate Selection Bits [7:0]
BAUDCTRLBBaud Rate Control Register B
Address 0x9C7
Reset 0x00
Access read/write 7 BSCALE3 6 BSCALE2 5 BSCALE1 4 BSCALE0 3 BSEL3 2 BSEL2 1 BSEL1 0 BSEL0 2 fields
Field Bits What it does BSCALE 7:4 Baud Rate Scale BSEL 3:0 Baud Rate Selection bits[11:8]
BETA