dsPIC33AK512MC505 memory map

Where everything sits, at its exact address. The dsPIC33AK512MC505 is a 32-bit chip with byte-addressed flash: 512 KB from 0x800000, the reset vector and the interrupt vector table at its start; the configuration words in their own pages from 0x7F3000. The data side holds the 32-bit SFRs in fast, standard and slow regions from 0x0000, then the RAM from 0x4000.

Program memory

Flash from 0x800000 (reset vector, vector table, the program) and the configuration pages; byte addresses.

Flash0x800000 – 0x87FFFF512 KB
BOOTCFG0x7F40D0 – 0x7F40D34 B
Configuration words, page B0x7F4000 – 0x7F40CF208 B
CFGMEMA10x7F3000 – 0x7F37FF2 KB
User OTP words0x7F2C00 – 0x7F2FFF1 KB

Data memory

32-bit SFRs (fast, standard, slow, calibration) and the RAM; byte addresses.

ADCSEQUENCE0x7C3000 – 0x7C3087136 B
SFRREGSCRYPT0x7A0000 – 0x7A8FFF36 KB
RAM0x4000 – 0x13FFF64 KB
SFRs, slow region0x3000 – 0x3FFF4 KB
SFRs, standard region0x1000 – 0x2DFF7.5 KB
SFRs, fast region0x0000 – 0x0FFF4 KB

Every segment

SegmentSpaceStartEndSizePage
SFRs, fast regiondata0x00000x0FFF4 KB
SFRs, standard regiondata0x10000x2DFF7.5 KB
SFRs, slow regiondata0x30000x3FFF4 KB
RAMdata0x40000x13FFF64 KB
SFRREGSCRYPTdata0x7A00000x7A8FFF36 KB
Calibration SFRsdata0x7C00000x7C01FF512 B
ADCSEQUENCEdata0x7C30000x7C3087136 B
User OTP wordsprog0x7F2C000x7F2FFF1 KB
CFGMEMA1prog0x7F30000x7F37FF2 KB
Configuration words, page Bprog0x7F40000x7F40CF208 B
BOOTCFGprog0x7F40D00x7F40D34 B
Flashprog0x8000000x87FFFF512 KB