dsPIC33CK512MP405 peripherals

Each block of the dsPIC33CK512MP405: what it is, the registers that control it and the pins it uses.

CPU

CPU

CPU core (W registers, DSP, program space)

Registers

ADC

ADC

Analog-to-digital converter

Registers

Pins

INTERRUPT

INTERRUPT

Interrupts

Registers

Pins

POWER

POWER

Low-power and deep sleep control

Registers

PPS

PPS

Peripheral pin select

Registers

PWM

PWM

PWM generators

Registers

APCLKCON0x1D2AFSCL0x1D4AFSMINPER0x1D6AMPHASE0x1D8AMDC0x1DAAMPER0x1DCALFSR0x1DEACMBTRIGL0x1E0ACMBTRIGH0x1E2ALOGCONA0x1E4ALOGCONB0x1E6ALOGCONC0x1E8ALOGCOND0x1EAALOGCONE0x1ECALOGCONF0x1EEAPWMEVTA0x1F0APWMEVTB0x1F2APWMEVTC0x1F4APWMEVTD0x1F6APWMEVTE0x1F8APWMEVTF0x1FAAPG1CONL0x1FCAPG1CONH0x1FEAPG1STAT0x200APG1IOCONL0x202APG1IOCONH0x204APG1EVTL0x206APG1EVTH0x208APG1FPCIL0x20AAPG1FPCIH0x20CAPG1CLPCIL0x20EAPG1CLPCIH0x210APG1FFPCIL0x212APG1FFPCIH0x214APG1SPCIL0x216APG1SPCIH0x218APG1LEBL0x21AAPG1LEBH0x21CAPG1PHASE0x21EAPG1DC0x220APG1DCA0x222APG1PER0x224APG1TRIGA0x226APG1TRIGB0x228APG1TRIGC0x22AAPG1DTL0x22CAPG1DTH0x22EAPG1CAP0x230APG2CONL0x232APG2CONH0x234APG2STAT0x236APG2IOCONL0x238APG2IOCONH0x23AAPG2EVTL0x23CAPG2EVTH0x23EAPG2FPCIL0x240APG2FPCIH0x242APG2CLPCIL0x244APG2CLPCIH0x246APG2FFPCIL0x248APG2FFPCIH0x24AAPG2SPCIL0x24CAPG2SPCIH0x24EAPG2LEBL0x250APG2LEBH0x252APG2PHASE0x254APG2DC0x256APG2DCA0x258APG2PER0x25AAPG2TRIGA0x25CAPG2TRIGB0x25EAPG2TRIGC0x260APG2DTL0x262APG2DTH0x264APG2CAP0x266APG3CONL0x268APG3CONH0x26AAPG3STAT0x26CAPG3IOCONL0x26EAPG3IOCONH0x270APG3EVTL0x272APG3EVTH0x274APG3FPCIL0x276APG3FPCIH0x278APG3CLPCIL0x27AAPG3CLPCIH0x27CAPG3FFPCIL0x27EAPG3FFPCIH0x280APG3SPCIL0x282APG3SPCIH0x284APG3LEBL0x286APG3LEBH0x288APG3PHASE0x28AAPG3DC0x28CAPG3DCA0x28EAPG3PER0x290APG3TRIGA0x292APG3TRIGB0x294APG3TRIGC0x296APG3DTL0x298APG3DTH0x29AAPG3CAP0x29CAPG4CONL0x29EAPG4CONH0x2A0APG4STAT0x2A2APG4IOCONL0x2A4APG4IOCONH0x2A6APG4EVTL0x2A8APG4EVTH0x2AAAPG4FPCIL0x2ACAPG4FPCIH0x2AEAPG4CLPCIL0x2B0APG4CLPCIH0x2B2APG4FFPCIL0x2B4APG4FFPCIH0x2B6APG4SPCIL0x2B8APG4SPCIH0x2BAAPG4LEBL0x2BCAPG4LEBH0x2BEAPG4PHASE0x2C0APG4DC0x2C2APG4DCA0x2C4APG4PER0x2C6APG4TRIGA0x2C8APG4TRIGB0x2CAAPG4TRIGC0x2CCAPG4DTL0x2CEAPG4DTH0x2D0APG4CAP0x2D2PCLKCON0x300FSCL0x302FSMINPER0x304MPHASE0x306MDC0x308MPER0x30ALFSR0x30CCMBTRIGL0x30ECMBTRIGH0x310LOGCONA0x312LOGCONB0x314LOGCONC0x316LOGCOND0x318LOGCONE0x31ALOGCONF0x31CPWMEVTA0x31EPWMEVTB0x320PWMEVTC0x322PWMEVTD0x324PWMEVTE0x326PWMEVTF0x328PG1CONL0x32APG1CONH0x32CPG1STAT0x32EPG1IOCONL0x330PG1IOCONH0x332PG1EVTL0x334PG1EVTH0x336PG1FPCIL0x338PG1FPCIH0x33APG1CLPCIL0x33CPG1CLPCIH0x33EPG1FFPCIL0x340PG1FFPCIH0x342PG1SPCIL0x344PG1SPCIH0x346PG1LEBL0x348PG1LEBH0x34APG1PHASE0x34CPG1DC0x34EPG1DCA0x350PG1PER0x352PG1TRIGA0x354PG1TRIGB0x356PG1TRIGC0x358PG1DTL0x35APG1DTH0x35CPG1CAP0x35EPG2CONL0x360PG2CONH0x362PG2STAT0x364PG2IOCONL0x366PG2IOCONH0x368PG2EVTL0x36APG2EVTH0x36CPG2FPCIL0x36EPG2FPCIH0x370PG2CLPCIL0x372PG2CLPCIH0x374PG2FFPCIL0x376PG2FFPCIH0x378PG2SPCIL0x37APG2SPCIH0x37CPG2LEBL0x37EPG2LEBH0x380PG2PHASE0x382PG2DC0x384PG2DCA0x386PG2PER0x388PG2TRIGA0x38APG2TRIGB0x38CPG2TRIGC0x38EPG2DTL0x390PG2DTH0x392PG2CAP0x394PG3CONL0x396PG3CONH0x398PG3STAT0x39APG3IOCONL0x39CPG3IOCONH0x39EPG3EVTL0x3A0PG3EVTH0x3A2PG3FPCIL0x3A4PG3FPCIH0x3A6PG3CLPCIL0x3A8PG3CLPCIH0x3AAPG3FFPCIL0x3ACPG3FFPCIH0x3AEPG3SPCIL0x3B0PG3SPCIH0x3B2PG3LEBL0x3B4PG3LEBH0x3B6PG3PHASE0x3B8PG3DC0x3BAPG3DCA0x3BCPG3PER0x3BEPG3TRIGA0x3C0PG3TRIGB0x3C2PG3TRIGC0x3C4PG3DTL0x3C6PG3DTH0x3C8PG3CAP0x3CAPG4CONL0x3CCPG4CONH0x3CEPG4STAT0x3D0PG4IOCONL0x3D2PG4IOCONH0x3D4PG4EVTL0x3D6PG4EVTH0x3D8PG4FPCIL0x3DAPG4FPCIH0x3DCPG4CLPCIL0x3DEPG4CLPCIH0x3E0PG4FFPCIL0x3E2PG4FFPCIH0x3E4PG4SPCIL0x3E6PG4SPCIH0x3E8PG4LEBL0x3EAPG4LEBH0x3ECPG4PHASE0x3EEPG4DC0x3F0PG4DCA0x3F2PG4PER0x3F4PG4TRIGA0x3F6PG4TRIGB0x3F8PG4TRIGC0x3FAPG4DTL0x3FCPG4DTH0x3FEPG4CAP0x400PG5CONL0x402PG5CONH0x404PG5STAT0x406PG5IOCONL0x408PG5IOCONH0x40APG5EVTL0x40CPG5EVTH0x40EPG5FPCIL0x410PG5FPCIH0x412PG5CLPCIL0x414PG5CLPCIH0x416PG5FFPCIL0x418PG5FFPCIH0x41APG5SPCIL0x41CPG5SPCIH0x41EPG5LEBL0x420PG5LEBH0x422PG5PHASE0x424PG5DC0x426PG5DCA0x428PG5PER0x42APG5TRIGA0x42CPG5TRIGB0x42EPG5TRIGC0x430PG5DTL0x432PG5DTH0x434PG5CAP0x436PG6CONL0x438PG6CONH0x43APG6STAT0x43CPG6IOCONL0x43EPG6IOCONH0x440PG6EVTL0x442PG6EVTH0x444PG6FPCIL0x446PG6FPCIH0x448PG6CLPCIL0x44APG6CLPCIH0x44CPG6FFPCIL0x44EPG6FFPCIH0x450PG6SPCIL0x452PG6SPCIH0x454PG6LEBL0x456PG6LEBH0x458PG6PHASE0x45APG6DC0x45CPG6DCA0x45EPG6PER0x460PG6TRIGA0x462PG6TRIGB0x464PG6TRIGC0x466PG6DTL0x468PG6DTH0x46APG6CAP0x46CPG7CONL0x46EPG7CONH0x470PG7STAT0x472PG7IOCONL0x474PG7IOCONH0x476PG7EVTL0x478PG7EVTH0x47APG7FPCIL0x47CPG7FPCIH0x47EPG7CLPCIL0x480PG7CLPCIH0x482PG7FFPCIL0x484PG7FFPCIH0x486PG7SPCIL0x488PG7SPCIH0x48APG7LEBL0x48CPG7LEBH0x48EPG7PHASE0x490PG7DC0x492PG7DCA0x494PG7PER0x496PG7TRIGA0x498PG7TRIGB0x49APG7TRIGC0x49CPG7DTL0x49EPG7DTH0x4A0PG7CAP0x4A2PG8CONL0x4A4PG8CONH0x4A6PG8STAT0x4A8PG8IOCONL0x4AAPG8IOCONH0x4ACPG8EVTL0x4AEPG8EVTH0x4B0PG8FPCIL0x4B2PG8FPCIH0x4B4PG8CLPCIL0x4B6PG8CLPCIH0x4B8PG8FFPCIL0x4BAPG8FFPCIH0x4BCPG8SPCIL0x4BEPG8SPCIH0x4C0PG8LEBL0x4C2PG8LEBH0x4C4PG8PHASE0x4C6PG8DC0x4C8PG8DCA0x4CAPG8PER0x4CCPG8TRIGA0x4CEPG8TRIGB0x4D0PG8TRIGC0x4D2PG8DTL0x4D4PG8DTH0x4D6PG8CAP0x4D8

Pins