dsPIC33EP256MC502 configuration bits The configuration words set the oscillator and PLL, the watchdog, the debugger pins, brown-out reset and code protection: they are the last words of flash (from 0x02AFEC), programmed with the code. Pick a setting and the word below updates; the starting values are the defaults in Microchip's device file, and an erased bit reads 1. In XC16 each setting is a #pragma config FNOSC = FRC line.
Reserved · 0x2AFEC 0xFFFF default 0xFFFF Reserved Reserved · 0x2AFEE 0xFFFF default 0xFFFF Reserved FICD · 0x2AFF0 0xFFCF default 0xFFCF JTAGEN JTAG Enable bit JTAG is disabled JTAG is enabled ICS ICD Communication Channel Select bits Reserved, do not use Communicate on PGEC3 and PGED3 Communicate on PGEC2 and PGED2 Communicate on PGEC1 and PGED1 FPOR · 0x2AFF2 0xFFFF default 0xFFFF WDTWIN Watchdog Window Select bits WDT Window is 75% of WDT period WDT Window is 50% of WDT period WDT Window is 37.5% of WDT period WDT Window is 25% of WDT period ALTI2C2 Alternate I2C2 pins I2C2 mapped to ASDA2/ASCL2 pins I2C2 mapped to SDA2/SCL2 pins ALTI2C1 Alternate I2C1 pins I2C1 mapped to ASDA1/ASCL1 pins I2C1 mapped to SDA1/SCL1 pins RES Reserved 1 · unprogrammed 0 · programmed FWDT · 0x2AFF4 0xFFFF default 0xFFFF FWDTEN Watchdog Timer Enable bit Watchdog timer enabled/disabled by user software Watchdog timer always enabled WINDIS Watchdog Timer Window Enable bit Watchdog Timer in Window mode Watchdog Timer in Non-Window mode PLLKEN PLL Lock Enable bit Clock switch will not wait for the PLL lock signal. Clock switch to PLL source will wait until the PLL lock signal is valid. WDTPRE Watchdog Timer Prescaler bit 1:32 1:128 WDTPOST Watchdog Timer Postscaler bits 1:1 1:2 1:4 1:8 1:16 1:32 1:64 1:128 1:256 1:512 1:1,024 1:2,048 1:4,096 1:8,192 1:16,384 1:32,768 FOSC · 0x2AFF6 0xFFFF default 0xFFFF FCKSM Clock Switching Mode bits Both Clock switching and Fail-safe Clock Monitor are enabled Clock switching is enabled,Fail-safe Clock Monitor is disabled Both Clock switching and Fail-safe Clock Monitor are disabled 3 (not named) IOL1WAY Peripheral pin select configuration Allow multiple reconfigurations Allow only one reconfiguration OSCIOFNC OSC2 Pin Function bit OSC2 is general purpose digital I/O pin OSC2 is clock output POSCMD Primary Oscillator Mode Select bits EC (External Clock) Mode XT Crystal Oscillator Mode HS Crystal Oscillator Mode Primary Oscillator disabled FOSCSEL · 0x2AFF8 0xFFFF default 0xFFFF IESO Two-speed Oscillator Start-up Enable bit Start up with user-selected oscillator source Start up device with FRC, then switch to user-selected oscillator source PWMLOCK PWM Lock Enable bit PWM registers may be written without key sequence Certain PWM registers may only be written after key sequence FNOSC Oscillator Source Selection Internal Fast RC (FRC) Fast RC Oscillator with divide-by-N with PLL module (FRCPLL) Primary Oscillator (XT, HS, EC) Primary Oscillator with PLL module (XT + PLL, HS + PLL, EC + PLL) Low-Power RC Oscillator (LPRC) Internal Fast RC (FRC) Oscillator with postscaler FGS · 0x2AFFA 0xFFFF default 0xFFFF GCP General Segment Code-Protect bit General Segment Code protection Enabled General Segment Code protect is Disabled GWRP General Segment Write-Protect bit General Segment is write protected General Segment may be written Reserved · 0x2AFFC 0xFFFF default 0xFFFF Reserved Reserved · 0x2AFFE 0xFFFF default 0xFFFF Reserved 
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