PIC10F320 registers All 63 registers by peripheral, at their data-memory address as the register file map gives it (bank and offset), with their reset value and every bit.
CPU CPU core 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – PCL
Address 0x02
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – 7 IRP 6 RP1 5 RP0 4 nTO 3 nPD 2 Z 1 DC 0 C 8 fields
Field Bits What it does IRP 7 RP1 6 RP0 5 nTO 4 nPD 3 Z 2 DC 1 C 0
7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – PCLATH
Address 0x0A
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 PCLH0 1 field
Field Bits What it does PCLH0 0
TMR0 Timer0 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – OPTION_REG
Address 0x0E
Reset 0xFF
Access read/write 7 nWPUEN 6 INTEDG 5 T0CS 4 T0SE 3 PSA 2 PS2 1 PS1 0 PS0 6 fields
Field Bits What it does nWPUEN 7 INTEDG 6 T0CS 5 T0SE 4 PSA 3 PS 2:0
PORTA I/O port A 7 – 6 – 5 – 4 – 3 RA3 2 RA2 1 RA1 0 RA0 4 fields
Field Bits What it does RA3 3 RA2 2 RA1 1 RA0 0
TRISA
Address 0x06
Reset 0x0F
Access read/write 7 – 6 – 5 – 4 – 3 – 2 TRISA2 1 TRISA1 0 TRISA0 3 fields
Field Bits What it does TRISA2 2 TRISA1 1 TRISA0 0
7 – 6 – 5 – 4 – 3 – 2 LATA2 1 LATA1 0 LATA0 3 fields
Field Bits What it does LATA2 2 LATA1 1 LATA0 0
ANSELA
Address 0x08
Reset 0x07
Access read/write 7 – 6 – 5 – 4 – 3 – 2 ANSA2 1 ANSA1 0 ANSA0 3 fields
Field Bits What it does ANSA2 2 ANSA1 1 ANSA0 0
WPUA
Address 0x09
Reset 0x0F
Access read/write 7 – 6 – 5 – 4 – 3 WPUA3 2 WPUA2 1 WPUA1 0 WPUA0 4 fields
Field Bits What it does WPUA3 3 WPUA2 2 WPUA1 1 WPUA0 0
INTERRUPT Interrupts INTCON
Address 0x0B
Reset 0x00
Access read/write 7 GIE 6 PEIE 5 TMR0IE 4 INTE 3 IOCIE 2 TMR0IF 1 INTF 0 IOCIF 8 fields
Field Bits What it does GIE 7 PEIE 6 TMR0IE 5 INTE 4 IOCIE 3 TMR0IF 2 INTF 1 IOCIF 0
PIR1
Address 0x0C
Reset 0x00
Access read/write 7 – 6 ADIF 5 – 4 NCO1IF 3 CLC1IF 2 – 1 TMR2IF 0 – 4 fields
Field Bits What it does ADIF 6 NCO1IF 4 CLC1IF 3 TMR2IF 1
PIE1
Address 0x0D
Reset 0x00
Access read/write 7 – 6 ADIE 5 – 4 NCO1IE 3 CLC1IE 2 – 1 TMR2IE 0 – 4 fields
Field Bits What it does ADIE 6 NCO1IE 4 CLC1IE 3 TMR2IE 1
OSCILLATOR Oscillator, power control and watchdog 7 – 6 – 5 – 4 – 3 – 2 – 1 nPOR 0 nBOR 2 fields
Field Bits What it does nPOR 1 nBOR 0
OSCCON
Address 0x10
Reset 0x60
Access read/write 7 – 6 IRCF2 5 IRCF1 4 IRCF0 3 HFIOFR 2 – 1 LFIOFR 0 HFIOFS 4 fields
Field Bits What it does IRCF 6:4 HFIOFR 3 LFIOFR 1 HFIOFS 0
CLKRCON
Address 0x26
Reset 0x00
Access read/write 7 – 6 CLKROE 5 – 4 – 3 – 2 – 1 – 0 – 1 field
Field Bits What it does CLKROE 6
WDTCON
Address 0x30
Reset 0x16
Access read/write 7 – 6 – 5 WDTPS4 4 WDTPS3 3 WDTPS2 2 WDTPS1 1 WDTPS0 0 SWDTEN 2 fields
Field Bits What it does WDTPS 5:1 SWDTEN 0
VREGCON
Address 0x3E
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 VREGPM1 0 VREGPM0 1 field
Field Bits What it does VREGPM 1:0
7 SBOREN 6 BORFS 5 – 4 – 3 – 2 – 1 – 0 BORRDY 3 fields
Field Bits What it does SBOREN 7 BORFS 6 BORRDY 0
TMR2 Timer2 TMR2
Address 0x11
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – PR2
Address 0x12
Reset 0xFF
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – T2CON
Address 0x13
Reset 0x00
Access read/write 7 – 6 TOUTPS3 5 TOUTPS2 4 TOUTPS1 3 TOUTPS0 2 TMR2ON 1 T2CKPS1 0 T2CKPS0 3 fields
Field Bits What it does TOUTPS 6:3 TMR2ON 2 T2CKPS 1:0
ECCP1 Enhanced capture/compare/PWM 1 7 PWM1DCL1 6 PWM1DCL0 5 – 4 – 3 – 2 – 1 – 0 – 1 field
Field Bits What it does PWM1DCL 7:6
7 PWM1DCH7 6 PWM1DCH6 5 PWM1DCH5 4 PWM1DCH4 3 PWM1DCH3 2 PWM1DCH2 1 PWM1DCH1 0 PWM1DCH0 1 field
Field Bits What it does PWM1DCH 7:0
7 PWM1EN 6 PWM1OE 5 PWM1OUT 4 PWM1POL 3 – 2 – 1 – 0 – 4 fields
Field Bits What it does PWM1EN 7 PWM1OE 6 PWM1OUT 5 PWM1POL 4
ECCP2 Enhanced capture/compare/PWM 2 7 PWM2DCL1 6 PWM2DCL0 5 – 4 – 3 – 2 – 1 – 0 – 1 field
Field Bits What it does PWM2DCL 7:6
7 PWM2DCH7 6 PWM2DCH6 5 PWM2DCH5 4 PWM2DCH4 3 PWM2DCH3 2 PWM2DCH2 1 PWM2DCH1 0 PWM2DCH0 1 field
Field Bits What it does PWM2DCH 7:0
7 PWM2EN 6 PWM2OE 5 PWM2OUT 4 PWM2POL 3 – 2 – 1 – 0 – 4 fields
Field Bits What it does PWM2EN 7 PWM2OE 6 PWM2OUT 5 PWM2POL 4
IOC Interrupt-on-change IOCAP
Address 0x1A
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 IOCAP3 2 IOCAP2 1 IOCAP1 0 IOCAP0 4 fields
Field Bits What it does IOCAP3 3 IOCAP2 2 IOCAP1 1 IOCAP0 0
IOCAN
Address 0x1B
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 IOCAN3 2 IOCAN2 1 IOCAN1 0 IOCAN0 4 fields
Field Bits What it does IOCAN3 3 IOCAN2 2 IOCAN1 1 IOCAN0 0
IOCAF
Address 0x1C
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 IOCAF3 2 IOCAF2 1 IOCAF1 0 IOCAF0 4 fields
Field Bits What it does IOCAF3 3 IOCAF2 2 IOCAF1 1 IOCAF0 0
FVR Fixed voltage reference 7 FVREN 6 FVRRDY 5 TSEN 4 TSRNG 3 – 2 – 1 ADFVR1 0 ADFVR0 5 fields
Field Bits What it does FVREN 7 FVRRDY 6 TSEN 5 TSRNG 4 ADFVR 1:0
ADC Analog-to-digital converter 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – ADCON
Address 0x1F
Reset 0x00
Access read/write 7 ADCS2 6 ADCS1 5 ADCS0 4 CHS2 3 CHS1 2 CHS0 1 GO/nDONE 0 ADON 4 fields
Field Bits What it does ADCS 7:5 CHS 4:2 GO/nDONE 1 ADON 0
NVM Data EEPROM and flash program memory PMADRL
Address 0x20
Reset 0x00
Access read/write 7 PMADR7 6 PMADR6 5 PMADR5 4 PMADR4 3 PMADR3 2 PMADR2 1 PMADR1 0 PMADR0 1 field
Field Bits What it does PMADR 7:0
PMADRH
Address 0x21
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 PMADR8 1 field
Field Bits What it does PMADR8 0
7 PMDATL7 6 PMDATL6 5 PMDATL5 4 PMDATL4 3 PMDATL3 2 PMDATL2 1 PMDATL1 0 PMDATL0 1 field
Field Bits What it does PMDATL 7:0
7 – 6 – 5 PMDATH5 4 PMDATH4 3 PMDATH3 2 PMDATH2 1 PMDATH1 0 PMDATH0 1 field
Field Bits What it does PMDATH 5:0
PMCON1
Address 0x24
Reset 0x80
Access read/write 7 – 6 CFGS 5 LWLO 4 FREE 3 WRERR 2 WREN 1 WR 0 RD 7 fields
Field Bits What it does CFGS 6 LWLO 5 FREE 4 WRERR 3 WREN 2 WR 1 RD 0
PMCON2
Address 0x25
Reset 0x00
Access read/write 7 PMCON27 6 PMCON26 5 PMCON25 4 PMCON24 3 PMCON23 2 PMCON22 1 PMCON21 0 PMCON20 1 field
Field Bits What it does PMCON2 7:0
NCO1 Numerically controlled oscillator 1 NCO1ACCL
Address 0x27
Reset 0x00
Access read/write 7 NCO1ACC7 6 NCO1ACC6 5 NCO1ACC5 4 NCO1ACC4 3 NCO1ACC3 2 NCO1ACC2 1 NCO1ACC1 0 NCO1ACC0 8 fields
Field Bits What it does NCO1ACC7 7 NCO1ACC6 6 NCO1ACC5 5 NCO1ACC4 4 NCO1ACC3 3 NCO1ACC2 2 NCO1ACC1 1 NCO1ACC0 0
NCO1ACCH
Address 0x28
Reset 0x00
Access read/write 7 NCO1ACC15 6 NCO1ACC14 5 NCO1ACC13 4 NCO1ACC12 3 NCO1ACC11 2 NCO1ACC10 1 NCO1ACC9 0 NCO1ACC8 8 fields
Field Bits What it does NCO1ACC15 7 NCO1ACC14 6 NCO1ACC13 5 NCO1ACC12 4 NCO1ACC11 3 NCO1ACC10 2 NCO1ACC9 1 NCO1ACC8 0
NCO1ACCU
Address 0x29
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 NCO1ACC19 2 NCO1ACC18 1 NCO1ACC17 0 NCO1ACC16 4 fields
Field Bits What it does NCO1ACC19 3 NCO1ACC18 2 NCO1ACC17 1 NCO1ACC16 0
NCO1INCL
Address 0x2A
Reset 0x01
Access read/write 7 NCO1INC7 6 NCO1INC6 5 NCO1INC5 4 NCO1INC4 3 NCO1INC3 2 NCO1INC2 1 NCO1INC1 0 NCO1INC0 8 fields
Field Bits What it does NCO1INC7 7 NCO1INC6 6 NCO1INC5 5 NCO1INC4 4 NCO1INC3 3 NCO1INC2 2 NCO1INC1 1 NCO1INC0 0
NCO1INCH
Address 0x2B
Reset 0x00
Access read/write 7 NCO1INC15 6 NCO1INC14 5 NCO1INC13 4 NCO1INC12 3 NCO1INC11 2 NCO1INC10 1 NCO1INC9 0 NCO1INC8 8 fields
Field Bits What it does NCO1INC15 7 NCO1INC14 6 NCO1INC13 5 NCO1INC12 4 NCO1INC11 3 NCO1INC10 2 NCO1INC9 1 NCO1INC8 0
NCO1INCU
Address 0x2C
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – NCO1CONConfigurable logic cell control
Address 0x2D
Reset 0x00
Access read/write 7 N1EN 6 N1OE 5 N1OUT 4 N1POL 3 – 2 – 1 – 0 N1PFM 5 fields
Field Bits What it does N1EN 7 N1OE 6 N1OUT 5 N1POL 4 N1PFM 0
NCO1CLK
Address 0x2E
Reset 0x00
Access read/write 7 N1PWS2 6 N1PWS1 5 N1PWS0 4 – 3 – 2 – 1 N1CKS1 0 N1CKS0 2 fields
Field Bits What it does N1PWS 7:5 N1CKS 1:0
CLC Configurable logic cell 7 LC1EN 6 LC1OE 5 LC1OUT 4 LC1INTP 3 LC1INTN 2 LC1MODE2 1 LC1MODE1 0 LC1MODE0 8 fields
Field Bits What it does LC1EN 7 LC1OE 6 LC1OUT 5 LC1INTP 4 LC1INTN 3 LC1MODE2 2 LC1MODE1 1 LC1MODE0 0
7 – 6 LC1D2S2 5 LC1D2S1 4 LC1D2S0 3 – 2 LC1D1S2 1 LC1D1S1 0 LC1D1S0 6 fields
Field Bits What it does LC1D2S2 6 LC1D2S1 5 LC1D2S0 4 LC1D1S2 2 LC1D1S1 1 LC1D1S0 0
7 – 6 LC1D4S2 5 LC1D4S1 4 LC1D4S0 3 – 2 LC1D3S2 1 LC1D3S1 0 LC1D3S0 6 fields
Field Bits What it does LC1D4S2 6 LC1D4S1 5 LC1D4S0 4 LC1D3S2 2 LC1D3S1 1 LC1D3S0 0
CLC1POLPolarity control
Address 0x34
Reset 0x00
Access read/write 7 LC1POL 6 – 5 – 4 – 3 LC1G4POL 2 LC1G3POL 1 LC1G2POL 0 LC1G1POL 5 fields
Field Bits What it does LC1POL 7 LC1G4POL 3 LC1G3POL 2 LC1G2POL 1 LC1G1POL 0
7 LC1G1D4T 6 LC1G1D4N 5 LC1G1D3T 4 LC1G1D3N 3 LC1G1D2T 2 LC1G1D2N 1 LC1G1D1T 0 LC1G1D1N 8 fields
Field Bits What it does LC1G1D4T 7 LC1G1D4N 6 LC1G1D3T 5 LC1G1D3N 4 LC1G1D2T 3 LC1G1D2N 2 LC1G1D1T 1 LC1G1D1N 0
7 LC1G2D4T 6 LC1G2D4N 5 LC1G2D3T 4 LC1G2D3N 3 LC1G2D2T 2 LC1G2D2N 1 LC1G2D1T 0 LC1G2D1N 8 fields
Field Bits What it does LC1G2D4T 7 LC1G2D4N 6 LC1G2D3T 5 LC1G2D3N 4 LC1G2D2T 3 LC1G2D2N 2 LC1G2D1T 1 LC1G2D1N 0
7 LC1G3D4T 6 LC1G3D4N 5 LC1G3D3T 4 LC1G3D3N 3 LC1G3D2T 2 LC1G3D2N 1 LC1G3D1T 0 LC1G3D1N 8 fields
Field Bits What it does LC1G3D4T 7 LC1G3D4N 6 LC1G3D3T 5 LC1G3D3N 4 LC1G3D2T 3 LC1G3D2N 2 LC1G3D1T 1 LC1G3D1N 0
7 LC1G4D4T 6 LC1G4D4N 5 LC1G4D3T 4 LC1G4D3N 3 LC1G4D2T 2 LC1G4D2N 1 LC1G4D1T 0 LC1G4D1N 8 fields
Field Bits What it does LC1G4D4T 7 LC1G4D4N 6 LC1G4D3T 5 LC1G4D3N 4 LC1G4D2T 3 LC1G4D2N 2 LC1G4D1T 1 LC1G4D1N 0
CWG1 Complementary waveform generator 1 7 G1EN 6 G1OEB 5 G1OEA 4 G1POLB 3 G1POLA 2 – 1 – 0 G1CS0 6 fields
Field Bits What it does G1EN 7 G1OEB 6 G1OEA 5 G1POLB 4 G1POLA 3 G1CS0 0
7 G1ASDLB1 6 G1ASDLB0 5 G1ASDLA1 4 G1ASDLA0 3 – 2 – 1 G1IS1 0 G1IS0 4 fields
Field Bits What it does G1ASDLB 7:6 G1ASDLA 5:4 G1IS1 1 G1IS0 0
7 G1ASE 6 G1ARSEN 5 – 4 – 3 – 2 – 1 G1ASDCLC1 0 G1ASDFLT 4 fields
Field Bits What it does G1ASE 7 G1ARSEN 6 G1ASDCLC1 1 G1ASDFLT 0
7 – 6 – 5 CWG1DBR5 4 CWG1DBR4 3 CWG1DBR3 2 CWG1DBR2 1 CWG1DBR1 0 CWG1DBR0 1 field
Field Bits What it does CWG1DBR 5:0
7 – 6 – 5 CWG1DBF5 4 CWG1DBF4 3 CWG1DBF3 2 CWG1DBF2 1 CWG1DBF1 0 CWG1DBF0 1 field
Field Bits What it does CWG1DBF 5:0
BETA