PIC16C558 registers All 13 registers by peripheral, at their data-memory address as the register file map gives it (bank and offset), with their reset value and every bit.
CPU CPU core INDF
Address 0x00
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – PCL
Address 0x02
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – 7 IRP 6 RP1 5 RP0 4 nTO 3 nPD 2 Z 1 DC 0 C 7 fields
Field Bits What it does IRP 7 RP 6:5 nTO 4 nPD 3 Z 2 DC 1 C 0
7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – PCLATH
Address 0x0A
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – TMR0 Timer0 7 – 6 – 5 – 4 – 3 – 2 – 1 – 0 – OPTION_REG
Address 0x81
Reset 0xFF
Access read/write 7 nRBPU 6 INTEDG 5 T0CS 4 T0SE 3 PSA 2 PS2 1 PS1 0 PS0 6 fields
Field Bits What it does nRBPU 7 INTEDG 6 T0CS 5 T0SE 4 PSA 3 PS 2:0
PORTA I/O port A 7 – 6 – 5 – 4 RA4 3 RA3 2 RA2 1 RA1 0 RA0 5 fields
Field Bits What it does RA4 4 RA3 3 RA2 2 RA1 1 RA0 0
TRISA
Address 0x85
Reset 0x1F
Access read/write 7 – 6 – 5 – 4 TRISA4 3 TRISA3 2 TRISA2 1 TRISA1 0 TRISA0 5 fields
Field Bits What it does TRISA4 4 TRISA3 3 TRISA2 2 TRISA1 1 TRISA0 0
PORTB I/O port B 7 RB7 6 RB6 5 RB5 4 RB4 3 RB3 2 RB2 1 RB1 0 RB0 8 fields
Field Bits What it does RB7 7 RB6 6 RB5 5 RB4 4 RB3 3 RB2 2 RB1 1 RB0 0
TRISB
Address 0x86
Reset 0xFF
Access read/write 7 TRISB7 6 TRISB6 5 TRISB5 4 TRISB4 3 TRISB3 2 TRISB2 1 TRISB1 0 TRISB0 8 fields
Field Bits What it does TRISB7 7 TRISB6 6 TRISB5 5 TRISB4 4 TRISB3 3 TRISB2 2 TRISB1 1 TRISB0 0
INTERRUPT Interrupts 7 GIE 6 – 5 T0IE 4 INTE 3 RBIE 2 T0IF 1 INTF 0 RBIF 7 fields
Field Bits What it does GIE 7 T0IE 5 INTE 4 RBIE 3 T0IF 2 INTF 1 RBIF 0
OSCILLATOR Oscillator, power control and watchdog PCON
Address 0x8E
Reset 0x00
Access read/write 7 – 6 – 5 – 4 – 3 – 2 – 1 nPOR 0 – 1 field
Field Bits What it does nPOR 1
BETA