BETAINDF0
- Address
0x00- Reset
x (not fixed at power-on)- Access
- read/write
- 7INDF07
- 6INDF06
- 5INDF05
- 4INDF04
- 3INDF03
- 2INDF02
- 1INDF01
- 0INDF00
1 field
| Field | Bits | What it does |
|---|---|---|
| INDF0 | 7:0 |
PIC16F1713 registers
All 247 registers by peripheral, at their data-memory address as the register file map gives it (bank and offset), with their reset value and every bit.
CPU CPU core
INDF1
- Address
0x01- Reset
x (not fixed at power-on)- Access
- read/write
- 7INDF17
- 6INDF16
- 5INDF15
- 4INDF14
- 3INDF13
- 2INDF12
- 1INDF11
- 0INDF10
1 field
| Field | Bits | What it does |
|---|---|---|
| INDF1 | 7:0 |
PCL
- Address
0x02- Reset
0x00- Access
- read/write
- 7PCL7
- 6PCL6
- 5PCL5
- 4PCL4
- 3PCL3
- 2PCL2
- 1PCL1
- 0PCL0
1 field
| Field | Bits | What it does |
|---|---|---|
| PCL | 7:0 |
STATUS
- Address
0x03- Reset
0x18- Access
- read/write
- 7–
- 6–
- 5–
- 4nTO
- 3nPD
- 2Z
- 1DC
- 0C
5 fields
| Field | Bits | What it does |
|---|---|---|
| nTO | 4 | |
| nPD | 3 | |
| Z | 2 | |
| DC | 1 | |
| C | 0 |
FSR0L
- Address
0x04- Reset
0x00- Access
- read/write
- 7FSR0L7
- 6FSR0L6
- 5FSR0L5
- 4FSR0L4
- 3FSR0L3
- 2FSR0L2
- 1FSR0L1
- 0FSR0L0
1 field
| Field | Bits | What it does |
|---|---|---|
| FSR0L | 7:0 |
FSR0H
- Address
0x05- Reset
0x00- Access
- read/write
- 7FSR0H7
- 6FSR0H6
- 5FSR0H5
- 4FSR0H4
- 3FSR0H3
- 2FSR0H2
- 1FSR0H1
- 0FSR0H0
1 field
| Field | Bits | What it does |
|---|---|---|
| FSR0H | 7:0 |
FSR1L
- Address
0x06- Reset
0x00- Access
- read/write
- 7FSR1L7
- 6FSR1L6
- 5FSR1L5
- 4FSR1L4
- 3FSR1L3
- 2FSR1L2
- 1FSR1L1
- 0FSR1L0
1 field
| Field | Bits | What it does |
|---|---|---|
| FSR1L | 7:0 |
FSR1H
- Address
0x07- Reset
0x00- Access
- read/write
- 7FSR1H7
- 6FSR1H6
- 5FSR1H5
- 4FSR1H4
- 3FSR1H3
- 2FSR1H2
- 1FSR1H1
- 0FSR1H0
1 field
| Field | Bits | What it does |
|---|---|---|
| FSR1H | 7:0 |
BSR
- Address
0x08- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4BSR4
- 3BSR3
- 2BSR2
- 1BSR1
- 0BSR0
1 field
| Field | Bits | What it does |
|---|---|---|
| BSR | 4:0 |
WREG
- Address
0x09- Reset
0x00- Access
- read/write
- 7WREG07
- 6WREG06
- 5WREG05
- 4WREG04
- 3WREG03
- 2WREG02
- 1WREG01
- 0WREG00
1 field
| Field | Bits | What it does |
|---|---|---|
| WREG0 | 7:0 |
PCLATH
- Address
0x0A- Reset
0x00- Access
- read/write
- 7–
- 6PCLATH6
- 5PCLATH5
- 4PCLATH4
- 3PCLATH3
- 2PCLATH2
- 1PCLATH1
- 0PCLATH0
1 field
| Field | Bits | What it does |
|---|---|---|
| PCLATH | 6:0 |
STATUS_SHAD
- Address
0xFE4- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2Z_SHAD
- 1DC_SHAD
- 0C_SHAD
3 fields
| Field | Bits | What it does |
|---|---|---|
| Z_SHAD | 2 | |
| DC_SHAD | 1 | |
| C_SHAD | 0 |
WREG_SHAD
- Address
0xFE5- Reset
x (not fixed at power-on)- Access
- read/write
- 7WREG_SHAD7
- 6WREG_SHAD6
- 5WREG_SHAD5
- 4WREG_SHAD4
- 3WREG_SHAD3
- 2WREG_SHAD2
- 1WREG_SHAD1
- 0WREG_SHAD0
1 field
| Field | Bits | What it does |
|---|---|---|
| WREG_SHAD | 7:0 |
BSR_SHAD
- Address
0xFE6- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5–
- 4BSR_SHAD4
- 3BSR_SHAD3
- 2BSR_SHAD2
- 1BSR_SHAD1
- 0BSR_SHAD0
1 field
| Field | Bits | What it does |
|---|---|---|
| BSR_SHAD | 4:0 |
PCLATH_SHAD
- Address
0xFE7- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6PCLATH_SHAD6
- 5PCLATH_SHAD5
- 4PCLATH_SHAD4
- 3PCLATH_SHAD3
- 2PCLATH_SHAD2
- 1PCLATH_SHAD1
- 0PCLATH_SHAD0
1 field
| Field | Bits | What it does |
|---|---|---|
| PCLATH_SHAD | 6:0 |
FSR0L_SHAD
- Address
0xFE8- Reset
x (not fixed at power-on)- Access
- read/write
- 7FSR0L_SHAD7
- 6FSR0L_SHAD6
- 5FSR0L_SHAD5
- 4FSR0L_SHAD4
- 3FSR0L_SHAD3
- 2FSR0L_SHAD2
- 1FSR0L_SHAD1
- 0FSR0L_SHAD0
1 field
| Field | Bits | What it does |
|---|---|---|
| FSR0L_SHAD | 7:0 |
FSR0H_SHAD
- Address
0xFE9- Reset
x (not fixed at power-on)- Access
- read/write
- 7FSR0H_SHAD7
- 6FSR0H_SHAD6
- 5FSR0H_SHAD5
- 4FSR0H_SHAD4
- 3FSR0H_SHAD3
- 2FSR0H_SHAD2
- 1FSR0H_SHAD1
- 0FSR0H_SHAD0
1 field
| Field | Bits | What it does |
|---|---|---|
| FSR0H_SHAD | 7:0 |
FSR1L_SHAD
- Address
0xFEA- Reset
x (not fixed at power-on)- Access
- read/write
- 7FSR1L_SHAD7
- 6FSR1L_SHAD6
- 5FSR1L_SHAD5
- 4FSR1L_SHAD4
- 3FSR1L_SHAD3
- 2FSR1L_SHAD2
- 1FSR1L_SHAD1
- 0FSR1L_SHAD0
1 field
| Field | Bits | What it does |
|---|---|---|
| FSR1L_SHAD | 7:0 |
FSR1H_SHAD
- Address
0xFEB- Reset
x (not fixed at power-on)- Access
- read/write
- 7FSR1H_SHAD7
- 6FSR1H_SHAD6
- 5FSR1H_SHAD5
- 4FSR1H_SHAD4
- 3FSR1H_SHAD3
- 2FSR1H_SHAD2
- 1FSR1H_SHAD1
- 0FSR1H_SHAD0
1 field
| Field | Bits | What it does |
|---|---|---|
| FSR1H_SHAD | 7:0 |
STKPTR
- Address
0xFED- Reset
0x1F- Access
- read/write
- 7–
- 6–
- 5–
- 4STKPTR4
- 3STKPTR3
- 2STKPTR2
- 1STKPTR1
- 0STKPTR0
1 field
| Field | Bits | What it does |
|---|---|---|
| STKPTR | 4:0 |
TOSL
- Address
0xFEE- Reset
x (not fixed at power-on)- Access
- read/write
- 7TOSL7
- 6TOSL6
- 5TOSL5
- 4TOSL4
- 3TOSL3
- 2TOSL2
- 1TOSL1
- 0TOSL0
1 field
| Field | Bits | What it does |
|---|---|---|
| TOSL | 7:0 |
TOSH
- Address
0xFEF- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6TOSH6
- 5TOSH5
- 4TOSH4
- 3TOSH3
- 2TOSH2
- 1TOSH1
- 0TOSH0
1 field
| Field | Bits | What it does |
|---|---|---|
| TOSH | 6:0 |
INTERRUPT Interrupts
INTCON
- Address
0x0B- Reset
x (not fixed at power-on)- Access
- read/write
- 7GIE
- 6PEIE
- 5TMR0IE
- 4INTE
- 3IOCIE
- 2TMR0IF
- 1INTF
- 0IOCIF
8 fields
| Field | Bits | What it does |
|---|---|---|
| GIE | 7 | |
| PEIE | 6 | |
| TMR0IE | 5 | |
| INTE | 4 | |
| IOCIE | 3 | |
| TMR0IF | 2 | |
| INTF | 1 | |
| IOCIF | 0 |
PIR1
- Address
0x11- Reset
0x00- Access
- read/write
- 7TMR1GIF
- 6ADIF
- 5RCIF
- 4TXIF
- 3SSP1IF
- 2CCP1IF
- 1TMR2IF
- 0TMR1IF
8 fields
| Field | Bits | What it does |
|---|---|---|
| TMR1GIF | 7 | Timer1 Gate Interrupt Flag bit |
| ADIF | 6 | A/D Converter Interrupt Flag bit |
| RCIF | 5 | EUSART Receive Interrupt Enable bit |
| TXIF | 4 | EUSART Transmit Interrupt Enable bit |
| SSP1IF | 3 | Synchronous Serial Port (MSSP) Interrupt Flag bit |
| CCP1IF | 2 | |
| TMR2IF | 1 | TMR2 to PR2 Match Interrupt Flag bit |
| TMR1IF | 0 | TMR1 Overflow Interrupt Flag bit |
PIR2
- Address
0x12- Reset
0x00- Access
- read/write
- 7OSFIF
- 6C2IF
- 5C1IF
- 4–
- 3BCL1IF
- 2TMR6IF
- 1TMR4IF
- 0CCP2IF
7 fields
| Field | Bits | What it does |
|---|---|---|
| OSFIF | 7 | Oscillator Fail Interrupt Enable bit |
| C2IF | 6 | Numerically Controlled Oscillator Flag bit |
| C1IF | 5 | Numerically Controlled Oscillator Flag bit |
| BCL1IF | 3 | MSSP Bus Collision Interrupt Flag bit |
| TMR6IF | 2 | Numerically Controlled Oscillator Flag bit |
| TMR4IF | 1 | |
| CCP2IF | 0 |
PIR3
- Address
0x13- Reset
0x00- Access
- read/write
- 7–
- 6NCOIF
- 5COGIF
- 4ZCDIF
- 3CLC4IF
- 2CLC3IF
- 1CLC2IF
- 0CLC1IF
7 fields
| Field | Bits | What it does |
|---|---|---|
| NCOIF | 6 | |
| COGIF | 5 | |
| ZCDIF | 4 | |
| CLC4IF | 3 | Configurable Logic Block Interrupt Flag |
| CLC3IF | 2 | Configurable Logic Block Interrupt Flag |
| CLC2IF | 1 | Configurable Logic Block Interrupt Flag |
| CLC1IF | 0 | Configurable Logic Block Interrupt Flag |
PIE1Peripheral Interrupt Enable Register 1
- Address
0x91- Reset
0x00- Access
- read/write
- 7TMR1GIE
- 6ADIE
- 5RCIE
- 4TXIE
- 3SSP1IE
- 2CCP1IE
- 1TMR2IE
- 0TMR1IE
8 fields
| Field | Bits | What it does |
|---|---|---|
| TMR1GIE | 7 | Timer1 Gate Interrupt Enable bit |
| ADIE | 6 | A/D Converter Interrupt Enable bit |
| RCIE | 5 | |
| TXIE | 4 | |
| SSP1IE | 3 | |
| CCP1IE | 2 | |
| TMR2IE | 1 | TMR2 to PR2 Match Interrupt Enable bit |
| TMR1IE | 0 | TMR1 Overflow Interrupt Enable bit |
PIE2Peripheral Interrupt Enable Register 2
- Address
0x92- Reset
0x00- Access
- read/write
- 7OSFIE
- 6C2IE
- 5C1IE
- 4–
- 3BCL1IE
- 2TMR6IE
- 1TMR4IE
- 0CCP2IE
7 fields
| Field | Bits | What it does |
|---|---|---|
| OSFIE | 7 | |
| C2IE | 6 | |
| C1IE | 5 | |
| BCL1IE | 3 | |
| TMR6IE | 2 | |
| TMR4IE | 1 | |
| CCP2IE | 0 |
PIE3Peripheral Interrupt Enable Register 3
- Address
0x93- Reset
0x00- Access
- read/write
- 7–
- 6NCOIE
- 5COGIE
- 4ZCDIE
- 3CLC4IE
- 2CLC3IE
- 1CLC2IE
- 0CLC1IE
7 fields
| Field | Bits | What it does |
|---|---|---|
| NCOIE | 6 | |
| COGIE | 5 | |
| ZCDIE | 4 | |
| CLC4IE | 3 | |
| CLC3IE | 2 | |
| CLC2IE | 1 | |
| CLC1IE | 0 |
PORTA I/O port A
PORTA
- Address
0x0C- Reset
x (not fixed at power-on)- Access
- read/write
- 7RA7
- 6RA6
- 5RA5
- 4RA4
- 3RA3
- 2RA2
- 1RA1
- 0RA0
8 fields
| Field | Bits | What it does |
|---|---|---|
| RA7 | 7 | |
| RA6 | 6 | |
| RA5 | 5 | |
| RA4 | 4 | |
| RA3 | 3 | |
| RA2 | 2 | |
| RA1 | 1 | |
| RA0 | 0 |
TRISAPORTA Data Direction Control Register
- Address
0x8C- Reset
0xFF- Access
- read/write
- 7TRISA7
- 6TRISA6
- 5TRISA5
- 4TRISA4
- 3TRISA3
- 2TRISA2
- 1TRISA1
- 0TRISA0
8 fields
| Field | Bits | What it does |
|---|---|---|
| TRISA7 | 7 | |
| TRISA6 | 6 | |
| TRISA5 | 5 | |
| TRISA4 | 4 | |
| TRISA3 | 3 | |
| TRISA2 | 2 | |
| TRISA1 | 1 | |
| TRISA0 | 0 |
LATA
- Address
0x10C- Reset
x (not fixed at power-on)- Access
- read/write
- 7LATA7
- 6LATA6
- 5LATA5
- 4LATA4
- 3LATA3
- 2LATA2
- 1LATA1
- 0LATA0
8 fields
| Field | Bits | What it does |
|---|---|---|
| LATA7 | 7 | |
| LATA6 | 6 | |
| LATA5 | 5 | |
| LATA4 | 4 | |
| LATA3 | 3 | |
| LATA2 | 2 | |
| LATA1 | 1 | |
| LATA0 | 0 |
ANSELA
- Address
0x18C- Reset
0x3F- Access
- read/write
- 7–
- 6–
- 5ANSA5
- 4ANSA4
- 3ANSA3
- 2ANSA2
- 1ANSA1
- 0ANSA0
6 fields
| Field | Bits | What it does |
|---|---|---|
| ANSA5 | 5 | |
| ANSA4 | 4 | |
| ANSA3 | 3 | |
| ANSA2 | 2 | |
| ANSA1 | 1 | |
| ANSA0 | 0 |
WPUA
- Address
0x20C- Reset
0xFF- Access
- read/write
- 7WPUA7
- 6WPUA6
- 5WPUA5
- 4WPUA4
- 3WPUA3
- 2WPUA2
- 1WPUA1
- 0WPUA0
8 fields
| Field | Bits | What it does |
|---|---|---|
| WPUA7 | 7 | |
| WPUA6 | 6 | |
| WPUA5 | 5 | |
| WPUA4 | 4 | |
| WPUA3 | 3 | |
| WPUA2 | 2 | |
| WPUA1 | 1 | |
| WPUA0 | 0 |
ODCONA
- Address
0x28C- Reset
0x00- Access
- read/write
- 7ODA7
- 6ODA6
- 5ODA5
- 4ODA4
- 3ODA3
- 2ODA2
- 1ODA1
- 0ODA0
8 fields
| Field | Bits | What it does |
|---|---|---|
| ODA7 | 7 | |
| ODA6 | 6 | |
| ODA5 | 5 | |
| ODA4 | 4 | |
| ODA3 | 3 | |
| ODA2 | 2 | |
| ODA1 | 1 | |
| ODA0 | 0 |
SLRCONA
- Address
0x30C- Reset
0xFF- Access
- read/write
- 7SLRA7
- 6SLRA6
- 5SLRA5
- 4SLRA4
- 3SLRA3
- 2SLRA2
- 1SLRA1
- 0SLRA0
8 fields
| Field | Bits | What it does |
|---|---|---|
| SLRA7 | 7 | |
| SLRA6 | 6 | |
| SLRA5 | 5 | |
| SLRA4 | 4 | |
| SLRA3 | 3 | |
| SLRA2 | 2 | |
| SLRA1 | 1 | |
| SLRA0 | 0 |
INLVLA
- Address
0x38C- Reset
0xFF- Access
- read/write
- 7INLVLA7
- 6INLVLA6
- 5INLVLA5
- 4INLVLA4
- 3INLVLA3
- 2INLVLA2
- 1INLVLA1
- 0INLVLA0
8 fields
| Field | Bits | What it does |
|---|---|---|
| INLVLA7 | 7 | |
| INLVLA6 | 6 | |
| INLVLA5 | 5 | |
| INLVLA4 | 4 | |
| INLVLA3 | 3 | |
| INLVLA2 | 2 | |
| INLVLA1 | 1 | |
| INLVLA0 | 0 |
PORTB I/O port B
PORTB
- Address
0x0D- Reset
x (not fixed at power-on)- Access
- read/write
- 7RB7
- 6RB6
- 5RB5
- 4RB4
- 3RB3
- 2RB2
- 1RB1
- 0RB0
8 fields
| Field | Bits | What it does |
|---|---|---|
| RB7 | 7 | |
| RB6 | 6 | |
| RB5 | 5 | |
| RB4 | 4 | |
| RB3 | 3 | |
| RB2 | 2 | |
| RB1 | 1 | |
| RB0 | 0 |
TRISB
- Address
0x8D- Reset
0xFF- Access
- read/write
- 7TRISB7
- 6TRISB6
- 5TRISB5
- 4TRISB4
- 3TRISB3
- 2TRISB2
- 1TRISB1
- 0TRISB0
8 fields
| Field | Bits | What it does |
|---|---|---|
| TRISB7 | 7 | |
| TRISB6 | 6 | |
| TRISB5 | 5 | |
| TRISB4 | 4 | |
| TRISB3 | 3 | |
| TRISB2 | 2 | |
| TRISB1 | 1 | |
| TRISB0 | 0 |
LATB
- Address
0x10D- Reset
x (not fixed at power-on)- Access
- read/write
- 7LATB7
- 6LATB6
- 5LATB5
- 4LATB4
- 3LATB3
- 2LATB2
- 1LATB1
- 0LATB0
8 fields
| Field | Bits | What it does |
|---|---|---|
| LATB7 | 7 | |
| LATB6 | 6 | |
| LATB5 | 5 | |
| LATB4 | 4 | |
| LATB3 | 3 | |
| LATB2 | 2 | |
| LATB1 | 1 | |
| LATB0 | 0 |
ANSELB
- Address
0x18D- Reset
0x3F- Access
- read/write
- 7–
- 6–
- 5ANSB5
- 4ANSB4
- 3ANSB3
- 2ANSB2
- 1ANSB1
- 0ANSB0
6 fields
| Field | Bits | What it does |
|---|---|---|
| ANSB5 | 5 | |
| ANSB4 | 4 | |
| ANSB3 | 3 | |
| ANSB2 | 2 | |
| ANSB1 | 1 | |
| ANSB0 | 0 |
WPUB
- Address
0x20D- Reset
0xFF- Access
- read/write
- 7WPUB7
- 6WPUB6
- 5WPUB5
- 4WPUB4
- 3WPUB3
- 2WPUB2
- 1WPUB1
- 0WPUB0
8 fields
| Field | Bits | What it does |
|---|---|---|
| WPUB7 | 7 | |
| WPUB6 | 6 | |
| WPUB5 | 5 | |
| WPUB4 | 4 | |
| WPUB3 | 3 | |
| WPUB2 | 2 | |
| WPUB1 | 1 | |
| WPUB0 | 0 |
ODCONB
- Address
0x28D- Reset
0x00- Access
- read/write
- 7ODB7
- 6ODB6
- 5ODB5
- 4ODB4
- 3ODB3
- 2ODB2
- 1ODB1
- 0ODB0
8 fields
| Field | Bits | What it does |
|---|---|---|
| ODB7 | 7 | |
| ODB6 | 6 | |
| ODB5 | 5 | |
| ODB4 | 4 | |
| ODB3 | 3 | |
| ODB2 | 2 | |
| ODB1 | 1 | |
| ODB0 | 0 |
SLRCONB
- Address
0x30D- Reset
0xFF- Access
- read/write
- 7SLRB7
- 6SLRB6
- 5SLRB5
- 4SLRB4
- 3SLRB3
- 2SLRB2
- 1SLRB1
- 0SLRB0
8 fields
| Field | Bits | What it does |
|---|---|---|
| SLRB7 | 7 | |
| SLRB6 | 6 | |
| SLRB5 | 5 | |
| SLRB4 | 4 | |
| SLRB3 | 3 | |
| SLRB2 | 2 | |
| SLRB1 | 1 | |
| SLRB0 | 0 |
INLVLB
- Address
0x38D- Reset
0xFF- Access
- read/write
- 7INLVLB7
- 6INLVLB6
- 5INLVLB5
- 4INLVLB4
- 3INLVLB3
- 2INLVLB2
- 1INLVLB1
- 0INLVLB0
8 fields
| Field | Bits | What it does |
|---|---|---|
| INLVLB7 | 7 | |
| INLVLB6 | 6 | |
| INLVLB5 | 5 | |
| INLVLB4 | 4 | |
| INLVLB3 | 3 | |
| INLVLB2 | 2 | |
| INLVLB1 | 1 | |
| INLVLB0 | 0 |
PORTC I/O port C
PORTC
- Address
0x0E- Reset
x (not fixed at power-on)- Access
- read/write
- 7RC7
- 6RC6
- 5RC5
- 4RC4
- 3RC3
- 2RC2
- 1RC1
- 0RC0
8 fields
| Field | Bits | What it does |
|---|---|---|
| RC7 | 7 | |
| RC6 | 6 | |
| RC5 | 5 | |
| RC4 | 4 | |
| RC3 | 3 | |
| RC2 | 2 | |
| RC1 | 1 | |
| RC0 | 0 |
TRISCPORTC Data Direction Control Register
- Address
0x8E- Reset
0xFF- Access
- read/write
- 7TRISC7
- 6TRISC6
- 5TRISC5
- 4TRISC4
- 3TRISC3
- 2TRISC2
- 1TRISC1
- 0TRISC0
8 fields
| Field | Bits | What it does |
|---|---|---|
| TRISC7 | 7 | |
| TRISC6 | 6 | |
| TRISC5 | 5 | |
| TRISC4 | 4 | |
| TRISC3 | 3 | |
| TRISC2 | 2 | |
| TRISC1 | 1 | |
| TRISC0 | 0 |
LATC
- Address
0x10E- Reset
x (not fixed at power-on)- Access
- read/write
- 7LATC7
- 6LATC6
- 5LATC5
- 4LATC4
- 3LATC3
- 2LATC2
- 1LATC1
- 0LATC0
8 fields
| Field | Bits | What it does |
|---|---|---|
| LATC7 | 7 | |
| LATC6 | 6 | |
| LATC5 | 5 | |
| LATC4 | 4 | |
| LATC3 | 3 | |
| LATC2 | 2 | |
| LATC1 | 1 | |
| LATC0 | 0 |
ANSELC
- Address
0x18E- Reset
0xFC- Access
- read/write
- 7ANSC7
- 6ANSC6
- 5ANSC5
- 4ANSC4
- 3ANSC3
- 2ANSC2
- 1–
- 0–
6 fields
| Field | Bits | What it does |
|---|---|---|
| ANSC7 | 7 | |
| ANSC6 | 6 | |
| ANSC5 | 5 | |
| ANSC4 | 4 | |
| ANSC3 | 3 | |
| ANSC2 | 2 |
WPUC
- Address
0x20E- Reset
0xFF- Access
- read/write
- 7WPUC7
- 6WPUC6
- 5WPUC5
- 4WPUC4
- 3WPUC3
- 2WPUC2
- 1WPUC1
- 0WPUC0
8 fields
| Field | Bits | What it does |
|---|---|---|
| WPUC7 | 7 | |
| WPUC6 | 6 | |
| WPUC5 | 5 | |
| WPUC4 | 4 | |
| WPUC3 | 3 | |
| WPUC2 | 2 | |
| WPUC1 | 1 | |
| WPUC0 | 0 |
ODCONC
- Address
0x28E- Reset
0x00- Access
- read/write
- 7ODC7
- 6ODC6
- 5ODC5
- 4ODC4
- 3ODC3
- 2ODC2
- 1ODC1
- 0ODC0
8 fields
| Field | Bits | What it does |
|---|---|---|
| ODC7 | 7 | |
| ODC6 | 6 | |
| ODC5 | 5 | |
| ODC4 | 4 | |
| ODC3 | 3 | |
| ODC2 | 2 | |
| ODC1 | 1 | |
| ODC0 | 0 |
SLRCONC
- Address
0x30E- Reset
0xFF- Access
- read/write
- 7SLRC7
- 6SLRC6
- 5SLRC5
- 4SLRC4
- 3SLRC3
- 2SLRC2
- 1SLRC1
- 0SLRC0
8 fields
| Field | Bits | What it does |
|---|---|---|
| SLRC7 | 7 | |
| SLRC6 | 6 | |
| SLRC5 | 5 | |
| SLRC4 | 4 | |
| SLRC3 | 3 | |
| SLRC2 | 2 | |
| SLRC1 | 1 | |
| SLRC0 | 0 |
INLVLC
- Address
0x38E- Reset
0xFF- Access
- read/write
- 7INLVLC7
- 6INLVLC6
- 5INLVLC5
- 4INLVLC4
- 3INLVLC3
- 2INLVLC2
- 1INLVLC1
- 0INLVLC0
8 fields
| Field | Bits | What it does |
|---|---|---|
| INLVLC7 | 7 | |
| INLVLC6 | 6 | |
| INLVLC5 | 5 | |
| INLVLC4 | 4 | |
| INLVLC3 | 3 | |
| INLVLC2 | 2 | |
| INLVLC1 | 1 | |
| INLVLC0 | 0 |
PORTE I/O port E
PORTE
- Address
0x10- Reset
x (not fixed at power-on)- Access
- read only
- 7–
- 6–
- 5–
- 4–
- 3RE3
- 2–
- 1–
- 0–
1 field
| Field | Bits | What it does |
|---|---|---|
| RE3 | 3 |
TRISE
- Address
0x90- Reset
0x08- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3TRISE3
- 2–
- 1–
- 0–
1 field
| Field | Bits | What it does |
|---|---|---|
| TRISE3 | 3 |
WPUE
- Address
0x210- Reset
0x08- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3WPUE3
- 2–
- 1–
- 0–
1 field
| Field | Bits | What it does |
|---|---|---|
| WPUE3 | 3 |
INLVLE
- Address
0x390- Reset
0x08- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3INLVLE3
- 2–
- 1–
- 0–
1 field
| Field | Bits | What it does |
|---|---|---|
| INLVLE3 | 3 |
TMR0 Timer0
TMR0
- Address
0x15- Reset
x (not fixed at power-on)- Access
- read/write
- 7TMR07
- 6TMR06
- 5TMR05
- 4TMR04
- 3TMR03
- 2TMR02
- 1TMR01
- 0TMR00
1 field
| Field | Bits | What it does |
|---|---|---|
| TMR0 | 7:0 |
OPTION_REGOption Register
- Address
0x95- Reset
0xFF- Access
- read/write
- 7nWPUEN
- 6INTEDG
- 5TMR0CS
- 4TMR0SE
- 3PSA
- 2PS2
- 1PS1
- 0PS0
6 fields
| Field | Bits | What it does |
|---|---|---|
| nWPUEN | 7 | Weak Pull-up Enable bit |
| INTEDG | 6 | Interrupt Edge Select bit |
| TMR0CS | 5 | |
| TMR0SE | 4 | TMR0 Source Edge Select bit |
| PSA | 3 | Prescaler Active bit |
| PS | 2:0 |
TMR1 Timer1
TMR1L
- Address
0x16- Reset
x (not fixed at power-on)- Access
- read/write
- 7TMR1L7
- 6TMR1L6
- 5TMR1L5
- 4TMR1L4
- 3TMR1L3
- 2TMR1L2
- 1TMR1L1
- 0TMR1L0
1 field
| Field | Bits | What it does |
|---|---|---|
| TMR1L | 7:0 |
TMR1H
- Address
0x17- Reset
x (not fixed at power-on)- Access
- read/write
- 7TMR1H7
- 6TMR1H6
- 5TMR1H5
- 4TMR1H4
- 3TMR1H3
- 2TMR1H2
- 1TMR1H1
- 0TMR1H0
1 field
| Field | Bits | What it does |
|---|---|---|
| TMR1H | 7:0 |
T1CON
- Address
0x18- Reset
0x00- Access
- read/write
- 7TMR1CS1
- 6TMR1CS0
- 5T1CKPS1
- 4T1CKPS0
- 3T1OSCEN
- 2nT1SYNC
- 1–
- 0TMR1ON
5 fields
| Field | Bits | What it does |
|---|---|---|
| TMR1CS | 7:6 | |
| T1CKPS | 5:4 | |
| T1OSCEN | 3 | |
| nT1SYNC | 2 | |
| TMR1ON | 0 |
T1GCON
- Address
0x19- Reset
x (not fixed at power-on)- Access
- read/write
- 7TMR1GE
- 6T1GPOL
- 5T1GTM
- 4T1GSPM
- 3T1GGO_nDONE
- 2T1GVAL
- 1T1GSS1
- 0T1GSS0
7 fields
| Field | Bits | What it does |
|---|---|---|
| TMR1GE | 7 | |
| T1GPOL | 6 | |
| T1GTM | 5 | |
| T1GSPM | 4 | |
| T1GGO_nDONE | 3 | |
| T1GVAL | 2 | |
| T1GSS | 1:0 |
TMR2 Timer2
TMR28-bit period timer
- Address
0x1A- Reset
0x00- Access
- read/write
- 7TMR27
- 6TMR26
- 5TMR25
- 4TMR24
- 3TMR23
- 2TMR22
- 1TMR21
- 0TMR20
1 field
| Field | Bits | What it does |
|---|---|---|
| TMR2 | 7:0 |
PR2
- Address
0x1B- Reset
0xFF- Access
- read/write
- 7PR27
- 6PR26
- 5PR25
- 4PR24
- 3PR23
- 2PR22
- 1PR21
- 0PR20
1 field
| Field | Bits | What it does |
|---|---|---|
| PR2 | 7:0 |
T2CON
- Address
0x1C- Reset
0x00- Access
- read/write
- 7–
- 6T2OUTPS3
- 5T2OUTPS2
- 4T2OUTPS1
- 3T2OUTPS0
- 2TMR2ON
- 1T2CKPS1
- 0T2CKPS0
3 fields
| Field | Bits | What it does |
|---|---|---|
| T2OUTPS | 6:3 | |
| TMR2ON | 2 | |
| T2CKPS | 1:0 |
OSCILLATOR Oscillator, power control and watchdog
PCONPower Control Register
- Address
0x96- Reset
x (not fixed at power-on)- Access
- read/write
- 7STKOVF
- 6STKUNF
- 5–
- 4nRWDT
- 3nRMCLR
- 2nRI
- 1nPOR
- 0nBOR
7 fields
| Field | Bits | What it does |
|---|---|---|
| STKOVF | 7 | Stack Overflow Flag bit |
| STKUNF | 6 | Stack Underflow Flag bit |
| nRWDT | 4 | |
| nRMCLR | 3 | MCLR Reset Flag bit |
| nRI | 2 | RESET Instruction Flag bit |
| nPOR | 1 | Power-on Reset Status bit |
| nBOR | 0 | Brown-out Reset Status bit |
WDTCONWatchdog Timer Control Register
- Address
0x97- Reset
0x16- Access
- read/write
- 7–
- 6–
- 5WDTPS4
- 4WDTPS3
- 3WDTPS2
- 2WDTPS1
- 1WDTPS0
- 0SWDTEN
2 fields
| Field | Bits | What it does |
|---|---|---|
| WDTPS | 5:1 | |
| SWDTEN | 0 | Software Enable/Disable for Watch Dog Timer bit |
OSCTUNE
- Address
0x98- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5TUN5
- 4TUN4
- 3TUN3
- 2TUN2
- 1TUN1
- 0TUN0
1 field
| Field | Bits | What it does |
|---|---|---|
| TUN | 5:0 |
OSCCONOscillator Control Register
- Address
0x99- Reset
0x38- Access
- read/write
- 7SPLLEN
- 6IRCF3
- 5IRCF2
- 4IRCF1
- 3IRCF0
- 2–
- 1SCS1
- 0SCS0
3 fields
| Field | Bits | What it does |
|---|---|---|
| SPLLEN | 7 | |
| IRCF | 6:3 | |
| SCS | 1:0 |
OSCSTATOscillator Status Register
- Address
0x9A- Reset
x (not fixed at power-on)- Access
- read only
- 7SOSCR
- 6PLLR
- 5OSTS
- 4HFIOFR
- 3HFIOFL
- 2MFIOFR
- 1LFIOFR
- 0HFIOFS
8 fields
| Field | Bits | What it does |
|---|---|---|
| SOSCR | 7 | |
| PLLR | 6 | |
| OSTS | 5 | Oscillator Start-up Time-out Status bit |
| HFIOFR | 4 | |
| HFIOFL | 3 | |
| MFIOFR | 2 | |
| LFIOFR | 1 | Low Freqency Internal Oscillator Ready bit |
| HFIOFS | 0 | Low Freqency Internal Oscillator Ready bit |
BORCONBrown-out Reset Control Register
- Address
0x116- Reset
x (not fixed at power-on)- Access
- read/write
- 7SBOREN
- 6BORFS
- 5–
- 4–
- 3–
- 2–
- 1–
- 0BORRDY
3 fields
| Field | Bits | What it does |
|---|---|---|
| SBOREN | 7 | Software Brown Out Reset Enable bit |
| BORFS | 6 | |
| BORRDY | 0 | Brown-out Reset Circuit Ready Status bit |
VREGCON
- Address
0x197- Reset
0x01- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2–
- 1VREGPM
- 0Reserved
2 fields
| Field | Bits | What it does |
|---|---|---|
| VREGPM | 1 | |
| Reserved | 0 |
ADC Analog-to-digital converter
ADRESLA/D Result Register LSB
- Address
0x9B- Reset
x (not fixed at power-on)- Access
- read/write
- 7ADRESL7
- 6ADRESL6
- 5ADRESL5
- 4ADRESL4
- 3ADRESL3
- 2ADRESL2
- 1ADRESL1
- 0ADRESL0
1 field
| Field | Bits | What it does |
|---|---|---|
| ADRESL | 7:0 |
ADRESHA/D Result Register MSB
- Address
0x9C- Reset
x (not fixed at power-on)- Access
- read/write
- 7ADRESH7
- 6ADRESH6
- 5ADRESH5
- 4ADRESH4
- 3ADRESH3
- 2ADRESH2
- 1ADRESH1
- 0ADRESH0
1 field
| Field | Bits | What it does |
|---|---|---|
| ADRESH | 7:0 |
ADCON0Analog-to-Digital Control Register 0
- Address
0x9D- Reset
0x00- Access
- read/write
- 7–
- 6CHS4
- 5CHS3
- 4CHS2
- 3CHS1
- 2CHS0
- 1GO/nDONE
- 0ADON
3 fields
| Field | Bits | What it does |
|---|---|---|
| CHS | 6:2 | |
| GO/nDONE | 1 | A/D Conversion Status bit |
| ADON | 0 | A/D Module Enable bit |
ADCON1Analog-to-Digital Control Register 1
- Address
0x9E- Reset
0x00- Access
- read/write
- 7ADFM
- 6ADCS2
- 5ADCS1
- 4ADCS0
- 3–
- 2ADNREF
- 1ADPREF1
- 0ADPREF0
4 fields
| Field | Bits | What it does |
|---|---|---|
| ADFM | 7 | A/D Result Format Select bit |
| ADCS | 6:4 | |
| ADNREF | 2 | |
| ADPREF | 1:0 |
ADCON2Analog-to-Digital Control Register 2
- Address
0x9F- Reset
0x00- Access
- read/write
- 7TRIGSEL3
- 6TRIGSEL2
- 5TRIGSEL1
- 4TRIGSEL0
- 3–
- 2–
- 1–
- 0–
1 field
| Field | Bits | What it does |
|---|---|---|
| TRIGSEL | 7:4 |
COMPARATOR Comparators and voltage reference
CM1CON0
- Address
0x111- Reset
0x04- Access
- read/write
- 7C1ON
- 6C1OUT
- 5–
- 4C1POL
- 3C1ZLF
- 2C1SP
- 1C1HYS
- 0C1SYNC
7 fields
| Field | Bits | What it does |
|---|---|---|
| C1ON | 7 | |
| C1OUT | 6 | |
| C1POL | 4 | |
| C1ZLF | 3 | |
| C1SP | 2 | |
| C1HYS | 1 | |
| C1SYNC | 0 |
CM1CON1
- Address
0x112- Reset
0x00- Access
- read/write
- 7C1INTP
- 6C1INTN
- 5C1PCH2
- 4C1PCH1
- 3C1PCH0
- 2C1NCH2
- 1C1NCH1
- 0C1NCH0
4 fields
| Field | Bits | What it does |
|---|---|---|
| C1INTP | 7 | |
| C1INTN | 6 | |
| C1PCH | 5:3 | |
| C1NCH | 2:0 |
CM2CON0
- Address
0x113- Reset
0x04- Access
- read/write
- 7C2ON
- 6C2OUT
- 5–
- 4C2POL
- 3C2ZLF
- 2C2SP
- 1C2HYS
- 0C2SYNC
7 fields
| Field | Bits | What it does |
|---|---|---|
| C2ON | 7 | |
| C2OUT | 6 | |
| C2POL | 4 | |
| C2ZLF | 3 | |
| C2SP | 2 | |
| C2HYS | 1 | |
| C2SYNC | 0 |
CM2CON1
- Address
0x114- Reset
0x00- Access
- read/write
- 7C2INTP
- 6C2INTN
- 5C2PCH2
- 4C2PCH1
- 3C2PCH0
- 2C2NCH2
- 1C2NCH1
- 0C2NCH0
4 fields
| Field | Bits | What it does |
|---|---|---|
| C2INTP | 7 | |
| C2INTN | 6 | |
| C2PCH | 5:3 | |
| C2NCH | 2:0 |
CMOUTComparator Output Register
- Address
0x115- Reset
0x00- Access
- read only
- 7–
- 6–
- 5–
- 4–
- 3–
- 2–
- 1MC2OUT
- 0MC1OUT
2 fields
| Field | Bits | What it does |
|---|---|---|
| MC2OUT | 1 | |
| MC1OUT | 0 |
FVR Fixed voltage reference
FVRCONVoltage Reference Control Register 0
- Address
0x117- Reset
x (not fixed at power-on)- Access
- read/write
- 7FVREN
- 6FVRRDY
- 5TSEN
- 4TSRNG
- 3CDAFVR1
- 2CDAFVR0
- 1ADFVR1
- 0ADFVR0
6 fields
| Field | Bits | What it does |
|---|---|---|
| FVREN | 7 | Fixed Voltage Reference Enable |
| FVRRDY | 6 | Fixed Voltage Reference Ready Flag |
| TSEN | 5 | Temperature Sensor Enable |
| TSRNG | 4 | Temperature Sensor Range Select |
| CDAFVR | 3:2 | |
| ADFVR | 1:0 | A/D Converter Fixed Voltage Reference Selection |
DAC1 Digital-to-analog converter 1
DAC1CON0
- Address
0x118- Reset
0x00- Access
- read/write
- 7DAC1EN
- 6–
- 5DAC1OE1
- 4DAC1OE2
- 3DAC1PSS1
- 2DAC1PSS0
- 1–
- 0DAC1NSS
5 fields
| Field | Bits | What it does |
|---|---|---|
| DAC1EN | 7 | |
| DAC1OE1 | 5 | |
| DAC1OE2 | 4 | |
| DAC1PSS | 3:2 | |
| DAC1NSS | 0 |
DAC1CON1
- Address
0x119- Reset
0x00- Access
- read/write
- 7DAC1R7
- 6DAC1R6
- 5DAC1R5
- 4DAC1R4
- 3DAC1R3
- 2DAC1R2
- 1DAC1R1
- 0DAC1R0
1 field
| Field | Bits | What it does |
|---|---|---|
| DAC1R | 7:0 |
DAC2 Digital-to-analog converter 2
DAC2CON0
- Address
0x11A- Reset
0x00- Access
- read/write
- 7EN
- 6–
- 5OE1
- 4OE2
- 3PSS1
- 2PSS0
- 1–
- 0NSS
5 fields
| Field | Bits | What it does |
|---|---|---|
| EN | 7 | |
| OE1 | 5 | |
| OE2 | 4 | |
| PSS | 3:2 | |
| NSS | 0 |
DAC2REF
- Address
0x11B- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4DACR4
- 3DACR3
- 2DACR2
- 1DACR1
- 0DACR0
1 field
| Field | Bits | What it does |
|---|---|---|
| DACR | 4:0 |
ZCD Zero-cross detector
ZCD1CON
- Address
0x11C- Reset
x (not fixed at power-on)- Access
- read/write
- 7ZCD1EN
- 6–
- 5ZCD1OUT
- 4ZCD1POL
- 3–
- 2–
- 1ZCD1INTP
- 0ZCD1INTN
5 fields
| Field | Bits | What it does |
|---|---|---|
| ZCD1EN | 7 | |
| ZCD1OUT | 5 | |
| ZCD1POL | 4 | |
| ZCD1INTP | 1 | |
| ZCD1INTN | 0 |
NVM Data EEPROM and flash program memory
PMADRL
- Address
0x191- Reset
0x00- Access
- read/write
- 7PMADRL7
- 6PMADRL6
- 5PMADRL5
- 4PMADRL4
- 3PMADRL3
- 2PMADRL2
- 1PMADRL1
- 0PMADRL0
1 field
| Field | Bits | What it does |
|---|---|---|
| PMADRL | 7:0 |
PMADRH
- Address
0x192- Reset
0x80- Access
- read/write
- 7–
- 6PMADRH6
- 5PMADRH5
- 4PMADRH4
- 3PMADRH3
- 2PMADRH2
- 1PMADRH1
- 0PMADRH0
1 field
| Field | Bits | What it does |
|---|---|---|
| PMADRH | 6:0 |
PMDATL
- Address
0x193- Reset
x (not fixed at power-on)- Access
- read/write
- 7PMDATL7
- 6PMDATL6
- 5PMDATL5
- 4PMDATL4
- 3PMDATL3
- 2PMDATL2
- 1PMDATL1
- 0PMDATL0
1 field
| Field | Bits | What it does |
|---|---|---|
| PMDATL | 7:0 |
PMDATH
- Address
0x194- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5PMDATH5
- 4PMDATH4
- 3PMDATH3
- 2PMDATH2
- 1PMDATH1
- 0PMDATH0
1 field
| Field | Bits | What it does |
|---|---|---|
| PMDATH | 5:0 |
PMCON1
- Address
0x195- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6CFGS
- 5LWLO
- 4FREE
- 3WRERR
- 2WREN
- 1WR
- 0RD
7 fields
| Field | Bits | What it does |
|---|---|---|
| CFGS | 6 | FLASH Program / Data EEPROM or Configuration Select bit |
| LWLO | 5 | Load Write Latches Only bit |
| FREE | 4 | Program FLASH Erase Enable bit |
| WRERR | 3 | Sequence Error Flag bit |
| WREN | 2 | Program/Erase Enable bit |
| WR | 1 | Write Control bit |
| RD | 0 | Read Control bit |
PMCON2
- Address
0x196- Reset
0x00- Access
- write only
- 7PMCON27
- 6PMCON26
- 5PMCON25
- 4PMCON24
- 3PMCON23
- 2PMCON22
- 1PMCON21
- 0PMCON20
1 field
| Field | Bits | What it does |
|---|---|---|
| PMCON2 | 7:0 |
EUSART USART
RC1REG
- Address
0x199- Reset
0x00- Access
- read only
- 7RC1REG7
- 6RC1REG6
- 5RC1REG5
- 4RC1REG4
- 3RC1REG3
- 2RC1REG2
- 1RC1REG1
- 0RC1REG0
1 field
| Field | Bits | What it does |
|---|---|---|
| RC1REG | 7:0 |
TX1REG
- Address
0x19A- Reset
0x00- Access
- read/write
- 7TX1REG7
- 6TX1REG6
- 5TX1REG5
- 4TX1REG4
- 3TX1REG3
- 2TX1REG2
- 1TX1REG1
- 0TX1REG0
1 field
| Field | Bits | What it does |
|---|---|---|
| TX1REG | 7:0 |
SP1BRGL
- Address
0x19B- Reset
0x00- Access
- read/write
- 7SP1BRGL7
- 6SP1BRGL6
- 5SP1BRGL5
- 4SP1BRGL4
- 3SP1BRGL3
- 2SP1BRGL2
- 1SP1BRGL1
- 0SP1BRGL0
1 field
| Field | Bits | What it does |
|---|---|---|
| SP1BRGL | 7:0 |
SP1BRGH
- Address
0x19C- Reset
0x00- Access
- read/write
- 7SP1BRGH7
- 6SP1BRGH6
- 5SP1BRGH5
- 4SP1BRGH4
- 3SP1BRGH3
- 2SP1BRGH2
- 1SP1BRGH1
- 0SP1BRGH0
1 field
| Field | Bits | What it does |
|---|---|---|
| SP1BRGH | 7:0 |
RC1STA
- Address
0x19D- Reset
0x00- Access
- read/write
- 7SPEN
- 6RX9
- 5SREN
- 4CREN
- 3ADDEN
- 2FERR
- 1OERR
- 0RX9D
8 fields
| Field | Bits | What it does |
|---|---|---|
| SPEN | 7 | |
| RX9 | 6 | |
| SREN | 5 | |
| CREN | 4 | |
| ADDEN | 3 | |
| FERR | 2 | |
| OERR | 1 | |
| RX9D | 0 |
TX1STA
- Address
0x19E- Reset
0x02- Access
- read/write
- 7CSRC
- 6TX9
- 5TXEN
- 4SYNC
- 3SENDB
- 2BRGH
- 1TRMT
- 0TX9D
8 fields
| Field | Bits | What it does |
|---|---|---|
| CSRC | 7 | |
| TX9 | 6 | |
| TXEN | 5 | |
| SYNC | 4 | |
| SENDB | 3 | |
| BRGH | 2 | |
| TRMT | 1 | |
| TX9D | 0 |
BAUD1CON
- Address
0x19F- Reset
0x40- Access
- read/write
- 7ABDOVF
- 6RCIDL
- 5–
- 4SCKP
- 3BRG16
- 2–
- 1WUE
- 0ABDEN
6 fields
| Field | Bits | What it does |
|---|---|---|
| ABDOVF | 7 | |
| RCIDL | 6 | |
| SCKP | 4 | |
| BRG16 | 3 | |
| WUE | 1 | |
| ABDEN | 0 |
MSSP Master synchronous serial port (SPI, I²C)
SSP1BUF
- Address
0x211- Reset
x (not fixed at power-on)- Access
- read/write
- 7BUF7
- 6BUF6
- 5BUF5
- 4BUF4
- 3BUF3
- 2BUF2
- 1BUF1
- 0BUF0
1 field
| Field | Bits | What it does |
|---|---|---|
| BUF | 7:0 |
SSP1ADD
- Address
0x212- Reset
0x00- Access
- read/write
- 7ADD7
- 6ADD6
- 5ADD5
- 4ADD4
- 3ADD3
- 2ADD2
- 1ADD1
- 0ADD0
1 field
| Field | Bits | What it does |
|---|---|---|
| ADD | 7:0 |
SSP1MSK
- Address
0x213- Reset
0xFF- Access
- read/write
- 7MSK7
- 6MSK6
- 5MSK5
- 4MSK4
- 3MSK3
- 2MSK2
- 1MSK1
- 0MSK0
1 field
| Field | Bits | What it does |
|---|---|---|
| MSK | 7:0 |
SSP1STAT
- Address
0x214- Reset
0x00- Access
- read/write
- 7SMP
- 6CKE
- 5D_nA
- 4P
- 3S
- 2R_nW
- 1UA
- 0BF
8 fields
| Field | Bits | What it does |
|---|---|---|
| SMP | 7 | |
| CKE | 6 | |
| D_nA | 5 | |
| P | 4 | |
| S | 3 | |
| R_nW | 2 | |
| UA | 1 | |
| BF | 0 |
SSP1CON1
- Address
0x215- Reset
0x00- Access
- read/write
- 7WCOL
- 6SSPOV
- 5SSPEN
- 4CKP
- 3SSPM3
- 2SSPM2
- 1SSPM1
- 0SSPM0
5 fields
| Field | Bits | What it does |
|---|---|---|
| WCOL | 7 | |
| SSPOV | 6 | |
| SSPEN | 5 | |
| CKP | 4 | |
| SSPM | 3:0 |
SSP1CON2
- Address
0x216- Reset
0x00- Access
- read/write
- 7GCEN
- 6ACKSTAT
- 5ACKDT
- 4ACKEN
- 3RCEN
- 2PEN
- 1RSEN
- 0SEN
8 fields
| Field | Bits | What it does |
|---|---|---|
| GCEN | 7 | |
| ACKSTAT | 6 | |
| ACKDT | 5 | |
| ACKEN | 4 | |
| RCEN | 3 | |
| PEN | 2 | |
| RSEN | 1 | |
| SEN | 0 |
SSP1CON3
- Address
0x217- Reset
0x00- Access
- read/write
- 7ACKTIM
- 6PCIE
- 5SCIE
- 4BOEN
- 3SDAHT
- 2SBCDE
- 1AHEN
- 0DHEN
8 fields
| Field | Bits | What it does |
|---|---|---|
| ACKTIM | 7 | |
| PCIE | 6 | |
| SCIE | 5 | |
| BOEN | 4 | |
| SDAHT | 3 | |
| SBCDE | 2 | |
| AHEN | 1 | |
| DHEN | 0 |
SSPCLKPPS
- Address
0xE20- Reset
0x13- Access
- read/write
- 7–
- 6–
- 5–
- 4SSPCLKPPS4
- 3SSPCLKPPS3
- 2SSPCLKPPS2
- 1SSPCLKPPS1
- 0SSPCLKPPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| SSPCLKPPS | 4:0 |
SSPDATPPS
- Address
0xE21- Reset
0x14- Access
- read/write
- 7–
- 6–
- 5–
- 4SSPDATPPS4
- 3SSPDATPPS3
- 2SSPDATPPS2
- 1SSPDATPPS1
- 0SSPDATPPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| SSPDATPPS | 4:0 |
SSPSSPPS
- Address
0xE22- Reset
0x05- Access
- read/write
- 7–
- 6–
- 5–
- 4SSPSSPPS4
- 3SSPSSPPS3
- 2SSPSSPPS2
- 1SSPSSPPS1
- 0SSPSSPPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| SSPSSPPS | 4:0 |
CCP1 Capture/compare/PWM 1
CCPR1L
- Address
0x291- Reset
x (not fixed at power-on)- Access
- read/write
- 7CCPR1L7
- 6CCPR1L6
- 5CCPR1L5
- 4CCPR1L4
- 3CCPR1L3
- 2CCPR1L2
- 1CCPR1L1
- 0CCPR1L0
1 field
| Field | Bits | What it does |
|---|---|---|
| CCPR1L | 7:0 |
CCPR1H
- Address
0x292- Reset
x (not fixed at power-on)- Access
- read/write
- 7CCPR1H7
- 6CCPR1H6
- 5CCPR1H5
- 4CCPR1H4
- 3CCPR1H3
- 2CCPR1H2
- 1CCPR1H1
- 0CCPR1H0
1 field
| Field | Bits | What it does |
|---|---|---|
| CCPR1H | 7:0 |
CCP1CON
- Address
0x293- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5DC1B1
- 4DC1B0
- 3CCP1M3
- 2CCP1M2
- 1CCP1M1
- 0CCP1M0
2 fields
| Field | Bits | What it does |
|---|---|---|
| DC1B | 5:4 | |
| CCP1M | 3:0 |
CCP1PPS
- Address
0xE14- Reset
0x12- Access
- read/write
- 7–
- 6–
- 5–
- 4CCP1PPS4
- 3CCP1PPS3
- 2CCP1PPS2
- 1CCP1PPS1
- 0CCP1PPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| CCP1PPS | 4:0 |
CCP2 Capture/compare/PWM 2
CCPR2L
- Address
0x298- Reset
x (not fixed at power-on)- Access
- read/write
- 7CCPR2L7
- 6CCPR2L6
- 5CCPR2L5
- 4CCPR2L4
- 3CCPR2L3
- 2CCPR2L2
- 1CCPR2L1
- 0CCPR2L0
1 field
| Field | Bits | What it does |
|---|---|---|
| CCPR2L | 7:0 |
CCPR2H
- Address
0x299- Reset
x (not fixed at power-on)- Access
- read/write
- 7CCPR2H7
- 6CCPR2H6
- 5CCPR2H5
- 4CCPR2H4
- 3CCPR2H3
- 2CCPR2H2
- 1CCPR2H1
- 0CCPR2H0
1 field
| Field | Bits | What it does |
|---|---|---|
| CCPR2H | 7:0 |
CCP2CON
- Address
0x29A- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5DC2B1
- 4DC2B0
- 3CCP2M3
- 2CCP2M2
- 1CCP2M1
- 0CCP2M0
2 fields
| Field | Bits | What it does |
|---|---|---|
| DC2B | 5:4 | |
| CCP2M | 3:0 |
CCP2PPS
- Address
0xE15- Reset
0x11- Access
- read/write
- 7–
- 6–
- 5–
- 4CCP2PPS4
- 3CCP2PPS3
- 2CCP2PPS2
- 1CCP2PPS1
- 0CCP2PPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| CCP2PPS | 4:0 |
ECCP Enhanced capture/compare/PWM
CCPTMRS
- Address
0x29E- Reset
0x00- Access
- read/write
- 7P4TSEL1
- 6P4TSEL0
- 5P3TSEL1
- 4P3TSEL0
- 3C2TSEL1
- 2C2TSEL0
- 1C1TSEL1
- 0C1TSEL0
4 fields
| Field | Bits | What it does |
|---|---|---|
| P4TSEL | 7:6 | |
| P3TSEL | 5:4 | |
| C2TSEL | 3:2 | |
| C1TSEL | 1:0 |
IOC Interrupt-on-change
IOCAP
- Address
0x391- Reset
0x00- Access
- read/write
- 7IOCAP7
- 6IOCAP6
- 5IOCAP5
- 4IOCAP4
- 3IOCAP3
- 2IOCAP2
- 1IOCAP1
- 0IOCAP0
8 fields
| Field | Bits | What it does |
|---|---|---|
| IOCAP7 | 7 | |
| IOCAP6 | 6 | |
| IOCAP5 | 5 | |
| IOCAP4 | 4 | |
| IOCAP3 | 3 | |
| IOCAP2 | 2 | |
| IOCAP1 | 1 | |
| IOCAP0 | 0 |
IOCAN
- Address
0x392- Reset
0x00- Access
- read/write
- 7IOCAN7
- 6IOCAN6
- 5IOCAN5
- 4IOCAN4
- 3IOCAN3
- 2IOCAN2
- 1IOCAN1
- 0IOCAN0
8 fields
| Field | Bits | What it does |
|---|---|---|
| IOCAN7 | 7 | |
| IOCAN6 | 6 | |
| IOCAN5 | 5 | |
| IOCAN4 | 4 | |
| IOCAN3 | 3 | |
| IOCAN2 | 2 | |
| IOCAN1 | 1 | |
| IOCAN0 | 0 |
IOCAF
- Address
0x393- Reset
0x00- Access
- read/write
- 7IOCAF7
- 6IOCAF6
- 5IOCAF5
- 4IOCAF4
- 3IOCAF3
- 2IOCAF2
- 1IOCAF1
- 0IOCAF0
8 fields
| Field | Bits | What it does |
|---|---|---|
| IOCAF7 | 7 | |
| IOCAF6 | 6 | |
| IOCAF5 | 5 | |
| IOCAF4 | 4 | |
| IOCAF3 | 3 | |
| IOCAF2 | 2 | |
| IOCAF1 | 1 | |
| IOCAF0 | 0 |
IOCBP
- Address
0x394- Reset
0x00- Access
- read/write
- 7IOCBP7
- 6IOCBP6
- 5IOCBP5
- 4IOCBP4
- 3IOCBP3
- 2IOCBP2
- 1IOCBP1
- 0IOCBP0
8 fields
| Field | Bits | What it does |
|---|---|---|
| IOCBP7 | 7 | |
| IOCBP6 | 6 | |
| IOCBP5 | 5 | |
| IOCBP4 | 4 | |
| IOCBP3 | 3 | |
| IOCBP2 | 2 | |
| IOCBP1 | 1 | |
| IOCBP0 | 0 |
IOCBN
- Address
0x395- Reset
0x00- Access
- read/write
- 7IOCBN7
- 6IOCBN6
- 5IOCBN5
- 4IOCBN4
- 3IOCBN3
- 2IOCBN2
- 1IOCBN1
- 0IOCBN0
8 fields
| Field | Bits | What it does |
|---|---|---|
| IOCBN7 | 7 | |
| IOCBN6 | 6 | |
| IOCBN5 | 5 | |
| IOCBN4 | 4 | |
| IOCBN3 | 3 | |
| IOCBN2 | 2 | |
| IOCBN1 | 1 | |
| IOCBN0 | 0 |
IOCBF
- Address
0x396- Reset
0x00- Access
- read/write
- 7IOCBF7
- 6IOCBF6
- 5IOCBF5
- 4IOCBF4
- 3IOCBF3
- 2IOCBF2
- 1IOCBF1
- 0IOCBF0
8 fields
| Field | Bits | What it does |
|---|---|---|
| IOCBF7 | 7 | |
| IOCBF6 | 6 | |
| IOCBF5 | 5 | |
| IOCBF4 | 4 | |
| IOCBF3 | 3 | |
| IOCBF2 | 2 | |
| IOCBF1 | 1 | |
| IOCBF0 | 0 |
IOCCP
- Address
0x397- Reset
0x00- Access
- read/write
- 7IOCCP7
- 6IOCCP6
- 5IOCCP5
- 4IOCCP4
- 3IOCCP3
- 2IOCCP2
- 1IOCCP1
- 0IOCCP0
8 fields
| Field | Bits | What it does |
|---|---|---|
| IOCCP7 | 7 | |
| IOCCP6 | 6 | |
| IOCCP5 | 5 | |
| IOCCP4 | 4 | |
| IOCCP3 | 3 | |
| IOCCP2 | 2 | |
| IOCCP1 | 1 | |
| IOCCP0 | 0 |
IOCCN
- Address
0x398- Reset
0x00- Access
- read/write
- 7IOCCN7
- 6IOCCN6
- 5IOCCN5
- 4IOCCN4
- 3IOCCN3
- 2IOCCN2
- 1IOCCN1
- 0IOCCN0
8 fields
| Field | Bits | What it does |
|---|---|---|
| IOCCN7 | 7 | |
| IOCCN6 | 6 | |
| IOCCN5 | 5 | |
| IOCCN4 | 4 | |
| IOCCN3 | 3 | |
| IOCCN2 | 2 | |
| IOCCN1 | 1 | |
| IOCCN0 | 0 |
IOCCF
- Address
0x399- Reset
0x00- Access
- read/write
- 7IOCCF7
- 6IOCCF6
- 5IOCCF5
- 4IOCCF4
- 3IOCCF3
- 2IOCCF2
- 1IOCCF1
- 0IOCCF0
8 fields
| Field | Bits | What it does |
|---|---|---|
| IOCCF7 | 7 | |
| IOCCF6 | 6 | |
| IOCCF5 | 5 | |
| IOCCF4 | 4 | |
| IOCCF3 | 3 | |
| IOCCF2 | 2 | |
| IOCCF1 | 1 | |
| IOCCF0 | 0 |
IOCEP
- Address
0x39D- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3IOCEP3
- 2–
- 1–
- 0–
1 field
| Field | Bits | What it does |
|---|---|---|
| IOCEP3 | 3 |
IOCEN
- Address
0x39E- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3IOCEN3
- 2–
- 1–
- 0–
1 field
| Field | Bits | What it does |
|---|---|---|
| IOCEN3 | 3 |
IOCEF
- Address
0x39F- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3IOCEF3
- 2–
- 1–
- 0–
1 field
| Field | Bits | What it does |
|---|---|---|
| IOCEF3 | 3 |
TMR4 Timer4
TMR48-bit period timer
- Address
0x415- Reset
0x00- Access
- read/write
- 7TMR47
- 6TMR46
- 5TMR45
- 4TMR44
- 3TMR43
- 2TMR42
- 1TMR41
- 0TMR40
1 field
| Field | Bits | What it does |
|---|---|---|
| TMR4 | 7:0 |
PR4
- Address
0x416- Reset
0xFF- Access
- read/write
- 7PR47
- 6PR46
- 5PR45
- 4PR44
- 3PR43
- 2PR42
- 1PR41
- 0PR40
1 field
| Field | Bits | What it does |
|---|---|---|
| PR4 | 7:0 |
T4CON
- Address
0x417- Reset
0x00- Access
- read/write
- 7–
- 6T4OUTPS3
- 5T4OUTPS2
- 4T4OUTPS1
- 3T4OUTPS0
- 2TMR4ON
- 1T4CKPS1
- 0T4CKPS0
3 fields
| Field | Bits | What it does |
|---|---|---|
| T4OUTPS | 6:3 | |
| TMR4ON | 2 | |
| T4CKPS | 1:0 |
TMR6 Timer6
TMR68-bit period timer
- Address
0x41C- Reset
0x00- Access
- read/write
- 7TMR67
- 6TMR66
- 5TMR65
- 4TMR64
- 3TMR63
- 2TMR62
- 1TMR61
- 0TMR60
1 field
| Field | Bits | What it does |
|---|---|---|
| TMR6 | 7:0 |
PR6
- Address
0x41D- Reset
0xFF- Access
- read/write
- 7PR67
- 6PR66
- 5PR65
- 4PR64
- 3PR63
- 2PR62
- 1PR61
- 0PR60
1 field
| Field | Bits | What it does |
|---|---|---|
| PR6 | 7:0 |
T6CON
- Address
0x41E- Reset
0x00- Access
- read/write
- 7–
- 6T6OUTPS3
- 5T6OUTPS2
- 4T6OUTPS1
- 3T6OUTPS0
- 2TMR6ON
- 1T6CKPS1
- 0T6CKPS0
3 fields
| Field | Bits | What it does |
|---|---|---|
| T6OUTPS | 6:3 | |
| TMR6ON | 2 | |
| T6CKPS | 1:0 |
NCO1 Numerically controlled oscillator 1
NCO1ACCL
- Address
0x498- Reset
0x00- Access
- read/write
- 7NCO1ACC7
- 6NCO1ACC6
- 5NCO1ACC5
- 4NCO1ACC4
- 3NCO1ACC3
- 2NCO1ACC2
- 1NCO1ACC1
- 0NCO1ACC0
1 field
| Field | Bits | What it does |
|---|---|---|
| NCO1ACC | 7:0 |
NCO1ACCH
- Address
0x499- Reset
0x00- Access
- read/write
- 7NCO1ACC7
- 6NCO1ACC6
- 5NCO1ACC5
- 4NCO1ACC4
- 3NCO1ACC3
- 2NCO1ACC2
- 1NCO1ACC1
- 0NCO1ACC0
1 field
| Field | Bits | What it does |
|---|---|---|
| NCO1ACC | 7:0 |
NCO1ACCU
- Address
0x49A- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3NCO1ACC3
- 2NCO1ACC2
- 1NCO1ACC1
- 0NCO1ACC0
1 field
| Field | Bits | What it does |
|---|---|---|
| NCO1ACC | 3:0 |
NCO1INCL
- Address
0x49B- Reset
0x01- Access
- read/write
- 7NCO1INC7
- 6NCO1INC6
- 5NCO1INC5
- 4NCO1INC4
- 3NCO1INC3
- 2NCO1INC2
- 1NCO1INC1
- 0NCO1INC0
1 field
| Field | Bits | What it does |
|---|---|---|
| NCO1INC | 7:0 |
NCO1INCH
- Address
0x49C- Reset
0x00- Access
- read/write
- 7NCO1INC7
- 6NCO1INC6
- 5NCO1INC5
- 4NCO1INC4
- 3NCO1INC3
- 2NCO1INC2
- 1NCO1INC1
- 0NCO1INC0
1 field
| Field | Bits | What it does |
|---|---|---|
| NCO1INC | 7:0 |
NCO1INCU
- Address
0x49D- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3NCO1INC3
- 2NCO1INC2
- 1NCO1INC1
- 0NCO1INC0
1 field
| Field | Bits | What it does |
|---|---|---|
| NCO1INC | 3:0 |
NCO1CONConfigurable logic cell control
- Address
0x49E- Reset
0x00- Access
- read/write
- 7N1EN
- 6–
- 5N1OUT
- 4N1POL
- 3–
- 2–
- 1–
- 0N1PFM
4 fields
| Field | Bits | What it does |
|---|---|---|
| N1EN | 7 | |
| N1OUT | 5 | |
| N1POL | 4 | |
| N1PFM | 0 |
NCO1CLK
- Address
0x49F- Reset
0x00- Access
- read/write
- 7N1PWS2
- 6N1PWS1
- 5N1PWS0
- 4–
- 3–
- 2–
- 1N1CKS1
- 0N1CKS0
2 fields
| Field | Bits | What it does |
|---|---|---|
| N1PWS | 7:5 | |
| N1CKS | 1:0 |
OPAMP1 Operational amplifier 1
OPA1CON
- Address
0x511- Reset
0x00- Access
- read/write
- 7OPA1EN
- 6OPA1SP
- 5–
- 4OPA1UG
- 3–
- 2–
- 1OPA1CH1
- 0OPA1CH0
4 fields
| Field | Bits | What it does |
|---|---|---|
| OPA1EN | 7 | |
| OPA1SP | 6 | |
| OPA1UG | 4 | |
| OPA1CH | 1:0 |
OPAMP2 Operational amplifier 2
OPA2CON
- Address
0x515- Reset
0x00- Access
- read/write
- 7OPA2EN
- 6OPA2SP
- 5–
- 4OPA2UG
- 3–
- 2–
- 1OPA2CH1
- 0OPA2CH0
4 fields
| Field | Bits | What it does |
|---|---|---|
| OPA2EN | 7 | |
| OPA2SP | 6 | |
| OPA2UG | 4 | |
| OPA2CH | 1:0 |
ECCP3 Enhanced capture/compare/PWM 3
PWM3DCL
- Address
0x617- Reset
x (not fixed at power-on)- Access
- read/write
- 7PWM3DCL1
- 6PWM3DCL0
- 5–
- 4–
- 3–
- 2–
- 1–
- 0–
1 field
| Field | Bits | What it does |
|---|---|---|
| PWM3DCL | 7:6 |
PWM3DCH
- Address
0x618- Reset
x (not fixed at power-on)- Access
- read/write
- 7PWM3DCH7
- 6PWM3DCH6
- 5PWM3DCH5
- 4PWM3DCH4
- 3PWM3DCH3
- 2PWM3DCH2
- 1PWM3DCH1
- 0PWM3DCH0
1 field
| Field | Bits | What it does |
|---|---|---|
| PWM3DCH | 7:0 |
PWM3CONConfigurable logic cell control
- Address
0x619- Reset
x (not fixed at power-on)- Access
- read/write
- 7PWM3EN
- 6–
- 5PWM3OUT
- 4PWM3POL
- 3–
- 2–
- 1–
- 0–
3 fields
| Field | Bits | What it does |
|---|---|---|
| PWM3EN | 7 | |
| PWM3OUT | 5 | |
| PWM3POL | 4 |
ECCP4 Enhanced capture/compare/PWM 4
PWM4DCL
- Address
0x61A- Reset
x (not fixed at power-on)- Access
- read/write
- 7PWM4DCL1
- 6PWM4DCL0
- 5–
- 4–
- 3–
- 2–
- 1–
- 0–
1 field
| Field | Bits | What it does |
|---|---|---|
| PWM4DCL | 7:6 |
PWM4DCH
- Address
0x61B- Reset
x (not fixed at power-on)- Access
- read/write
- 7PWM4DCH7
- 6PWM4DCH6
- 5PWM4DCH5
- 4PWM4DCH4
- 3PWM4DCH3
- 2PWM4DCH2
- 1PWM4DCH1
- 0PWM4DCH0
1 field
| Field | Bits | What it does |
|---|---|---|
| PWM4DCH | 7:0 |
PWM4CONConfigurable logic cell control
- Address
0x61C- Reset
x (not fixed at power-on)- Access
- read/write
- 7PWM4EN
- 6–
- 5PWM4OUT
- 4PWM4POL
- 3–
- 2–
- 1–
- 0–
3 fields
| Field | Bits | What it does |
|---|---|---|
| PWM4EN | 7 | |
| PWM4OUT | 5 | |
| PWM4POL | 4 |
CWG1 Complementary waveform generator 1
COG1PHR
- Address
0x691- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5G1PHR5
- 4G1PHR4
- 3G1PHR3
- 2G1PHR2
- 1G1PHR1
- 0G1PHR0
1 field
| Field | Bits | What it does |
|---|---|---|
| G1PHR | 5:0 |
COG1PHF
- Address
0x692- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5G1PHF5
- 4G1PHF4
- 3G1PHF3
- 2G1PHF2
- 1G1PHF1
- 0G1PHF0
1 field
| Field | Bits | What it does |
|---|---|---|
| G1PHF | 5:0 |
COG1BLKR
- Address
0x693- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5G1BLKR5
- 4G1BLKR4
- 3G1BLKR3
- 2G1BLKR2
- 1G1BLKR1
- 0G1BLKR0
1 field
| Field | Bits | What it does |
|---|---|---|
| G1BLKR | 5:0 |
COG1BLKF
- Address
0x694- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5G1BLKF5
- 4G1BLKF4
- 3G1BLKF3
- 2G1BLKF2
- 1G1BLKF1
- 0G1BLKF0
1 field
| Field | Bits | What it does |
|---|---|---|
| G1BLKF | 5:0 |
COG1DBR
- Address
0x695- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5G1DBR5
- 4G1DBR4
- 3G1DBR3
- 2G1DBR2
- 1G1DBR1
- 0G1DBR0
1 field
| Field | Bits | What it does |
|---|---|---|
| G1DBR | 5:0 |
COG1DBF
- Address
0x696- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5G1DBF5
- 4G1DBF4
- 3G1DBF3
- 2G1DBF2
- 1G1DBF1
- 0G1DBF0
1 field
| Field | Bits | What it does |
|---|---|---|
| G1DBF | 5:0 |
COG1CON0
- Address
0x697- Reset
0x00- Access
- read/write
- 7G1EN
- 6G1LD
- 5–
- 4G1CS1
- 3G1CS0
- 2G1MD2
- 1G1MD1
- 0G1MD0
4 fields
| Field | Bits | What it does |
|---|---|---|
| G1EN | 7 | |
| G1LD | 6 | |
| G1CS | 4:3 | |
| G1MD | 2:0 |
COG1CON1
- Address
0x698- Reset
0x00- Access
- read/write
- 7G1RDBS
- 6G1FDBS
- 5–
- 4–
- 3G1POLD
- 2G1POLC
- 1G1POLB
- 0G1POLA
6 fields
| Field | Bits | What it does |
|---|---|---|
| G1RDBS | 7 | |
| G1FDBS | 6 | |
| G1POLD | 3 | |
| G1POLC | 2 | |
| G1POLB | 1 | |
| G1POLA | 0 |
COG1RIS
- Address
0x699- Reset
0x00- Access
- read/write
- 7G1RIS7
- 6G1RIS6
- 5G1RIS5
- 4G1RIS4
- 3G1RIS3
- 2G1RIS2
- 1G1RIS1
- 0G1RIS0
8 fields
| Field | Bits | What it does |
|---|---|---|
| G1RIS7 | 7 | |
| G1RIS6 | 6 | |
| G1RIS5 | 5 | |
| G1RIS4 | 4 | |
| G1RIS3 | 3 | |
| G1RIS2 | 2 | |
| G1RIS1 | 1 | |
| G1RIS0 | 0 |
COG1RSIM
- Address
0x69A- Reset
0x00- Access
- read/write
- 7G1RSIM7
- 6G1RSIM6
- 5G1RSIM5
- 4G1RSIM4
- 3G1RSIM3
- 2G1RSIM2
- 1G1RSIM1
- 0G1RSIM0
8 fields
| Field | Bits | What it does |
|---|---|---|
| G1RSIM7 | 7 | |
| G1RSIM6 | 6 | |
| G1RSIM5 | 5 | |
| G1RSIM4 | 4 | |
| G1RSIM3 | 3 | |
| G1RSIM2 | 2 | |
| G1RSIM1 | 1 | |
| G1RSIM0 | 0 |
COG1FIS
- Address
0x69B- Reset
0x00- Access
- read/write
- 7G1FIS7
- 6G1FIS6
- 5G1FIS5
- 4G1FIS4
- 3G1FIS3
- 2G1FIS2
- 1G1FIS1
- 0G1FIS0
8 fields
| Field | Bits | What it does |
|---|---|---|
| G1FIS7 | 7 | |
| G1FIS6 | 6 | |
| G1FIS5 | 5 | |
| G1FIS4 | 4 | |
| G1FIS3 | 3 | |
| G1FIS2 | 2 | |
| G1FIS1 | 1 | |
| G1FIS0 | 0 |
COG1FSIM
- Address
0x69C- Reset
0x00- Access
- read/write
- 7G1FSIM7
- 6G1FSIM6
- 5G1FSIM5
- 4G1FSIM4
- 3G1FSIM3
- 2G1FSIM2
- 1G1FSIM1
- 0G1FSIM0
8 fields
| Field | Bits | What it does |
|---|---|---|
| G1FSIM7 | 7 | |
| G1FSIM6 | 6 | |
| G1FSIM5 | 5 | |
| G1FSIM4 | 4 | |
| G1FSIM3 | 3 | |
| G1FSIM2 | 2 | |
| G1FSIM1 | 1 | |
| G1FSIM0 | 0 |
COG1ASD0
- Address
0x69D- Reset
0x14- Access
- read/write
- 7G1ASE
- 6G1ARSEN
- 5G1ASDBD1
- 4G1ASDBD0
- 3G1ASDAC1
- 2G1ASDAC0
- 1–
- 0–
4 fields
| Field | Bits | What it does |
|---|---|---|
| G1ASE | 7 | |
| G1ARSEN | 6 | |
| G1ASDBD | 5:4 | |
| G1ASDAC | 3:2 |
COG1ASD1
- Address
0x69E- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3G1AS3E
- 2G1AS2E
- 1G1AS1E
- 0G1AS0E
4 fields
| Field | Bits | What it does |
|---|---|---|
| G1AS3E | 3 | |
| G1AS2E | 2 | |
| G1AS1E | 1 | |
| G1AS0E | 0 |
COG1STR
- Address
0x69F- Reset
0x00- Access
- read/write
- 7G1SDATD
- 6G1SDATC
- 5G1SDATB
- 4G1SDATA
- 3G1STRD
- 2G1STRC
- 1G1STRB
- 0G1STRA
8 fields
| Field | Bits | What it does |
|---|---|---|
| G1SDATD | 7 | |
| G1SDATC | 6 | |
| G1SDATB | 5 | |
| G1SDATA | 4 | |
| G1STRD | 3 | |
| G1STRC | 2 | |
| G1STRB | 1 | |
| G1STRA | 0 |
PPS Peripheral pin select
PPSLOCK
- Address
0xE0F- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2–
- 1–
- 0PPSLOCKED
1 field
| Field | Bits | What it does |
|---|---|---|
| PPSLOCKED | 0 |
INTPPS
- Address
0xE10- Reset
0x08- Access
- read/write
- 7–
- 6–
- 5–
- 4INTPPS4
- 3INTPPS3
- 2INTPPS2
- 1INTPPS1
- 0INTPPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| INTPPS | 4:0 |
T0CKIPPS
- Address
0xE11- Reset
0x04- Access
- read/write
- 7–
- 6–
- 5–
- 4T0CKIPPS4
- 3T0CKIPPS3
- 2T0CKIPPS2
- 1T0CKIPPS1
- 0T0CKIPPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| T0CKIPPS | 4:0 |
T1CKIPPS
- Address
0xE12- Reset
0x10- Access
- read/write
- 7–
- 6–
- 5–
- 4T1CKIPPS4
- 3T1CKIPPS3
- 2T1CKIPPS2
- 1T1CKIPPS1
- 0T1CKIPPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| T1CKIPPS | 4:0 |
T1GPPS
- Address
0xE13- Reset
0x0D- Access
- read/write
- 7–
- 6–
- 5–
- 4T1GPPS4
- 3T1GPPS3
- 2T1GPPS2
- 1T1GPPS1
- 0T1GPPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| T1GPPS | 4:0 |
COGINPPS
- Address
0xE17- Reset
0x08- Access
- read/write
- 7–
- 6–
- 5–
- 4COGINPPS4
- 3COGINPPS3
- 2COGINPPS2
- 1COGINPPS1
- 0COGINPPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| COGINPPS | 4:0 |
RXPPS
- Address
0xE24- Reset
0x17- Access
- read/write
- 7–
- 6–
- 5–
- 4RXPPS4
- 3RXPPS3
- 2RXPPS2
- 1RXPPS1
- 0RXPPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| RXPPS | 4:0 |
CKPPS
- Address
0xE25- Reset
0x16- Access
- read/write
- 7–
- 6–
- 5–
- 4CKPPS4
- 3CKPPS3
- 2CKPPS2
- 1CKPPS1
- 0CKPPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| CKPPS | 4:0 |
CLCIN0PPS
- Address
0xE28- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4CLCIN0PPS4
- 3CLCIN0PPS3
- 2CLCIN0PPS2
- 1CLCIN0PPS1
- 0CLCIN0PPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| CLCIN0PPS | 4:0 |
CLCIN1PPS
- Address
0xE29- Reset
0x01- Access
- read/write
- 7–
- 6–
- 5–
- 4CLCIN1PPS4
- 3CLCIN1PPS3
- 2CLCIN1PPS2
- 1CLCIN1PPS1
- 0CLCIN1PPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| CLCIN1PPS | 4:0 |
CLCIN2PPS
- Address
0xE2A- Reset
0x0E- Access
- read/write
- 7–
- 6–
- 5–
- 4CLCIN2PPS4
- 3CLCIN2PPS3
- 2CLCIN2PPS2
- 1CLCIN2PPS1
- 0CLCIN2PPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| CLCIN2PPS | 4:0 |
CLCIN3PPS
- Address
0xE2B- Reset
0x0F- Access
- read/write
- 7–
- 6–
- 5–
- 4CLCIN3PPS4
- 3CLCIN3PPS3
- 2CLCIN3PPS2
- 1CLCIN3PPS1
- 0CLCIN3PPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| CLCIN3PPS | 4:0 |
RA0PPS
- Address
0xE90- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4RA0PPS4
- 3RA0PPS3
- 2RA0PPS2
- 1RA0PPS1
- 0RA0PPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| RA0PPS | 4:0 |
RA1PPS
- Address
0xE91- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4RA1PPS4
- 3RA1PPS3
- 2RA1PPS2
- 1RA1PPS1
- 0RA1PPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| RA1PPS | 4:0 |
RA2PPS
- Address
0xE92- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4RA2PPS4
- 3RA2PPS3
- 2RA2PPS2
- 1RA2PPS1
- 0RA2PPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| RA2PPS | 4:0 |
RA3PPS
- Address
0xE93- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4RA3PPS4
- 3RA3PPS3
- 2RA3PPS2
- 1RA3PPS1
- 0RA3PPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| RA3PPS | 4:0 |
RA4PPS
- Address
0xE94- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4RA4PPS4
- 3RA4PPS3
- 2RA4PPS2
- 1RA4PPS1
- 0RA4PPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| RA4PPS | 4:0 |
RA5PPS
- Address
0xE95- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4RA5PPS4
- 3RA5PPS3
- 2RA5PPS2
- 1RA5PPS1
- 0RA5PPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| RA5PPS | 4:0 |
RA6PPS
- Address
0xE96- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4RA6PPS4
- 3RA6PPS3
- 2RA6PPS2
- 1RA6PPS1
- 0RA6PPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| RA6PPS | 4:0 |
RA7PPS
- Address
0xE97- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4RA7PPS4
- 3RA7PPS3
- 2RA7PPS2
- 1RA7PPS1
- 0RA7PPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| RA7PPS | 4:0 |
RB0PPS
- Address
0xE98- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4RB0PPS4
- 3RB0PPS3
- 2RB0PPS2
- 1RB0PPS1
- 0RB0PPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| RB0PPS | 4:0 |
RB1PPS
- Address
0xE99- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4RB1PPS4
- 3RB1PPS3
- 2RB1PPS2
- 1RB1PPS1
- 0RB1PPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| RB1PPS | 4:0 |
RB2PPS
- Address
0xE9A- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4RB2PPS4
- 3RB2PPS3
- 2RB2PPS2
- 1RB2PPS1
- 0RB2PPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| RB2PPS | 4:0 |
RB3PPS
- Address
0xE9B- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4RB3PPS4
- 3RB3PPS3
- 2RB3PPS2
- 1RB3PPS1
- 0RB3PPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| RB3PPS | 4:0 |
RB4PPS
- Address
0xE9C- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4RB4PPS4
- 3RB4PPS3
- 2RB4PPS2
- 1RB4PPS1
- 0RB4PPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| RB4PPS | 4:0 |
RB5PPS
- Address
0xE9D- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4RB5PPS4
- 3RB5PPS3
- 2RB5PPS2
- 1RB5PPS1
- 0RB5PPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| RB5PPS | 4:0 |
RB6PPS
- Address
0xE9E- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4RB6PPS4
- 3RB6PPS3
- 2RB6PPS2
- 1RB6PPS1
- 0RB6PPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| RB6PPS | 4:0 |
RB7PPS
- Address
0xE9F- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4RB7PPS4
- 3RB7PPS3
- 2RB7PPS2
- 1RB7PPS1
- 0RB7PPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| RB7PPS | 4:0 |
RC0PPS
- Address
0xEA0- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4RC0PPS4
- 3RC0PPS3
- 2RC0PPS2
- 1RC0PPS1
- 0RC0PPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| RC0PPS | 4:0 |
RC1PPS
- Address
0xEA1- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4RC1PPS4
- 3RC1PPS3
- 2RC1PPS2
- 1RC1PPS1
- 0RC1PPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| RC1PPS | 4:0 |
RC2PPS
- Address
0xEA2- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4RC2PPS4
- 3RC2PPS3
- 2RC2PPS2
- 1RC2PPS1
- 0RC2PPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| RC2PPS | 4:0 |
RC3PPS
- Address
0xEA3- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4RC3PPS4
- 3RC3PPS3
- 2RC3PPS2
- 1RC3PPS1
- 0RC3PPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| RC3PPS | 4:0 |
RC4PPS
- Address
0xEA4- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4RC4PPS4
- 3RC4PPS3
- 2RC4PPS2
- 1RC4PPS1
- 0RC4PPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| RC4PPS | 4:0 |
RC5PPS
- Address
0xEA5- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4RC5PPS4
- 3RC5PPS3
- 2RC5PPS2
- 1RC5PPS1
- 0RC5PPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| RC5PPS | 4:0 |
RC6PPS
- Address
0xEA6- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4RC6PPS4
- 3RC6PPS3
- 2RC6PPS2
- 1RC6PPS1
- 0RC6PPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| RC6PPS | 4:0 |
RC7PPS
- Address
0xEA7- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4RC7PPS4
- 3RC7PPS3
- 2RC7PPS2
- 1RC7PPS1
- 0RC7PPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| RC7PPS | 4:0 |
CLC Configurable logic cell
CLCDATA
- Address
0xF0F- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3MLC4OUT
- 2MLC3OUT
- 1MLC2OUT
- 0MLC1OUT
4 fields
| Field | Bits | What it does |
|---|---|---|
| MLC4OUT | 3 | |
| MLC3OUT | 2 | |
| MLC2OUT | 1 | |
| MLC1OUT | 0 |
CLC1CONConfigurable logic cell control
- Address
0xF10- Reset
0x00- Access
- read/write
- 7LC1EN
- 6–
- 5LC1OUT
- 4LC1INTP
- 3LC1INTN
- 2LC1MODE2
- 1LC1MODE1
- 0LC1MODE0
5 fields
| Field | Bits | What it does |
|---|---|---|
| LC1EN | 7 | |
| LC1OUT | 5 | |
| LC1INTP | 4 | |
| LC1INTN | 3 | |
| LC1MODE | 2:0 |
CLC1POLPolarity control
- Address
0xF11- Reset
x (not fixed at power-on)- Access
- read/write
- 7LC1POL
- 6–
- 5–
- 4–
- 3LC1G4POL
- 2LC1G3POL
- 1LC1G2POL
- 0LC1G1POL
5 fields
| Field | Bits | What it does |
|---|---|---|
| LC1POL | 7 | |
| LC1G4POL | 3 | |
| LC1G3POL | 2 | |
| LC1G2POL | 1 | |
| LC1G1POL | 0 |
CLC1SEL0Input select register 1
- Address
0xF12- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5–
- 4LC1D1S4
- 3LC1D1S3
- 2LC1D1S2
- 1LC1D1S1
- 0LC1D1S0
1 field
| Field | Bits | What it does |
|---|---|---|
| LC1D1S | 4:0 |
CLC1SEL1Input select register 1
- Address
0xF13- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5–
- 4LC1D2S4
- 3LC1D2S3
- 2LC1D2S2
- 1LC1D2S1
- 0LC1D2S0
1 field
| Field | Bits | What it does |
|---|---|---|
| LC1D2S | 4:0 |
CLC1SEL2Input select register 2
- Address
0xF14- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5–
- 4LC1D3S4
- 3LC1D3S3
- 2LC1D3S2
- 1LC1D3S1
- 0LC1D3S0
1 field
| Field | Bits | What it does |
|---|---|---|
| LC1D3S | 4:0 |
CLC1SEL3Input select register 3
- Address
0xF15- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5–
- 4LC1D4S4
- 3LC1D4S3
- 2LC1D4S2
- 1LC1D4S1
- 0LC1D4S0
1 field
| Field | Bits | What it does |
|---|---|---|
| LC1D4S | 4:0 |
CLC1GLS0Gate logic select register 0
- Address
0xF16- Reset
x (not fixed at power-on)- Access
- read/write
- 7LC1G1D4T
- 6LC1G1D4N
- 5LC1G1D3T
- 4LC1G1D3N
- 3LC1G1D2T
- 2LC1G1D2N
- 1LC1G1D1T
- 0LC1G1D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| LC1G1D4T | 7 | |
| LC1G1D4N | 6 | |
| LC1G1D3T | 5 | |
| LC1G1D3N | 4 | |
| LC1G1D2T | 3 | |
| LC1G1D2N | 2 | |
| LC1G1D1T | 1 | |
| LC1G1D1N | 0 |
CLC1GLS1Gate logic select register 1
- Address
0xF17- Reset
x (not fixed at power-on)- Access
- read/write
- 7LC1G2D4T
- 6LC1G2D4N
- 5LC1G2D3T
- 4LC1G2D3N
- 3LC1G2D2T
- 2LC1G2D2N
- 1LC1G2D1T
- 0LC1G2D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| LC1G2D4T | 7 | |
| LC1G2D4N | 6 | |
| LC1G2D3T | 5 | |
| LC1G2D3N | 4 | |
| LC1G2D2T | 3 | |
| LC1G2D2N | 2 | |
| LC1G2D1T | 1 | |
| LC1G2D1N | 0 |
CLC1GLS2Gate logic select register 2
- Address
0xF18- Reset
x (not fixed at power-on)- Access
- read/write
- 7LC1G3D4T
- 6LC1G3D4N
- 5LC1G3D3T
- 4LC1G3D3N
- 3LC1G3D2T
- 2LC1G3D2N
- 1LC1G3D1T
- 0LC1G3D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| LC1G3D4T | 7 | |
| LC1G3D4N | 6 | |
| LC1G3D3T | 5 | |
| LC1G3D3N | 4 | |
| LC1G3D2T | 3 | |
| LC1G3D2N | 2 | |
| LC1G3D1T | 1 | |
| LC1G3D1N | 0 |
CLC1GLS3Gate logic select register 3
- Address
0xF19- Reset
x (not fixed at power-on)- Access
- read/write
- 7LC1G4D4T
- 6LC1G4D4N
- 5LC1G4D3T
- 4LC1G4D3N
- 3LC1G4D2T
- 2LC1G4D2N
- 1LC1G4D1T
- 0LC1G4D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| LC1G4D4T | 7 | |
| LC1G4D4N | 6 | |
| LC1G4D3T | 5 | |
| LC1G4D3N | 4 | |
| LC1G4D2T | 3 | |
| LC1G4D2N | 2 | |
| LC1G4D1T | 1 | |
| LC1G4D1N | 0 |
CLC2CONConfigurable logic cell control
- Address
0xF1A- Reset
0x00- Access
- read/write
- 7LC2EN
- 6–
- 5LC2OUT
- 4LC2INTP
- 3LC2INTN
- 2LC2MODE2
- 1LC2MODE1
- 0LC2MODE0
5 fields
| Field | Bits | What it does |
|---|---|---|
| LC2EN | 7 | |
| LC2OUT | 5 | |
| LC2INTP | 4 | |
| LC2INTN | 3 | |
| LC2MODE | 2:0 |
CLC2POLPolarity control
- Address
0xF1B- Reset
x (not fixed at power-on)- Access
- read/write
- 7LC2POL
- 6–
- 5–
- 4–
- 3LC2G4POL
- 2LC2G3POL
- 1LC2G2POL
- 0LC2G1POL
5 fields
| Field | Bits | What it does |
|---|---|---|
| LC2POL | 7 | |
| LC2G4POL | 3 | |
| LC2G3POL | 2 | |
| LC2G2POL | 1 | |
| LC2G1POL | 0 |
CLC2SEL0Input select register 1
- Address
0xF1C- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5–
- 4LC2D1S4
- 3LC2D1S3
- 2LC2D1S2
- 1LC2D1S1
- 0LC2D1S0
1 field
| Field | Bits | What it does |
|---|---|---|
| LC2D1S | 4:0 |
CLC2SEL1Input select register 1
- Address
0xF1D- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5–
- 4LC2D2S4
- 3LC2D2S3
- 2LC2D2S2
- 1LC2D2S1
- 0LC2D2S0
1 field
| Field | Bits | What it does |
|---|---|---|
| LC2D2S | 4:0 |
CLC2SEL2Input select register 2
- Address
0xF1E- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5–
- 4LC2D3S4
- 3LC2D3S3
- 2LC2D3S2
- 1LC2D3S1
- 0LC2D3S0
1 field
| Field | Bits | What it does |
|---|---|---|
| LC2D3S | 4:0 |
CLC2SEL3Input select register 3
- Address
0xF1F- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5–
- 4LC2D4S4
- 3LC2D4S3
- 2LC2D4S2
- 1LC2D4S1
- 0LC2D4S0
1 field
| Field | Bits | What it does |
|---|---|---|
| LC2D4S | 4:0 |
CLC2GLS0Gate logic select register 0
- Address
0xF20- Reset
x (not fixed at power-on)- Access
- read/write
- 7LC2G1D4T
- 6LC2G1D4N
- 5LC2G1D3T
- 4LC2G1D3N
- 3LC2G1D2T
- 2LC2G1D2N
- 1LC2G1D1T
- 0LC2G1D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| LC2G1D4T | 7 | |
| LC2G1D4N | 6 | |
| LC2G1D3T | 5 | |
| LC2G1D3N | 4 | |
| LC2G1D2T | 3 | |
| LC2G1D2N | 2 | |
| LC2G1D1T | 1 | |
| LC2G1D1N | 0 |
CLC2GLS1Gate logic select register 1
- Address
0xF21- Reset
x (not fixed at power-on)- Access
- read/write
- 7LC2G2D4T
- 6LC2G2D4N
- 5LC2G2D3T
- 4LC2G2D3N
- 3LC2G2D2T
- 2LC2G2D2N
- 1LC2G2D1T
- 0LC2G2D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| LC2G2D4T | 7 | |
| LC2G2D4N | 6 | |
| LC2G2D3T | 5 | |
| LC2G2D3N | 4 | |
| LC2G2D2T | 3 | |
| LC2G2D2N | 2 | |
| LC2G2D1T | 1 | |
| LC2G2D1N | 0 |
CLC2GLS2Gate logic select register 2
- Address
0xF22- Reset
x (not fixed at power-on)- Access
- read/write
- 7LC2G3D4T
- 6LC2G3D4N
- 5LC2G3D3T
- 4LC2G3D3N
- 3LC2G3D2T
- 2LC2G3D2N
- 1LC2G3D1T
- 0LC2G3D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| LC2G3D4T | 7 | |
| LC2G3D4N | 6 | |
| LC2G3D3T | 5 | |
| LC2G3D3N | 4 | |
| LC2G3D2T | 3 | |
| LC2G3D2N | 2 | |
| LC2G3D1T | 1 | |
| LC2G3D1N | 0 |
CLC2GLS3Gate logic select register 3
- Address
0xF23- Reset
x (not fixed at power-on)- Access
- read/write
- 7LC2G4D4T
- 6LC2G4D4N
- 5LC2G4D3T
- 4LC2G4D3N
- 3LC2G4D2T
- 2LC2G4D2N
- 1LC2G4D1T
- 0LC2G4D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| LC2G4D4T | 7 | |
| LC2G4D4N | 6 | |
| LC2G4D3T | 5 | |
| LC2G4D3N | 4 | |
| LC2G4D2T | 3 | |
| LC2G4D2N | 2 | |
| LC2G4D1T | 1 | |
| LC2G4D1N | 0 |
CLC3CONConfigurable logic cell control
- Address
0xF24- Reset
0x00- Access
- read/write
- 7LC3EN
- 6–
- 5LC3OUT
- 4LC3INTP
- 3LC3INTN
- 2LC3MODE2
- 1LC3MODE1
- 0LC3MODE0
5 fields
| Field | Bits | What it does |
|---|---|---|
| LC3EN | 7 | |
| LC3OUT | 5 | |
| LC3INTP | 4 | |
| LC3INTN | 3 | |
| LC3MODE | 2:0 |
CLC3POLPolarity control
- Address
0xF25- Reset
x (not fixed at power-on)- Access
- read/write
- 7LC3POL
- 6–
- 5–
- 4–
- 3LC3G4POL
- 2LC3G3POL
- 1LC3G2POL
- 0LC3G1POL
5 fields
| Field | Bits | What it does |
|---|---|---|
| LC3POL | 7 | |
| LC3G4POL | 3 | |
| LC3G3POL | 2 | |
| LC3G2POL | 1 | |
| LC3G1POL | 0 |
CLC3SEL0Input select register 1
- Address
0xF26- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5–
- 4LC3D1S4
- 3LC3D1S3
- 2LC3D1S2
- 1LC3D1S1
- 0LC3D1S0
1 field
| Field | Bits | What it does |
|---|---|---|
| LC3D1S | 4:0 |
CLC3SEL1Input select register 1
- Address
0xF27- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5–
- 4LC3D2S4
- 3LC3D2S3
- 2LC3D2S2
- 1LC3D2S1
- 0LC3D2S0
1 field
| Field | Bits | What it does |
|---|---|---|
| LC3D2S | 4:0 |
CLC3SEL2Input select register 2
- Address
0xF28- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5–
- 4LC3D3S4
- 3LC3D3S3
- 2LC3D3S2
- 1LC3D3S1
- 0LC3D3S0
1 field
| Field | Bits | What it does |
|---|---|---|
| LC3D3S | 4:0 |
CLC3SEL3Input select register 3
- Address
0xF29- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5–
- 4LC3D4S4
- 3LC3D4S3
- 2LC3D4S2
- 1LC3D4S1
- 0LC3D4S0
1 field
| Field | Bits | What it does |
|---|---|---|
| LC3D4S | 4:0 |
CLC3GLS0Gate logic select register 0
- Address
0xF2A- Reset
x (not fixed at power-on)- Access
- read/write
- 7LC3G1D4T
- 6LC3G1D4N
- 5LC3G1D3T
- 4LC3G1D3N
- 3LC3G1D2T
- 2LC3G1D2N
- 1LC3G1D1T
- 0LC3G1D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| LC3G1D4T | 7 | |
| LC3G1D4N | 6 | |
| LC3G1D3T | 5 | |
| LC3G1D3N | 4 | |
| LC3G1D2T | 3 | |
| LC3G1D2N | 2 | |
| LC3G1D1T | 1 | |
| LC3G1D1N | 0 |
CLC3GLS1Gate logic select register 1
- Address
0xF2B- Reset
x (not fixed at power-on)- Access
- read/write
- 7LC3G2D4T
- 6LC3G2D4N
- 5LC3G2D3T
- 4LC3G2D3N
- 3LC3G2D2T
- 2LC3G2D2N
- 1LC3G2D1T
- 0LC3G2D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| LC3G2D4T | 7 | |
| LC3G2D4N | 6 | |
| LC3G2D3T | 5 | |
| LC3G2D3N | 4 | |
| LC3G2D2T | 3 | |
| LC3G2D2N | 2 | |
| LC3G2D1T | 1 | |
| LC3G2D1N | 0 |
CLC3GLS2Gate logic select register 2
- Address
0xF2C- Reset
x (not fixed at power-on)- Access
- read/write
- 7LC3G3D4T
- 6LC3G3D4N
- 5LC3G3D3T
- 4LC3G3D3N
- 3LC3G3D2T
- 2LC3G3D2N
- 1LC3G3D1T
- 0LC3G3D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| LC3G3D4T | 7 | |
| LC3G3D4N | 6 | |
| LC3G3D3T | 5 | |
| LC3G3D3N | 4 | |
| LC3G3D2T | 3 | |
| LC3G3D2N | 2 | |
| LC3G3D1T | 1 | |
| LC3G3D1N | 0 |
CLC3GLS3Gate logic select register 3
- Address
0xF2D- Reset
x (not fixed at power-on)- Access
- read/write
- 7LC3G4D4T
- 6LC3G4D4N
- 5LC3G4D3T
- 4LC3G4D3N
- 3LC3G4D2T
- 2LC3G4D2N
- 1LC3G4D1T
- 0LC3G4D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| LC3G4D4T | 7 | |
| LC3G4D4N | 6 | |
| LC3G4D3T | 5 | |
| LC3G4D3N | 4 | |
| LC3G4D2T | 3 | |
| LC3G4D2N | 2 | |
| LC3G4D1T | 1 | |
| LC3G4D1N | 0 |
CLC4CONConfigurable logic cell control
- Address
0xF2E- Reset
0x00- Access
- read/write
- 7LC4EN
- 6–
- 5LC4OUT
- 4LC4INTP
- 3LC4INTN
- 2LC4MODE2
- 1LC4MODE1
- 0LC4MODE0
5 fields
| Field | Bits | What it does |
|---|---|---|
| LC4EN | 7 | |
| LC4OUT | 5 | |
| LC4INTP | 4 | |
| LC4INTN | 3 | |
| LC4MODE | 2:0 |
CLC4POLPolarity control
- Address
0xF2F- Reset
x (not fixed at power-on)- Access
- read/write
- 7LC4POL
- 6–
- 5–
- 4–
- 3LC4G4POL
- 2LC4G3POL
- 1LC4G2POL
- 0LC4G1POL
5 fields
| Field | Bits | What it does |
|---|---|---|
| LC4POL | 7 | |
| LC4G4POL | 3 | |
| LC4G3POL | 2 | |
| LC4G2POL | 1 | |
| LC4G1POL | 0 |
CLC4SEL0Input select register 1
- Address
0xF30- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5–
- 4LC4D1S4
- 3LC4D1S3
- 2LC4D1S2
- 1LC4D1S1
- 0LC4D1S0
1 field
| Field | Bits | What it does |
|---|---|---|
| LC4D1S | 4:0 |
CLC4SEL1Input select register 1
- Address
0xF31- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5–
- 4LC4D2S4
- 3LC4D2S3
- 2LC4D2S2
- 1LC4D2S1
- 0LC4D2S0
1 field
| Field | Bits | What it does |
|---|---|---|
| LC4D2S | 4:0 |
CLC4SEL2Input select register 2
- Address
0xF32- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5–
- 4LC4D3S4
- 3LC4D3S3
- 2LC4D3S2
- 1LC4D3S1
- 0LC4D3S0
1 field
| Field | Bits | What it does |
|---|---|---|
| LC4D3S | 4:0 |
CLC4SEL3Input select register 3
- Address
0xF33- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5–
- 4LC4D4S4
- 3LC4D4S3
- 2LC4D4S2
- 1LC4D4S1
- 0LC4D4S0
1 field
| Field | Bits | What it does |
|---|---|---|
| LC4D4S | 4:0 |
CLC4GLS0Gate logic select register 0
- Address
0xF34- Reset
x (not fixed at power-on)- Access
- read/write
- 7LC4G1D4T
- 6LC4G1D4N
- 5LC4G1D3T
- 4LC4G1D3N
- 3LC4G1D2T
- 2LC4G1D2N
- 1LC4G1D1T
- 0LC4G1D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| LC4G1D4T | 7 | |
| LC4G1D4N | 6 | |
| LC4G1D3T | 5 | |
| LC4G1D3N | 4 | |
| LC4G1D2T | 3 | |
| LC4G1D2N | 2 | |
| LC4G1D1T | 1 | |
| LC4G1D1N | 0 |
CLC4GLS1Gate logic select register 1
- Address
0xF35- Reset
x (not fixed at power-on)- Access
- read/write
- 7LC4G2D4T
- 6LC4G2D4N
- 5LC4G2D3T
- 4LC4G2D3N
- 3LC4G2D2T
- 2LC4G2D2N
- 1LC4G2D1T
- 0LC4G2D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| LC4G2D4T | 7 | |
| LC4G2D4N | 6 | |
| LC4G2D3T | 5 | |
| LC4G2D3N | 4 | |
| LC4G2D2T | 3 | |
| LC4G2D2N | 2 | |
| LC4G2D1T | 1 | |
| LC4G2D1N | 0 |
CLC4GLS2Gate logic select register 2
- Address
0xF36- Reset
x (not fixed at power-on)- Access
- read/write
- 7LC4G3D4T
- 6LC4G3D4N
- 5LC4G3D3T
- 4LC4G3D3N
- 3LC4G3D2T
- 2LC4G3D2N
- 1LC4G3D1T
- 0LC4G3D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| LC4G3D4T | 7 | |
| LC4G3D4N | 6 | |
| LC4G3D3T | 5 | |
| LC4G3D3N | 4 | |
| LC4G3D2T | 3 | |
| LC4G3D2N | 2 | |
| LC4G3D1T | 1 | |
| LC4G3D1N | 0 |
CLC4GLS3Gate logic select register 3
- Address
0xF37- Reset
x (not fixed at power-on)- Access
- read/write
- 7LC4G4D4T
- 6LC4G4D4N
- 5LC4G4D3T
- 4LC4G4D3N
- 3LC4G4D2T
- 2LC4G4D2N
- 1LC4G4D1T
- 0LC4G4D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| LC4G4D4T | 7 | |
| LC4G4D4N | 6 | |
| LC4G4D3T | 5 | |
| LC4G4D3N | 4 | |
| LC4G4D2T | 3 | |
| LC4G4D2N | 2 | |
| LC4G4D1T | 1 | |
| LC4G4D1N | 0 |