BETAINDF0
- Address
0x00- Reset
x (not fixed at power-on)- Access
- read/write
- 7INDF07
- 6INDF06
- 5INDF05
- 4INDF04
- 3INDF03
- 2INDF02
- 1INDF01
- 0INDF00
1 field
| Field | Bits | What it does |
|---|---|---|
| INDF0 | 7:0 |
PIC16F1782 registers
All 191 registers by peripheral, at their data-memory address as the register file map gives it (bank and offset), with their reset value and every bit.
CPU CPU core
INDF1
- Address
0x01- Reset
x (not fixed at power-on)- Access
- read/write
- 7INDF17
- 6INDF16
- 5INDF15
- 4INDF14
- 3INDF13
- 2INDF12
- 1INDF11
- 0INDF10
1 field
| Field | Bits | What it does |
|---|---|---|
| INDF1 | 7:0 |
PCL
- Address
0x02- Reset
0x00- Access
- read/write
- 7PCL7
- 6PCL6
- 5PCL5
- 4PCL4
- 3PCL3
- 2PCL2
- 1PCL1
- 0PCL0
1 field
| Field | Bits | What it does |
|---|---|---|
| PCL | 7:0 |
STATUS
- Address
0x03- Reset
0x18- Access
- read/write
- 7–
- 6–
- 5–
- 4nTO
- 3nPD
- 2Z
- 1DC
- 0C
5 fields
| Field | Bits | What it does |
|---|---|---|
| nTO | 4 | |
| nPD | 3 | |
| Z | 2 | |
| DC | 1 | |
| C | 0 |
FSR0L
- Address
0x04- Reset
0x00- Access
- read/write
- 7FSR0L7
- 6FSR0L6
- 5FSR0L5
- 4FSR0L4
- 3FSR0L3
- 2FSR0L2
- 1FSR0L1
- 0FSR0L0
1 field
| Field | Bits | What it does |
|---|---|---|
| FSR0L | 7:0 |
FSR0H
- Address
0x05- Reset
0x00- Access
- read/write
- 7FSR0H7
- 6FSR0H6
- 5FSR0H5
- 4FSR0H4
- 3FSR0H3
- 2FSR0H2
- 1FSR0H1
- 0FSR0H0
1 field
| Field | Bits | What it does |
|---|---|---|
| FSR0H | 7:0 |
FSR1L
- Address
0x06- Reset
0x00- Access
- read/write
- 7FSR1L7
- 6FSR1L6
- 5FSR1L5
- 4FSR1L4
- 3FSR1L3
- 2FSR1L2
- 1FSR1L1
- 0FSR1L0
1 field
| Field | Bits | What it does |
|---|---|---|
| FSR1L | 7:0 |
FSR1H
- Address
0x07- Reset
0x00- Access
- read/write
- 7FSR1H7
- 6FSR1H6
- 5FSR1H5
- 4FSR1H4
- 3FSR1H3
- 2FSR1H2
- 1FSR1H1
- 0FSR1H0
1 field
| Field | Bits | What it does |
|---|---|---|
| FSR1H | 7:0 |
BSR
- Address
0x08- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4BSR4
- 3BSR3
- 2BSR2
- 1BSR1
- 0BSR0
5 fields
| Field | Bits | What it does |
|---|---|---|
| BSR4 | 4 | |
| BSR3 | 3 | |
| BSR2 | 2 | |
| BSR1 | 1 | |
| BSR0 | 0 |
WREG
- Address
0x09- Reset
0x00- Access
- read/write
- 7WREG07
- 6WREG06
- 5WREG05
- 4WREG04
- 3WREG03
- 2WREG02
- 1WREG01
- 0WREG00
1 field
| Field | Bits | What it does |
|---|---|---|
| WREG0 | 7:0 |
PCLATH
- Address
0x0A- Reset
0x00- Access
- read/write
- 7–
- 6PCLATH6
- 5PCLATH5
- 4PCLATH4
- 3PCLATH3
- 2PCLATH2
- 1PCLATH1
- 0PCLATH0
1 field
| Field | Bits | What it does |
|---|---|---|
| PCLATH | 6:0 |
STATUS_SHAD
- Address
0xFE4- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2Z_SHAD
- 1DC_SHAD
- 0C_SHAD
3 fields
| Field | Bits | What it does |
|---|---|---|
| Z_SHAD | 2 | |
| DC_SHAD | 1 | |
| C_SHAD | 0 |
WREG_SHAD
- Address
0xFE5- Reset
x (not fixed at power-on)- Access
- read/write
- 7WREG_SHAD7
- 6WREG_SHAD6
- 5WREG_SHAD5
- 4WREG_SHAD4
- 3WREG_SHAD3
- 2WREG_SHAD2
- 1WREG_SHAD1
- 0WREG_SHAD0
1 field
| Field | Bits | What it does |
|---|---|---|
| WREG_SHAD | 7:0 |
BSR_SHAD
- Address
0xFE6- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5–
- 4BSR_SHAD4
- 3BSR_SHAD3
- 2BSR_SHAD2
- 1BSR_SHAD1
- 0BSR_SHAD0
1 field
| Field | Bits | What it does |
|---|---|---|
| BSR_SHAD | 4:0 |
PCLATH_SHAD
- Address
0xFE7- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6PCLATH_SHAD6
- 5PCLATH_SHAD5
- 4PCLATH_SHAD4
- 3PCLATH_SHAD3
- 2PCLATH_SHAD2
- 1PCLATH_SHAD1
- 0PCLATH_SHAD0
1 field
| Field | Bits | What it does |
|---|---|---|
| PCLATH_SHAD | 6:0 |
FSR0L_SHAD
- Address
0xFE8- Reset
x (not fixed at power-on)- Access
- read/write
- 7FSR0L_SHAD7
- 6FSR0L_SHAD6
- 5FSR0L_SHAD5
- 4FSR0L_SHAD4
- 3FSR0L_SHAD3
- 2FSR0L_SHAD2
- 1FSR0L_SHAD1
- 0FSR0L_SHAD0
1 field
| Field | Bits | What it does |
|---|---|---|
| FSR0L_SHAD | 7:0 |
FSR0H_SHAD
- Address
0xFE9- Reset
x (not fixed at power-on)- Access
- read/write
- 7FSR0H_SHAD7
- 6FSR0H_SHAD6
- 5FSR0H_SHAD5
- 4FSR0H_SHAD4
- 3FSR0H_SHAD3
- 2FSR0H_SHAD2
- 1FSR0H_SHAD1
- 0FSR0H_SHAD0
1 field
| Field | Bits | What it does |
|---|---|---|
| FSR0H_SHAD | 7:0 |
FSR1L_SHAD
- Address
0xFEA- Reset
x (not fixed at power-on)- Access
- read/write
- 7FSR1L_SHAD7
- 6FSR1L_SHAD6
- 5FSR1L_SHAD5
- 4FSR1L_SHAD4
- 3FSR1L_SHAD3
- 2FSR1L_SHAD2
- 1FSR1L_SHAD1
- 0FSR1L_SHAD0
1 field
| Field | Bits | What it does |
|---|---|---|
| FSR1L_SHAD | 7:0 |
FSR1H_SHAD
- Address
0xFEB- Reset
x (not fixed at power-on)- Access
- read/write
- 7FSR1H_SHAD7
- 6FSR1H_SHAD6
- 5FSR1H_SHAD5
- 4FSR1H_SHAD4
- 3FSR1H_SHAD3
- 2FSR1H_SHAD2
- 1FSR1H_SHAD1
- 0FSR1H_SHAD0
1 field
| Field | Bits | What it does |
|---|---|---|
| FSR1H_SHAD | 7:0 |
STKPTRCurrent Stack pointer
- Address
0xFED- Reset
0x1F- Access
- read/write
- 7–
- 6–
- 5–
- 4STKPTR4
- 3STKPTR3
- 2STKPTR2
- 1STKPTR1
- 0STKPTR0
1 field
| Field | Bits | What it does |
|---|---|---|
| STKPTR | 4:0 |
TOSLTop of Stack Low byte
- Address
0xFEE- Reset
x (not fixed at power-on)- Access
- read/write
- 7TOSL7
- 6TOSL6
- 5TOSL5
- 4TOSL4
- 3TOSL3
- 2TOSL2
- 1TOSL1
- 0TOSL0
1 field
| Field | Bits | What it does |
|---|---|---|
| TOSL | 7:0 |
TOSHTop of Stack High byte
- Address
0xFEF- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6TOSH6
- 5TOSH5
- 4TOSH4
- 3TOSH3
- 2TOSH2
- 1TOSH1
- 0TOSH0
1 field
| Field | Bits | What it does |
|---|---|---|
| TOSH | 6:0 |
INTERRUPT Interrupts
INTCON
- Address
0x0B- Reset
0x00- Access
- read/write
- 7GIE
- 6PEIE
- 5TMR0IE
- 4INTE
- 3IOCIE
- 2TMR0IF
- 1INTF
- 0IOCIF
8 fields
| Field | Bits | What it does |
|---|---|---|
| GIE | 7 | |
| PEIE | 6 | |
| TMR0IE | 5 | |
| INTE | 4 | |
| IOCIE | 3 | |
| TMR0IF | 2 | |
| INTF | 1 | |
| IOCIF | 0 |
PIR1
- Address
0x11- Reset
0x00- Access
- read/write
- 7TMR1GIF
- 6ADIF
- 5RCIF
- 4TXIF
- 3SSP1IF
- 2CCP1IF
- 1TMR2IF
- 0TMR1IF
8 fields
| Field | Bits | What it does |
|---|---|---|
| TMR1GIF | 7 | Timer1 Gate Interrupt Flag bit |
| ADIF | 6 | A/D Converter Interrupt Flag bit |
| RCIF | 5 | EUSART Receive Interrupt Flag bit |
| TXIF | 4 | EUSART Transmit Interrupt Flag bit |
| SSP1IF | 3 | Master Synchronous Serial Port (MSSP) Interrupt Flag bit |
| CCP1IF | 2 | CCP1 Interrupt Flag bit |
| TMR2IF | 1 | TMR2 to PR2 Match Interrupt Flag bit |
| TMR1IF | 0 | TMR1 Overflow Interrupt Flag bit |
PIR2
- Address
0x12- Reset
0x00- Access
- read/write
- 7OSFIF
- 6C2IF
- 5C1IF
- 4EEIF
- 3BCL1IF
- 2–
- 1C3IF
- 0CCP2IF
7 fields
| Field | Bits | What it does |
|---|---|---|
| OSFIF | 7 | |
| C2IF | 6 | |
| C1IF | 5 | |
| EEIF | 4 | |
| BCL1IF | 3 | |
| C3IF | 1 | |
| CCP2IF | 0 |
PIR4
- Address
0x14- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5PSMC2TIF
- 4PSMC1TIF
- 3–
- 2–
- 1PSMC2SIF
- 0PSMC1SIF
4 fields
| Field | Bits | What it does |
|---|---|---|
| PSMC2TIF | 5 | |
| PSMC1TIF | 4 | |
| PSMC2SIF | 1 | |
| PSMC1SIF | 0 |
PIE1Peripheral Interrupt Enable Register 1
- Address
0x91- Reset
0x00- Access
- read/write
- 7TMR1GIE
- 6ADIE
- 5RCIE
- 4TXIE
- 3SSP1IE
- 2CCP1IE
- 1TMR2IE
- 0TMR1IE
8 fields
| Field | Bits | What it does |
|---|---|---|
| TMR1GIE | 7 | Timer1 Gate Interrupt Enable bit |
| ADIE | 6 | A/D Converter Interrupt Enable bit |
| RCIE | 5 | EUSART Receive Interrupt Enable bit |
| TXIE | 4 | EUSART Transmit Interrupt Enable bit |
| SSP1IE | 3 | Master Synchronous Serial Port (MSSP) Interrupt Enable bit |
| CCP1IE | 2 | CCP1 Interrupt Enable bit |
| TMR2IE | 1 | TMR2 to PR2 Match Interrupt Enable bit |
| TMR1IE | 0 | TMR1 Overflow Interrupt Enable bit |
PIE2Peripheral Interrupt Enable Register 2
- Address
0x92- Reset
0x00- Access
- read/write
- 7OSFIE
- 6C2IE
- 5C1IE
- 4EEIE
- 3BCL1IE
- 2–
- 1C3IE
- 0CCP2IE
7 fields
| Field | Bits | What it does |
|---|---|---|
| OSFIE | 7 | CCP2 Interrupt Enable bit |
| C2IE | 6 | Comparator C2 Interrupt Enable bit |
| C1IE | 5 | Comparator C1 Interrupt Enable bit |
| EEIE | 4 | EEPROM Write Completion Interrupt Enable bit |
| BCL1IE | 3 | MSSP Bus Collision Interrupt Interrupt Enable bit |
| C3IE | 1 | |
| CCP2IE | 0 |
PIE4
- Address
0x94- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5PSMC2TIE
- 4PSMC1TIE
- 3–
- 2–
- 1PSMC2SIE
- 0PSMC1SIE
4 fields
| Field | Bits | What it does |
|---|---|---|
| PSMC2TIE | 5 | |
| PSMC1TIE | 4 | |
| PSMC2SIE | 1 | |
| PSMC1SIE | 0 |
PORTA I/O port A
PORTA
- Address
0x0C- Reset
x (not fixed at power-on)- Access
- read/write
- 7RA7
- 6RA6
- 5RA5
- 4RA4
- 3RA3
- 2RA2
- 1RA1
- 0RA0
8 fields
| Field | Bits | What it does |
|---|---|---|
| RA7 | 7 | |
| RA6 | 6 | |
| RA5 | 5 | |
| RA4 | 4 | |
| RA3 | 3 | |
| RA2 | 2 | |
| RA1 | 1 | |
| RA0 | 0 |
TRISAPORTA Data Direction Control Register
- Address
0x8C- Reset
0xFF- Access
- read/write
- 7TRISA7
- 6TRISA6
- 5TRISA5
- 4TRISA4
- 3TRISA3
- 2TRISA2
- 1TRISA1
- 0TRISA0
8 fields
| Field | Bits | What it does |
|---|---|---|
| TRISA7 | 7 | |
| TRISA6 | 6 | |
| TRISA5 | 5 | |
| TRISA4 | 4 | |
| TRISA3 | 3 | |
| TRISA2 | 2 | |
| TRISA1 | 1 | |
| TRISA0 | 0 |
LATA
- Address
0x10C- Reset
x (not fixed at power-on)- Access
- read/write
- 7LATA7
- 6LATA6
- 5LATA5
- 4LATA4
- 3LATA3
- 2LATA2
- 1LATA1
- 0LATA0
8 fields
| Field | Bits | What it does |
|---|---|---|
| LATA7 | 7 | |
| LATA6 | 6 | |
| LATA5 | 5 | |
| LATA4 | 4 | |
| LATA3 | 3 | |
| LATA2 | 2 | |
| LATA1 | 1 | |
| LATA0 | 0 |
ANSELA
- Address
0x18C- Reset
0xBF- Access
- read/write
- 7ANSA7
- 6–
- 5ANSA5
- 4ANSA4
- 3ANSA3
- 2ANSA2
- 1ANSA1
- 0ANSA0
7 fields
| Field | Bits | What it does |
|---|---|---|
| ANSA7 | 7 | |
| ANSA5 | 5 | |
| ANSA4 | 4 | |
| ANSA3 | 3 | |
| ANSA2 | 2 | |
| ANSA1 | 1 | |
| ANSA0 | 0 |
WPUA
- Address
0x20C- Reset
0xFF- Access
- read/write
- 7WPUA7
- 6WPUA6
- 5WPUA5
- 4WPUA4
- 3WPUA3
- 2WPUA2
- 1WPUA1
- 0WPUA0
8 fields
| Field | Bits | What it does |
|---|---|---|
| WPUA7 | 7 | |
| WPUA6 | 6 | |
| WPUA5 | 5 | |
| WPUA4 | 4 | |
| WPUA3 | 3 | |
| WPUA2 | 2 | |
| WPUA1 | 1 | |
| WPUA0 | 0 |
ODCONA
- Address
0x28C- Reset
0x00- Access
- read/write
- 7ODCONA7
- 6ODCONA6
- 5ODCONA5
- 4ODCONA4
- 3ODCONA3
- 2ODCONA2
- 1ODCONA1
- 0ODCONA0
8 fields
| Field | Bits | What it does |
|---|---|---|
| ODCONA7 | 7 | |
| ODCONA6 | 6 | |
| ODCONA5 | 5 | |
| ODCONA4 | 4 | |
| ODCONA3 | 3 | |
| ODCONA2 | 2 | |
| ODCONA1 | 1 | |
| ODCONA0 | 0 |
SLRCONA
- Address
0x30C- Reset
0x00- Access
- read/write
- 7SLRCONA7
- 6SLRCONA6
- 5SLRCONA5
- 4SLRCONA4
- 3SLRCONA3
- 2SLRCONA2
- 1SLRCONA1
- 0SLRCONA0
8 fields
| Field | Bits | What it does |
|---|---|---|
| SLRCONA7 | 7 | |
| SLRCONA6 | 6 | |
| SLRCONA5 | 5 | |
| SLRCONA4 | 4 | |
| SLRCONA3 | 3 | |
| SLRCONA2 | 2 | |
| SLRCONA1 | 1 | |
| SLRCONA0 | 0 |
INLVLA
- Address
0x38C- Reset
0x00- Access
- read/write
- 7INLVLA7
- 6INLVLA6
- 5INLVLA5
- 4INLVLA4
- 3INLVLA3
- 2INLVLA2
- 1INLVLA1
- 0INLVLA0
8 fields
| Field | Bits | What it does |
|---|---|---|
| INLVLA7 | 7 | |
| INLVLA6 | 6 | |
| INLVLA5 | 5 | |
| INLVLA4 | 4 | |
| INLVLA3 | 3 | |
| INLVLA2 | 2 | |
| INLVLA1 | 1 | |
| INLVLA0 | 0 |
PORTB I/O port B
PORTB
- Address
0x0D- Reset
x (not fixed at power-on)- Access
- read/write
- 7RB7
- 6RB6
- 5RB5
- 4RB4
- 3RB3
- 2RB2
- 1RB1
- 0RB0
8 fields
| Field | Bits | What it does |
|---|---|---|
| RB7 | 7 | |
| RB6 | 6 | |
| RB5 | 5 | |
| RB4 | 4 | |
| RB3 | 3 | |
| RB2 | 2 | |
| RB1 | 1 | |
| RB0 | 0 |
TRISB
- Address
0x8D- Reset
0xFF- Access
- read/write
- 7TRISB7
- 6TRISB6
- 5TRISB5
- 4TRISB4
- 3TRISB3
- 2TRISB2
- 1TRISB1
- 0TRISB0
8 fields
| Field | Bits | What it does |
|---|---|---|
| TRISB7 | 7 | |
| TRISB6 | 6 | |
| TRISB5 | 5 | |
| TRISB4 | 4 | |
| TRISB3 | 3 | |
| TRISB2 | 2 | |
| TRISB1 | 1 | |
| TRISB0 | 0 |
LATB
- Address
0x10D- Reset
x (not fixed at power-on)- Access
- read/write
- 7LATB7
- 6LATB6
- 5LATB5
- 4LATB4
- 3LATB3
- 2LATB2
- 1LATB1
- 0LATB0
8 fields
| Field | Bits | What it does |
|---|---|---|
| LATB7 | 7 | |
| LATB6 | 6 | |
| LATB5 | 5 | |
| LATB4 | 4 | |
| LATB3 | 3 | |
| LATB2 | 2 | |
| LATB1 | 1 | |
| LATB0 | 0 |
ANSELB
- Address
0x18D- Reset
0x3F- Access
- read/write
- 7–
- 6–
- 5ANSB5
- 4ANSB4
- 3ANSB3
- 2ANSB2
- 1ANSB1
- 0ANSB0
6 fields
| Field | Bits | What it does |
|---|---|---|
| ANSB5 | 5 | |
| ANSB4 | 4 | |
| ANSB3 | 3 | |
| ANSB2 | 2 | |
| ANSB1 | 1 | |
| ANSB0 | 0 |
WPUB
- Address
0x20D- Reset
0xFF- Access
- read/write
- 7WPUB7
- 6WPUB6
- 5WPUB5
- 4WPUB4
- 3WPUB3
- 2WPUB2
- 1WPUB1
- 0WPUB0
8 fields
| Field | Bits | What it does |
|---|---|---|
| WPUB7 | 7 | |
| WPUB6 | 6 | |
| WPUB5 | 5 | |
| WPUB4 | 4 | |
| WPUB3 | 3 | |
| WPUB2 | 2 | |
| WPUB1 | 1 | |
| WPUB0 | 0 |
ODCONB
- Address
0x28D- Reset
0x00- Access
- read/write
- 7ODCONB7
- 6ODCONB6
- 5ODCONB5
- 4ODCONB4
- 3ODCONB3
- 2ODCONB2
- 1ODCONB1
- 0ODCONB0
8 fields
| Field | Bits | What it does |
|---|---|---|
| ODCONB7 | 7 | |
| ODCONB6 | 6 | |
| ODCONB5 | 5 | |
| ODCONB4 | 4 | |
| ODCONB3 | 3 | |
| ODCONB2 | 2 | |
| ODCONB1 | 1 | |
| ODCONB0 | 0 |
SLRCONB
- Address
0x30D- Reset
0x00- Access
- read/write
- 7SLRCONB7
- 6SLRCONB6
- 5SLRCONB5
- 4SLRCONB4
- 3SLRCONB3
- 2SLRCONB2
- 1SLRCONB1
- 0SLRCONB0
8 fields
| Field | Bits | What it does |
|---|---|---|
| SLRCONB7 | 7 | |
| SLRCONB6 | 6 | |
| SLRCONB5 | 5 | |
| SLRCONB4 | 4 | |
| SLRCONB3 | 3 | |
| SLRCONB2 | 2 | |
| SLRCONB1 | 1 | |
| SLRCONB0 | 0 |
INLVLB
- Address
0x38D- Reset
0x00- Access
- read/write
- 7INLVLB7
- 6INLVLB6
- 5INLVLB5
- 4INLVLB4
- 3INLVLB3
- 2INLVLB2
- 1INLVLB1
- 0INLVLB0
8 fields
| Field | Bits | What it does |
|---|---|---|
| INLVLB7 | 7 | |
| INLVLB6 | 6 | |
| INLVLB5 | 5 | |
| INLVLB4 | 4 | |
| INLVLB3 | 3 | |
| INLVLB2 | 2 | |
| INLVLB1 | 1 | |
| INLVLB0 | 0 |
PORTC I/O port C
PORTC
- Address
0x0E- Reset
x (not fixed at power-on)- Access
- read/write
- 7RC7
- 6RC6
- 5RC5
- 4RC4
- 3RC3
- 2RC2
- 1RC1
- 0RC0
8 fields
| Field | Bits | What it does |
|---|---|---|
| RC7 | 7 | |
| RC6 | 6 | |
| RC5 | 5 | |
| RC4 | 4 | |
| RC3 | 3 | |
| RC2 | 2 | |
| RC1 | 1 | |
| RC0 | 0 |
TRISCPORTB Data Direction Control Register
- Address
0x8E- Reset
0xFF- Access
- read/write
- 7TRISC7
- 6TRISC6
- 5TRISC5
- 4TRISC4
- 3TRISC3
- 2TRISC2
- 1TRISC1
- 0TRISC0
8 fields
| Field | Bits | What it does |
|---|---|---|
| TRISC7 | 7 | |
| TRISC6 | 6 | |
| TRISC5 | 5 | |
| TRISC4 | 4 | |
| TRISC3 | 3 | |
| TRISC2 | 2 | |
| TRISC1 | 1 | |
| TRISC0 | 0 |
LATC
- Address
0x10E- Reset
x (not fixed at power-on)- Access
- read/write
- 7LATC7
- 6LATC6
- 5LATC5
- 4LATC4
- 3LATC3
- 2LATC2
- 1LATC1
- 0LATC0
8 fields
| Field | Bits | What it does |
|---|---|---|
| LATC7 | 7 | |
| LATC6 | 6 | |
| LATC5 | 5 | |
| LATC4 | 4 | |
| LATC3 | 3 | |
| LATC2 | 2 | |
| LATC1 | 1 | |
| LATC0 | 0 |
WPUC
- Address
0x20E- Reset
0xFF- Access
- read/write
- 7WPUC7
- 6WPUC6
- 5WPUC5
- 4WPUC4
- 3WPUC3
- 2WPUC2
- 1WPUC1
- 0WPUC0
8 fields
| Field | Bits | What it does |
|---|---|---|
| WPUC7 | 7 | |
| WPUC6 | 6 | |
| WPUC5 | 5 | |
| WPUC4 | 4 | |
| WPUC3 | 3 | |
| WPUC2 | 2 | |
| WPUC1 | 1 | |
| WPUC0 | 0 |
ODCONC
- Address
0x28E- Reset
0x00- Access
- read/write
- 7ODCONC7
- 6ODCONC6
- 5ODCONC5
- 4ODCONC4
- 3ODCONC3
- 2ODCONC2
- 1ODCONC1
- 0ODCONC0
8 fields
| Field | Bits | What it does |
|---|---|---|
| ODCONC7 | 7 | |
| ODCONC6 | 6 | |
| ODCONC5 | 5 | |
| ODCONC4 | 4 | |
| ODCONC3 | 3 | |
| ODCONC2 | 2 | |
| ODCONC1 | 1 | |
| ODCONC0 | 0 |
SLRCONC
- Address
0x30E- Reset
0x00- Access
- read/write
- 7SLRCONC7
- 6SLRCONC6
- 5SLRCONC5
- 4SLRCONC4
- 3SLRCONC3
- 2SLRCONC2
- 1SLRCONC1
- 0SLRCONC0
8 fields
| Field | Bits | What it does |
|---|---|---|
| SLRCONC7 | 7 | |
| SLRCONC6 | 6 | |
| SLRCONC5 | 5 | |
| SLRCONC4 | 4 | |
| SLRCONC3 | 3 | |
| SLRCONC2 | 2 | |
| SLRCONC1 | 1 | |
| SLRCONC0 | 0 |
INLVLC
- Address
0x38E- Reset
0xFF- Access
- read/write
- 7INLVLC7
- 6INLVLC6
- 5INLVLC5
- 4INLVLC4
- 3INLVLC3
- 2INLVLC2
- 1INLVLC1
- 0INLVLC0
8 fields
| Field | Bits | What it does |
|---|---|---|
| INLVLC7 | 7 | |
| INLVLC6 | 6 | |
| INLVLC5 | 5 | |
| INLVLC4 | 4 | |
| INLVLC3 | 3 | |
| INLVLC2 | 2 | |
| INLVLC1 | 1 | |
| INLVLC0 | 0 |
PORTE I/O port E
PORTE
- Address
0x10- Reset
x (not fixed at power-on)- Access
- read only
- 7–
- 6–
- 5–
- 4–
- 3RE3
- 2–
- 1–
- 0–
1 field
| Field | Bits | What it does |
|---|---|---|
| RE3 | 3 |
TRISE
- Address
0x90- Reset
0x08- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3TRISE3
- 2–
- 1–
- 0–
1 field
| Field | Bits | What it does |
|---|---|---|
| TRISE3 | 3 |
WPUE
- Address
0x210- Reset
0x08- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3WPUE3
- 2–
- 1–
- 0–
1 field
| Field | Bits | What it does |
|---|---|---|
| WPUE3 | 3 |
INLVLE
- Address
0x390- Reset
0x08- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3INLVLE3
- 2–
- 1–
- 0–
1 field
| Field | Bits | What it does |
|---|---|---|
| INLVLE3 | 3 |
TMR0 Timer0
TMR0
- Address
0x15- Reset
x (not fixed at power-on)- Access
- read/write
- 7TMR07
- 6TMR06
- 5TMR05
- 4TMR04
- 3TMR03
- 2TMR02
- 1TMR01
- 0TMR00
1 field
| Field | Bits | What it does |
|---|---|---|
| TMR0 | 7:0 |
OPTION_REGOption Register
- Address
0x95- Reset
0xFF- Access
- read/write
- 7nWPUEN
- 6INTEDG
- 5TMR0CS
- 4TMR0SE
- 3PSA
- 2PS2
- 1PS1
- 0PS0
8 fields
| Field | Bits | What it does |
|---|---|---|
| nWPUEN | 7 | Weak Pull-up Enable bit |
| INTEDG | 6 | Interrupt Edge Select bit |
| TMR0CS | 5 | TMR0 Clock Source Select bit |
| TMR0SE | 4 | TMR0 Source Edge Select bit |
| PSA | 3 | Prescaler Active bit |
| PS2 | 2 | Prescaler Rate Select bits |
| PS1 | 1 | Prescaler Rate Select bits |
| PS0 | 0 | Prescaler Rate Select bits |
TMR1 Timer1
TMR1L
- Address
0x16- Reset
x (not fixed at power-on)- Access
- read/write
- 7TMR1L7
- 6TMR1L6
- 5TMR1L5
- 4TMR1L4
- 3TMR1L3
- 2TMR1L2
- 1TMR1L1
- 0TMR1L0
1 field
| Field | Bits | What it does |
|---|---|---|
| TMR1L | 7:0 |
TMR1H
- Address
0x17- Reset
x (not fixed at power-on)- Access
- read/write
- 7TMR1H7
- 6TMR1H6
- 5TMR1H5
- 4TMR1H4
- 3TMR1H3
- 2TMR1H2
- 1TMR1H1
- 0TMR1H0
1 field
| Field | Bits | What it does |
|---|---|---|
| TMR1H | 7:0 |
T1CON
- Address
0x18- Reset
0x00- Access
- read/write
- 7TMR1CS1
- 6TMR1CS0
- 5T1CKPS1
- 4T1CKPS0
- 3T1OSCEN
- 2nT1SYNC
- 1–
- 0TMR1ON
7 fields
| Field | Bits | What it does |
|---|---|---|
| TMR1CS1 | 7 | |
| TMR1CS0 | 6 | |
| T1CKPS1 | 5 | |
| T1CKPS0 | 4 | |
| T1OSCEN | 3 | |
| nT1SYNC | 2 | |
| TMR1ON | 0 |
T1GCON
- Address
0x19- Reset
x (not fixed at power-on)- Access
- read/write
- 7TMR1GE
- 6T1GPOL
- 5T1GTM
- 4T1GSPM
- 3T1GGO
- 2T1GVAL
- 1T1GSS1
- 0T1GSS0
8 fields
| Field | Bits | What it does |
|---|---|---|
| TMR1GE | 7 | |
| T1GPOL | 6 | |
| T1GTM | 5 | |
| T1GSPM | 4 | |
| T1GGO | 3 | |
| T1GVAL | 2 | |
| T1GSS1 | 1 | |
| T1GSS0 | 0 |
TMR2 Timer2
TMR2
- Address
0x1A- Reset
0x00- Access
- read/write
- 7TMR27
- 6TMR26
- 5TMR25
- 4TMR24
- 3TMR23
- 2TMR22
- 1TMR21
- 0TMR20
1 field
| Field | Bits | What it does |
|---|---|---|
| TMR2 | 7:0 |
PR2
- Address
0x1B- Reset
0xFF- Access
- read/write
- 7PR27
- 6PR26
- 5PR25
- 4PR24
- 3PR23
- 2PR22
- 1PR21
- 0PR20
1 field
| Field | Bits | What it does |
|---|---|---|
| PR2 | 7:0 |
T2CON
- Address
0x1C- Reset
0x00- Access
- read/write
- 7–
- 6T2OUTPS3
- 5T2OUTPS2
- 4T2OUTPS1
- 3T2OUTPS0
- 2TMR2ON
- 1T2CKPS1
- 0T2CKPS0
7 fields
| Field | Bits | What it does |
|---|---|---|
| T2OUTPS3 | 6 | |
| T2OUTPS2 | 5 | |
| T2OUTPS1 | 4 | |
| T2OUTPS0 | 3 | |
| TMR2ON | 2 | |
| T2CKPS1 | 1 | |
| T2CKPS0 | 0 |
OSCILLATOR Oscillator, power control and watchdog
PCONPower Control Register
- Address
0x96- Reset
x (not fixed at power-on)- Access
- read/write
- 7STKOVF
- 6STKUNF
- 5–
- 4nRWDT
- 3nRMCLR
- 2nRI
- 1nPOR
- 0nBOR
7 fields
| Field | Bits | What it does |
|---|---|---|
| STKOVF | 7 | Stack Overflow Flag bit |
| STKUNF | 6 | Stack Underflow Flag bit |
| nRWDT | 4 | |
| nRMCLR | 3 | MCLR Reset Flag bit |
| nRI | 2 | RESET Instruction Flag bit |
| nPOR | 1 | Power-on Reset Status bit |
| nBOR | 0 | Brown-out Reset Status bit |
WDTCONWatchdog Timer Control Register
- Address
0x97- Reset
0x16- Access
- read/write
- 7–
- 6–
- 5WDTPS4
- 4WDTPS3
- 3WDTPS2
- 2WDTPS1
- 1WDTPS0
- 0SWDTEN
6 fields
| Field | Bits | What it does |
|---|---|---|
| WDTPS4 | 5 | Watchdog Timer Period Select bits |
| WDTPS3 | 4 | Watchdog Timer Period Select bits |
| WDTPS2 | 3 | Watchdog Timer Period Select bits |
| WDTPS1 | 2 | Watchdog Timer Period Select bits |
| WDTPS0 | 1 | Watchdog Timer Period Select bits |
| SWDTEN | 0 | Software Enable/Disable for Watch Dog Timer bit |
OSCTUNEOscillator Tuning Register
- Address
0x98- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5TUN5
- 4TUN4
- 3TUN3
- 2TUN2
- 1TUN1
- 0TUN0
6 fields
| Field | Bits | What it does |
|---|---|---|
| TUN5 | 5 | Frequency Tuning bits |
| TUN4 | 4 | Frequency Tuning bits |
| TUN3 | 3 | Frequency Tuning bits |
| TUN2 | 2 | Frequency Tuning bits |
| TUN1 | 1 | Frequency Tuning bits |
| TUN0 | 0 | Frequency Tuning bits |
OSCCONOscillator Control Register
- Address
0x99- Reset
0x38- Access
- read/write
- 7SPLLEN
- 6IRCF3
- 5IRCF2
- 4IRCF1
- 3IRCF0
- 2–
- 1SCS1
- 0SCS0
7 fields
| Field | Bits | What it does |
|---|---|---|
| SPLLEN | 7 | Software PLL Enable bit |
| IRCF3 | 6 | Internal Oscillator Frequency Select bits |
| IRCF2 | 5 | Internal Oscillator Frequency Select bits |
| IRCF1 | 4 | Internal Oscillator Frequency Select bits |
| IRCF0 | 3 | Internal Oscillator Frequency Select bits |
| SCS1 | 1 | System clock select bit |
| SCS0 | 0 | System clock select bit |
OSCSTATOscillator Status Register
- Address
0x9A- Reset
x (not fixed at power-on)- Access
- read only
- 7T1OSCR
- 6PLLR
- 5OSTS
- 4HFIOFR
- 3HFIOFL
- 2MFIOFR
- 1LFIOFR
- 0HFIOFS
8 fields
| Field | Bits | What it does |
|---|---|---|
| T1OSCR | 7 | Timer1 Oscillator Ready bit |
| PLLR | 6 | 4x PLL Ready bit |
| OSTS | 5 | Oscillator Start-up Time-out Status bit |
| HFIOFR | 4 | High Freqency Internal Oscillator Ready bit |
| HFIOFL | 3 | High Freqency Internal Oscillator Status Locked bit |
| MFIOFR | 2 | Medium Freqency Internal Oscillator Ready bit |
| LFIOFR | 1 | Low Freqency Internal Oscillator Ready bit |
| HFIOFS | 0 | Low Freqency Internal Oscillator Ready bit |
BORCONBrown-out Reset Control Register
- Address
0x116- Reset
x (not fixed at power-on)- Access
- read/write
- 7SBOREN
- 6BORFS
- 5–
- 4–
- 3–
- 2–
- 1–
- 0BORRDY
3 fields
| Field | Bits | What it does |
|---|---|---|
| SBOREN | 7 | Software Brown Out Reset Enable bit |
| BORFS | 6 | |
| BORRDY | 0 | Brown-out Reset Circuit Ready Status bit |
VREGCON
- Address
0x197- Reset
0x01- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2–
- 1VREGPM
- 0–
1 field
| Field | Bits | What it does |
|---|---|---|
| VREGPM | 1 |
CLKRCON
- Address
0x51A- Reset
0x30- Access
- read/write
- 7CLKREN
- 6CLKROE
- 5CLKRSLR
- 4CLKRDC1
- 3CLKRDC0
- 2CLKRDIV2
- 1CLKRDIV1
- 0CLKRDIV0
8 fields
| Field | Bits | What it does |
|---|---|---|
| CLKREN | 7 | |
| CLKROE | 6 | |
| CLKRSLR | 5 | |
| CLKRDC1 | 4 | |
| CLKRDC0 | 3 | |
| CLKRDIV2 | 2 | |
| CLKRDIV1 | 1 | |
| CLKRDIV0 | 0 |
ADC Analog-to-digital converter
ADRESLA/D Result Register LSB
- Address
0x9B- Reset
x (not fixed at power-on)- Access
- read/write
- 7ADRESL7
- 6ADRESL6
- 5ADRESL5
- 4ADRESL4
- 3ADRESL3
- 2ADRESL2
- 1ADRESL1
- 0ADRESL0
1 field
| Field | Bits | What it does |
|---|---|---|
| ADRESL | 7:0 |
ADRESHA/D Result Register MSB
- Address
0x9C- Reset
x (not fixed at power-on)- Access
- read/write
- 7ADRESH7
- 6ADRESH6
- 5ADRESH5
- 4ADRESH4
- 3ADRESH3
- 2ADRESH2
- 1ADRESH1
- 0ADRESH0
1 field
| Field | Bits | What it does |
|---|---|---|
| ADRESH | 7:0 |
ADCON0Analog-to-Digital Control Register 0
- Address
0x9D- Reset
0x00- Access
- read/write
- 7ADRMD
- 6CHS4
- 5CHS3
- 4CHS2
- 3CHS1
- 2CHS0
- 1GO/nDONE
- 0ADON
8 fields
| Field | Bits | What it does |
|---|---|---|
| ADRMD | 7 | |
| CHS4 | 6 | Analog Channel Select bits |
| CHS3 | 5 | Analog Channel Select bits |
| CHS2 | 4 | Analog Channel Select bits |
| CHS1 | 3 | Analog Channel Select bits |
| CHS0 | 2 | Analog Channel Select bits |
| GO/nDONE | 1 | A/D Conversion Status bit |
| ADON | 0 | A/D Module Enable bit |
ADCON1Analog-to-Digital Control Register 1
- Address
0x9E- Reset
0x00- Access
- read/write
- 7ADFM
- 6ADCS2
- 5ADCS1
- 4ADCS0
- 3–
- 2ADNREF
- 1ADPREF1
- 0ADPREF0
7 fields
| Field | Bits | What it does |
|---|---|---|
| ADFM | 7 | A/D Result Format Select bit |
| ADCS2 | 6 | A/D Conversion Clock Select bits |
| ADCS1 | 5 | A/D Conversion Clock Select bits |
| ADCS0 | 4 | A/D Conversion Clock Select bits |
| ADNREF | 2 | A/D Negative Voltage Reference Configuration |
| ADPREF1 | 1 | A/D Positive Voltage Reference Configuration |
| ADPREF0 | 0 | A/D Positive Voltage Reference Configuration |
ADCON2
- Address
0x9F- Reset
0x00- Access
- read/write
- 7TRIGSEL3
- 6TRIGSEL2
- 5TRIGSEL1
- 4TRIGSEL0
- 3CHSN3
- 2CHSN2
- 1CHSN1
- 0CHSN0
8 fields
| Field | Bits | What it does |
|---|---|---|
| TRIGSEL3 | 7 | |
| TRIGSEL2 | 6 | |
| TRIGSEL1 | 5 | |
| TRIGSEL0 | 4 | |
| CHSN3 | 3 | |
| CHSN2 | 2 | |
| CHSN1 | 1 | |
| CHSN0 | 0 |
COMPARATOR Comparators and voltage reference
CM1CON0
- Address
0x111- Reset
x (not fixed at power-on)- Access
- read/write
- 7C1ON
- 6C1OUT
- 5C1OE
- 4C1POL
- 3C1ZLF
- 2C1SP
- 1C1HYS
- 0C1SYNC
8 fields
| Field | Bits | What it does |
|---|---|---|
| C1ON | 7 | Comparator Enable bit |
| C1OUT | 6 | Comparator Output bit |
| C1OE | 5 | Comparator Output Enable bit |
| C1POL | 4 | Comparator Output Polarity Select bit |
| C1ZLF | 3 | |
| C1SP | 2 | Comparator Speed/Power Select bit |
| C1HYS | 1 | Comparator Hysteresis Enable bit |
| C1SYNC | 0 | Comparator Output Synchronous Mode bit |
CM1CON1
- Address
0x112- Reset
0x00- Access
- read/write
- 7C1INTP
- 6C1INTN
- 5C1PCH2
- 4C1PCH1
- 3C1PCH0
- 2C1NCH2
- 1C1NCH1
- 0C1NCH0
8 fields
| Field | Bits | What it does |
|---|---|---|
| C1INTP | 7 | Comparator Interrupt on Positive going edge Enable bits |
| C1INTN | 6 | Comparator Interrupt on Negative going edge Enable bits |
| C1PCH2 | 5 | |
| C1PCH1 | 4 | |
| C1PCH0 | 3 | |
| C1NCH2 | 2 | |
| C1NCH1 | 1 | Comparator Negative Input Channel Select bits |
| C1NCH0 | 0 | Comparator Negative Input Channel Select bits |
CM2CON0
- Address
0x113- Reset
x (not fixed at power-on)- Access
- read/write
- 7C2ON
- 6C2OUT
- 5C2OE
- 4C2POL
- 3C2ZLF
- 2C2SP
- 1C2HYS
- 0C2SYNC
8 fields
| Field | Bits | What it does |
|---|---|---|
| C2ON | 7 | |
| C2OUT | 6 | |
| C2OE | 5 | |
| C2POL | 4 | |
| C2ZLF | 3 | |
| C2SP | 2 | |
| C2HYS | 1 | |
| C2SYNC | 0 |
CM2CON1
- Address
0x114- Reset
0x00- Access
- read/write
- 7C2INTP
- 6C2INTN
- 5C2PCH2
- 4C2PCH1
- 3C2PCH0
- 2C2NCH2
- 1C2NCH1
- 0C2NCH0
8 fields
| Field | Bits | What it does |
|---|---|---|
| C2INTP | 7 | Comparator Interrupt on Positive going edge Enable bits |
| C2INTN | 6 | Comparator Interrupt on Negative going edge Enable bits |
| C2PCH2 | 5 | |
| C2PCH1 | 4 | |
| C2PCH0 | 3 | |
| C2NCH2 | 2 | |
| C2NCH1 | 1 | Comparator Negative Input Channel Select bits |
| C2NCH0 | 0 | Comparator Negative Input Channel Select bits |
CMOUTComparator Output Register
- Address
0x115- Reset
0x00- Access
- read only
- 7–
- 6–
- 5–
- 4–
- 3–
- 2MC3OUT
- 1MC2OUT
- 0MC1OUT
3 fields
| Field | Bits | What it does |
|---|---|---|
| MC3OUT | 2 | |
| MC2OUT | 1 | |
| MC1OUT | 0 |
CM3CON0
- Address
0x11E- Reset
x (not fixed at power-on)- Access
- read/write
- 7C3ON
- 6C3OUT
- 5C3OE
- 4C3POL
- 3C3ZLF
- 2C3SP
- 1C3HYS
- 0C3SYNC
8 fields
| Field | Bits | What it does |
|---|---|---|
| C3ON | 7 | |
| C3OUT | 6 | |
| C3OE | 5 | |
| C3POL | 4 | |
| C3ZLF | 3 | |
| C3SP | 2 | |
| C3HYS | 1 | |
| C3SYNC | 0 |
CM3CON1
- Address
0x11F- Reset
0x00- Access
- read/write
- 7C3INTP
- 6C3INTN
- 5C3PCH2
- 4C3PCH1
- 3C3PCH0
- 2C3NCH2
- 1C3NCH1
- 0C3NCH0
8 fields
| Field | Bits | What it does |
|---|---|---|
| C3INTP | 7 | |
| C3INTN | 6 | |
| C3PCH2 | 5 | |
| C3PCH1 | 4 | |
| C3PCH0 | 3 | |
| C3NCH2 | 2 | |
| C3NCH1 | 1 | |
| C3NCH0 | 0 |
FVR Fixed voltage reference
FVRCONFixed Voltage Reference Control Register
- Address
0x117- Reset
x (not fixed at power-on)- Access
- read/write
- 7FVREN
- 6FVRRDY
- 5TSEN
- 4TSRNG
- 3CDAFVR1
- 2CDAFVR0
- 1ADFVR1
- 0ADFVR0
8 fields
| Field | Bits | What it does |
|---|---|---|
| FVREN | 7 | Fixed Voltage Reference Enable |
| FVRRDY | 6 | Fixed Voltage Reference Ready Flag |
| TSEN | 5 | |
| TSRNG | 4 | |
| CDAFVR1 | 3 | Comparator and D/A Converter Fixed Voltage Reference Selection |
| CDAFVR0 | 2 | Comparator and D/A Converter Fixed Voltage Reference Selection |
| ADFVR1 | 1 | A/D Converter Fixed Voltage Reference Selection |
| ADFVR0 | 0 | A/D Converter Fixed Voltage Reference Selection |
DAC Digital-to-analog converter
DACCON0Voltage Reference Control Register 0
- Address
0x118- Reset
x (not fixed at power-on)- Access
- read/write
- 7DACEN
- 6–
- 5DACOE1
- 4DACOE2
- 3DACPSS1
- 2DACPSS0
- 1–
- 0DACNSS
6 fields
| Field | Bits | What it does |
|---|---|---|
| DACEN | 7 | DAC 1 Enable bit |
| DACOE1 | 5 | DAC1 Voltage Output Enable bit |
| DACOE2 | 4 | |
| DACPSS1 | 3 | DAC1 Positive Source Select bits |
| DACPSS0 | 2 | DAC1 Positive Source Select bits |
| DACNSS | 0 | DAC1 Negative Source Select bits |
DACCON1Voltage Reference Control Register 1
- Address
0x119- Reset
0x00- Access
- read/write
- 7DACR7
- 6DACR6
- 5DACR5
- 4DACR4
- 3DACR3
- 2DACR2
- 1DACR1
- 0DACR0
8 fields
| Field | Bits | What it does |
|---|---|---|
| DACR7 | 7 | |
| DACR6 | 6 | |
| DACR5 | 5 | |
| DACR4 | 4 | DAC1 Voltage Output Select bits |
| DACR3 | 3 | DAC1 Voltage Output Select bits |
| DACR2 | 2 | DAC1 Voltage Output Select bits |
| DACR1 | 1 | DAC1 Voltage Output Select bits |
| DACR0 | 0 | DAC1 Voltage Output Select bits |
PORTS I/O port control
APFCONAlternate Pin Function Control Register
- Address
0x11D- Reset
0x00- Access
- read/write
- 7C2OUTSEL
- 6CCP1SEL
- 5SDOSEL
- 4SCKSEL
- 3SDISEL
- 2TXSEL
- 1RXSEL
- 0CCP2SEL
8 fields
| Field | Bits | What it does |
|---|---|---|
| C2OUTSEL | 7 | |
| CCP1SEL | 6 | |
| SDOSEL | 5 | |
| SCKSEL | 4 | |
| SDISEL | 3 | |
| TXSEL | 2 | |
| RXSEL | 1 | |
| CCP2SEL | 0 |
NVM Data EEPROM and flash program memory
EEADRL
- Address
0x191- Reset
0x00- Access
- read/write
- 7EEADRL7
- 6EEADRL6
- 5EEADRL5
- 4EEADRL4
- 3EEADRL3
- 2EEADRL2
- 1EEADRL1
- 0EEADRL0
1 field
| Field | Bits | What it does |
|---|---|---|
| EEADRL | 7:0 |
EEADRH
- Address
0x192- Reset
0x80- Access
- read/write
- 7–
- 6EEADRH6
- 5EEADRH5
- 4EEADRH4
- 3EEADRH3
- 2EEADRH2
- 1EEADRH1
- 0EEADRH0
1 field
| Field | Bits | What it does |
|---|---|---|
| EEADRH | 6:0 |
EEDATL
- Address
0x193- Reset
x (not fixed at power-on)- Access
- read/write
- 7EEDATL7
- 6EEDATL6
- 5EEDATL5
- 4EEDATL4
- 3EEDATL3
- 2EEDATL2
- 1EEDATL1
- 0EEDATL0
1 field
| Field | Bits | What it does |
|---|---|---|
| EEDATL | 7:0 |
EEDATH
- Address
0x194- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5EEDATH5
- 4EEDATH4
- 3EEDATH3
- 2EEDATH2
- 1EEDATH1
- 0EEDATH0
1 field
| Field | Bits | What it does |
|---|---|---|
| EEDATH | 5:0 |
EECON1
- Address
0x195- Reset
x (not fixed at power-on)- Access
- read/write
- 7EEPGD
- 6CFGS
- 5LWLO
- 4FREE
- 3WRERR
- 2WREN
- 1WR
- 0RD
8 fields
| Field | Bits | What it does |
|---|---|---|
| EEPGD | 7 | FLASH Program / Data EEPROM Memory Select bit |
| CFGS | 6 | FLASH Program / Data EEPROM or Configuration Select bit |
| LWLO | 5 | Load Write Latches Only bit |
| FREE | 4 | Program FLASH Erase Enable bit |
| WRERR | 3 | Sequence Error Flag bit |
| WREN | 2 | Program/Erase Enable bit |
| WR | 1 | Write Control bit |
| RD | 0 | Read Control bit |
EECON2
- Address
0x196- Reset
0x00- Access
- write only
- 7EECON27
- 6EECON26
- 5EECON25
- 4EECON24
- 3EECON23
- 2EECON22
- 1EECON21
- 0EECON20
1 field
| Field | Bits | What it does |
|---|---|---|
| EECON2 | 7:0 |
EUSART USART
RC1REG
- Address
0x199- Reset
0x00- Access
- read only
- 7RC1REG7
- 6RC1REG6
- 5RC1REG5
- 4RC1REG4
- 3RC1REG3
- 2RC1REG2
- 1RC1REG1
- 0RC1REG0
1 field
| Field | Bits | What it does |
|---|---|---|
| RC1REG | 7:0 |
TX1REG
- Address
0x19A- Reset
0x00- Access
- read/write
- 7TX1REG7
- 6TX1REG6
- 5TX1REG5
- 4TX1REG4
- 3TX1REG3
- 2TX1REG2
- 1TX1REG1
- 0TX1REG0
1 field
| Field | Bits | What it does |
|---|---|---|
| TX1REG | 7:0 |
SP1BRGL
- Address
0x19B- Reset
0x00- Access
- read/write
- 7SP1BRGL7
- 6SP1BRGL6
- 5SP1BRGL5
- 4SP1BRGL4
- 3SP1BRGL3
- 2SP1BRGL2
- 1SP1BRGL1
- 0SP1BRGL0
1 field
| Field | Bits | What it does |
|---|---|---|
| SP1BRGL | 7:0 |
SP1BRGH
- Address
0x19C- Reset
0x00- Access
- read/write
- 7SP1BRGH7
- 6SP1BRGH6
- 5SP1BRGH5
- 4SP1BRGH4
- 3SP1BRGH3
- 2SP1BRGH2
- 1SP1BRGH1
- 0SP1BRGH0
1 field
| Field | Bits | What it does |
|---|---|---|
| SP1BRGH | 7:0 |
RC1STA
- Address
0x19D- Reset
0x00- Access
- read/write
- 7SPEN
- 6RX9
- 5SREN
- 4CREN
- 3ADDEN
- 2FERR
- 1OERR
- 0RX9D
8 fields
| Field | Bits | What it does |
|---|---|---|
| SPEN | 7 | |
| RX9 | 6 | |
| SREN | 5 | |
| CREN | 4 | |
| ADDEN | 3 | |
| FERR | 2 | |
| OERR | 1 | |
| RX9D | 0 |
TX1STA
- Address
0x19E- Reset
0x02- Access
- read/write
- 7CSRC
- 6TX9
- 5TXEN
- 4SYNC
- 3SENDB
- 2BRGH
- 1TRMT
- 0TX9D
8 fields
| Field | Bits | What it does |
|---|---|---|
| CSRC | 7 | |
| TX9 | 6 | |
| TXEN | 5 | |
| SYNC | 4 | |
| SENDB | 3 | |
| BRGH | 2 | |
| TRMT | 1 | |
| TX9D | 0 |
BAUD1CON
- Address
0x19F- Reset
0x40- Access
- read/write
- 7ABDOVF
- 6RCIDL
- 5–
- 4SCKP
- 3BRG16
- 2–
- 1WUE
- 0ABDEN
6 fields
| Field | Bits | What it does |
|---|---|---|
| ABDOVF | 7 | |
| RCIDL | 6 | |
| SCKP | 4 | |
| BRG16 | 3 | |
| WUE | 1 | |
| ABDEN | 0 |
MSSP Master synchronous serial port (SPI, I²C)
SSPBUF
- Address
0x211- Reset
x (not fixed at power-on)- Access
- read/write
- 7SSPBUF7
- 6SSPBUF6
- 5SSPBUF5
- 4SSPBUF4
- 3SSPBUF3
- 2SSPBUF2
- 1SSPBUF1
- 0SSPBUF0
1 field
| Field | Bits | What it does |
|---|---|---|
| SSPBUF | 7:0 |
SSPADD
- Address
0x212- Reset
0x00- Access
- read/write
- 7SSPADD7
- 6SSPADD6
- 5SSPADD5
- 4SSPADD4
- 3SSPADD3
- 2SSPADD2
- 1SSPADD1
- 0SSPADD0
1 field
| Field | Bits | What it does |
|---|---|---|
| SSPADD | 7:0 |
SSPMSK
- Address
0x213- Reset
0xFF- Access
- read/write
- 7SSPMSK7
- 6SSPMSK6
- 5SSPMSK5
- 4SSPMSK4
- 3SSPMSK3
- 2SSPMSK2
- 1SSPMSK1
- 0SSPMSK0
1 field
| Field | Bits | What it does |
|---|---|---|
| SSPMSK | 7:0 |
SSPSTAT
- Address
0x214- Reset
0x00- Access
- read/write
- 7SMP
- 6CKE
- 5D/nA
- 4P
- 3S
- 2R/nW
- 1UA
- 0BF
8 fields
| Field | Bits | What it does |
|---|---|---|
| SMP | 7 | |
| CKE | 6 | |
| D/nA | 5 | |
| P | 4 | |
| S | 3 | |
| R/nW | 2 | |
| UA | 1 | |
| BF | 0 |
SSPCON1
- Address
0x215- Reset
0x00- Access
- read/write
- 7WCOL
- 6SSPOV
- 5SSPEN
- 4CKP
- 3SSPM3
- 2SSPM2
- 1SSPM1
- 0SSPM0
8 fields
| Field | Bits | What it does |
|---|---|---|
| WCOL | 7 | |
| SSPOV | 6 | |
| SSPEN | 5 | |
| CKP | 4 | |
| SSPM3 | 3 | |
| SSPM2 | 2 | |
| SSPM1 | 1 | |
| SSPM0 | 0 |
SSPCON2
- Address
0x216- Reset
0x00- Access
- read/write
- 7GCEN
- 6ACKSTAT
- 5ACKDT
- 4ACKEN
- 3RCEN
- 2PEN
- 1RSEN
- 0SEN
8 fields
| Field | Bits | What it does |
|---|---|---|
| GCEN | 7 | |
| ACKSTAT | 6 | |
| ACKDT | 5 | |
| ACKEN | 4 | |
| RCEN | 3 | |
| PEN | 2 | |
| RSEN | 1 | |
| SEN | 0 |
SSPCON3
- Address
0x217- Reset
0x00- Access
- read/write
- 7ACKTIM
- 6PCIE
- 5SCIE
- 4BOEN
- 3SDAHT
- 2SBCDE
- 1AHEN
- 0DHEN
8 fields
| Field | Bits | What it does |
|---|---|---|
| ACKTIM | 7 | |
| PCIE | 6 | |
| SCIE | 5 | |
| BOEN | 4 | |
| SDAHT | 3 | |
| SBCDE | 2 | |
| AHEN | 1 | |
| DHEN | 0 |
CCP1 Capture/compare/PWM 1
CCPR1L
- Address
0x291- Reset
x (not fixed at power-on)- Access
- read/write
- 7CCPR1L7
- 6CCPR1L6
- 5CCPR1L5
- 4CCPR1L4
- 3CCPR1L3
- 2CCPR1L2
- 1CCPR1L1
- 0CCPR1L0
1 field
| Field | Bits | What it does |
|---|---|---|
| CCPR1L | 7:0 |
CCPR1H
- Address
0x292- Reset
x (not fixed at power-on)- Access
- read/write
- 7CCPR1H7
- 6CCPR1H6
- 5CCPR1H5
- 4CCPR1H4
- 3CCPR1H3
- 2CCPR1H2
- 1CCPR1H1
- 0CCPR1H0
1 field
| Field | Bits | What it does |
|---|---|---|
| CCPR1H | 7:0 |
CCP1CON
- Address
0x293- Reset
0x00- Access
- read/write
- 7P1M1
- 6P1M0
- 5DC1B1
- 4DC1B0
- 3CCP1M3
- 2CCP1M2
- 1CCP1M1
- 0CCP1M0
8 fields
| Field | Bits | What it does |
|---|---|---|
| P1M1 | 7 | |
| P1M0 | 6 | |
| DC1B1 | 5 | |
| DC1B0 | 4 | |
| CCP1M3 | 3 | |
| CCP1M2 | 2 | |
| CCP1M1 | 1 | |
| CCP1M0 | 0 |
CCP2 Capture/compare/PWM 2
CCPR2L
- Address
0x298- Reset
x (not fixed at power-on)- Access
- read/write
- 7CCPR2L7
- 6CCPR2L6
- 5CCPR2L5
- 4CCPR2L4
- 3CCPR2L3
- 2CCPR2L2
- 1CCPR2L1
- 0CCPR2L0
1 field
| Field | Bits | What it does |
|---|---|---|
| CCPR2L | 7:0 |
CCPR2H
- Address
0x299- Reset
x (not fixed at power-on)- Access
- read/write
- 7CCPR2H7
- 6CCPR2H6
- 5CCPR2H5
- 4CCPR2H4
- 3CCPR2H3
- 2CCPR2H2
- 1CCPR2H1
- 0CCPR2H0
1 field
| Field | Bits | What it does |
|---|---|---|
| CCPR2H | 7:0 |
CCP2CON
- Address
0x29A- Reset
0x00- Access
- read/write
- 7P2M1
- 6P2M0
- 5DC2B1
- 4DC2B0
- 3CCP2M3
- 2CCP2M2
- 1CCP2M1
- 0CCP2M0
8 fields
| Field | Bits | What it does |
|---|---|---|
| P2M1 | 7 | |
| P2M0 | 6 | |
| DC2B1 | 5 | |
| DC2B0 | 4 | |
| CCP2M3 | 3 | |
| CCP2M2 | 2 | |
| CCP2M1 | 1 | |
| CCP2M0 | 0 |
IOC Interrupt-on-change
IOCAPInterrupt-On-Change Positive Edge Register
- Address
0x391- Reset
0x00- Access
- read/write
- 7IOCAP7
- 6IOCAP6
- 5IOCAP5
- 4IOCAP4
- 3IOCAP3
- 2IOCAP2
- 1IOCAP1
- 0IOCAP0
8 fields
| Field | Bits | What it does |
|---|---|---|
| IOCAP7 | 7 | |
| IOCAP6 | 6 | |
| IOCAP5 | 5 | |
| IOCAP4 | 4 | |
| IOCAP3 | 3 | |
| IOCAP2 | 2 | |
| IOCAP1 | 1 | |
| IOCAP0 | 0 |
IOCANInterrupt-On-Change Negative Edge Register
- Address
0x392- Reset
0x00- Access
- read/write
- 7IOCAN7
- 6IOCAN6
- 5IOCAN5
- 4IOCAN4
- 3IOCAN3
- 2IOCAN2
- 1IOCAN1
- 0IOCAN0
8 fields
| Field | Bits | What it does |
|---|---|---|
| IOCAN7 | 7 | |
| IOCAN6 | 6 | |
| IOCAN5 | 5 | |
| IOCAN4 | 4 | |
| IOCAN3 | 3 | |
| IOCAN2 | 2 | |
| IOCAN1 | 1 | |
| IOCAN0 | 0 |
IOCAFInterrupt-On-Change Flag Register
- Address
0x393- Reset
0x00- Access
- read/write
- 7IOCAF7
- 6IOCAF6
- 5IOCAF5
- 4IOCAF4
- 3IOCAF3
- 2IOCAF2
- 1IOCAF1
- 0IOCAF0
8 fields
| Field | Bits | What it does |
|---|---|---|
| IOCAF7 | 7 | |
| IOCAF6 | 6 | |
| IOCAF5 | 5 | |
| IOCAF4 | 4 | |
| IOCAF3 | 3 | |
| IOCAF2 | 2 | |
| IOCAF1 | 1 | |
| IOCAF0 | 0 |
IOCBPInterrupt-On-Change Positive Edge Register
- Address
0x394- Reset
0x00- Access
- read/write
- 7IOCBP7
- 6IOCBP6
- 5IOCBP5
- 4IOCBP4
- 3IOCBP3
- 2IOCBP2
- 1IOCBP1
- 0IOCBP0
8 fields
| Field | Bits | What it does |
|---|---|---|
| IOCBP7 | 7 | |
| IOCBP6 | 6 | |
| IOCBP5 | 5 | |
| IOCBP4 | 4 | |
| IOCBP3 | 3 | |
| IOCBP2 | 2 | |
| IOCBP1 | 1 | |
| IOCBP0 | 0 |
IOCBNInterrupt-On-Change Negative Edge Register
- Address
0x395- Reset
0x00- Access
- read/write
- 7IOCBN7
- 6IOCBN6
- 5IOCBN5
- 4IOCBN4
- 3IOCBN3
- 2IOCBN2
- 1IOCBN1
- 0IOCBN0
8 fields
| Field | Bits | What it does |
|---|---|---|
| IOCBN7 | 7 | |
| IOCBN6 | 6 | |
| IOCBN5 | 5 | |
| IOCBN4 | 4 | |
| IOCBN3 | 3 | |
| IOCBN2 | 2 | |
| IOCBN1 | 1 | |
| IOCBN0 | 0 |
IOCBFInterrupt-On-Change Flag Register
- Address
0x396- Reset
0x00- Access
- read/write
- 7IOCBF7
- 6IOCBF6
- 5IOCBF5
- 4IOCBF4
- 3IOCBF3
- 2IOCBF2
- 1IOCBF1
- 0IOCBF0
8 fields
| Field | Bits | What it does |
|---|---|---|
| IOCBF7 | 7 | |
| IOCBF6 | 6 | |
| IOCBF5 | 5 | |
| IOCBF4 | 4 | |
| IOCBF3 | 3 | |
| IOCBF2 | 2 | |
| IOCBF1 | 1 | |
| IOCBF0 | 0 |
IOCCP
- Address
0x397- Reset
0x00- Access
- read/write
- 7IOCCP7
- 6IOCCP6
- 5IOCCP5
- 4IOCCP4
- 3IOCCP3
- 2IOCCP2
- 1IOCCP1
- 0IOCCP0
8 fields
| Field | Bits | What it does |
|---|---|---|
| IOCCP7 | 7 | |
| IOCCP6 | 6 | |
| IOCCP5 | 5 | |
| IOCCP4 | 4 | |
| IOCCP3 | 3 | |
| IOCCP2 | 2 | |
| IOCCP1 | 1 | |
| IOCCP0 | 0 |
IOCCN
- Address
0x398- Reset
0x00- Access
- read/write
- 7IOCCN7
- 6IOCCN6
- 5IOCCN5
- 4IOCCN4
- 3IOCCN3
- 2IOCCN2
- 1IOCCN1
- 0IOCCN0
8 fields
| Field | Bits | What it does |
|---|---|---|
| IOCCN7 | 7 | |
| IOCCN6 | 6 | |
| IOCCN5 | 5 | |
| IOCCN4 | 4 | |
| IOCCN3 | 3 | |
| IOCCN2 | 2 | |
| IOCCN1 | 1 | |
| IOCCN0 | 0 |
IOCCF
- Address
0x399- Reset
0x00- Access
- read/write
- 7IOCCF7
- 6IOCCF6
- 5IOCCF5
- 4IOCCF4
- 3IOCCF3
- 2IOCCF2
- 1IOCCF1
- 0IOCCF0
8 fields
| Field | Bits | What it does |
|---|---|---|
| IOCCF7 | 7 | |
| IOCCF6 | 6 | |
| IOCCF5 | 5 | |
| IOCCF4 | 4 | |
| IOCCF3 | 3 | |
| IOCCF2 | 2 | |
| IOCCF1 | 1 | |
| IOCCF0 | 0 |
IOCEP
- Address
0x39D- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3IOCEP3
- 2–
- 1–
- 0–
1 field
| Field | Bits | What it does |
|---|---|---|
| IOCEP3 | 3 |
IOCEN
- Address
0x39E- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3IOCEN3
- 2–
- 1–
- 0–
1 field
| Field | Bits | What it does |
|---|---|---|
| IOCEN3 | 3 |
IOCEF
- Address
0x39F- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3IOCEF3
- 2–
- 1–
- 0–
1 field
| Field | Bits | What it does |
|---|---|---|
| IOCEF3 | 3 |
SFR Other special function registers
OPA1CON
- Address
0x511- Reset
0x00- Access
- read/write
- 7OPA1EN
- 6OPA1SP
- 5–
- 4–
- 3–
- 2–
- 1OPA1CH1
- 0OPA1CH0
4 fields
| Field | Bits | What it does |
|---|---|---|
| OPA1EN | 7 | |
| OPA1SP | 6 | |
| OPA1CH1 | 1 | |
| OPA1CH0 | 0 |
OPA2CON
- Address
0x513- Reset
0x00- Access
- read/write
- 7OPA2EN
- 6OPA2SP
- 5–
- 4–
- 3–
- 2–
- 1OPA2CH1
- 0OPA2CH0
4 fields
| Field | Bits | What it does |
|---|---|---|
| OPA2EN | 7 | |
| OPA2SP | 6 | |
| OPA2CH1 | 1 | |
| OPA2CH0 | 0 |
PSMC1 Programmable switch-mode control 1
PSMC1CON
- Address
0x811- Reset
0x00- Access
- read/write
- 7PSMC1EN
- 6PSMC1LD
- 5P1DBFE
- 4P1DBRE
- 3P1MODE3
- 2P1MODE2
- 1P1MODE1
- 0P1MODE0
5 fields
| Field | Bits | What it does |
|---|---|---|
| PSMC1EN | 7 | |
| PSMC1LD | 6 | |
| P1DBFE | 5 | |
| P1DBRE | 4 | |
| P1MODE | 3:0 |
PSMC1MDL
- Address
0x812- Reset
0x00- Access
- read/write
- 7P1MDLEN
- 6P1MDLPOL
- 5P1MDLBIT
- 4–
- 3P1MSRC3
- 2P1MSRC2
- 1P1MSRC1
- 0P1MSRC0
4 fields
| Field | Bits | What it does |
|---|---|---|
| P1MDLEN | 7 | |
| P1MDLPOL | 6 | |
| P1MDLBIT | 5 | |
| P1MSRC | 3:0 |
PSMC1SYNC
- Address
0x813- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2–
- 1P1SYNC1
- 0P1SYNC0
2 fields
| Field | Bits | What it does |
|---|---|---|
| P1SYNC1 | 1 | |
| P1SYNC0 | 0 |
PSMC1CLK
- Address
0x814- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5P1CPRE1
- 4P1CPRE0
- 3–
- 2–
- 1P1CSRC1
- 0P1CSRC0
2 fields
| Field | Bits | What it does |
|---|---|---|
| P1CPRE | 5:4 | |
| P1CSRC | 1:0 |
PSMC1OEN
- Address
0x815- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5P1OEF
- 4P1OEE
- 3P1OED
- 2P1OEC
- 1P1OEB
- 0P1OEA
6 fields
| Field | Bits | What it does |
|---|---|---|
| P1OEF | 5 | |
| P1OEE | 4 | |
| P1OED | 3 | |
| P1OEC | 2 | |
| P1OEB | 1 | |
| P1OEA | 0 |
PSMC1POL
- Address
0x816- Reset
0x00- Access
- read/write
- 7–
- 6P1INPOL
- 5P1POLF
- 4P1POLE
- 3P1POLD
- 2P1POLC
- 1P1POLB
- 0P1POLA
7 fields
| Field | Bits | What it does |
|---|---|---|
| P1INPOL | 6 | |
| P1POLF | 5 | |
| P1POLE | 4 | |
| P1POLD | 3 | |
| P1POLC | 2 | |
| P1POLB | 1 | |
| P1POLA | 0 |
PSMC1BLNK
- Address
0x817- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5P1FEBM1
- 4P1FEBM0
- 3–
- 2–
- 1P1REBM1
- 0P1REBM0
2 fields
| Field | Bits | What it does |
|---|---|---|
| P1FEBM | 5:4 | |
| P1REBM | 1:0 |
PSMC1REBS
- Address
0x818- Reset
0x00- Access
- read/write
- 7P1REBSIN
- 6–
- 5–
- 4–
- 3P1REBSC3
- 2P1REBSC2
- 1P1REBSC1
- 0–
4 fields
| Field | Bits | What it does |
|---|---|---|
| P1REBSIN | 7 | |
| P1REBSC3 | 3 | |
| P1REBSC2 | 2 | |
| P1REBSC1 | 1 |
PSMC1FEBS
- Address
0x819- Reset
0x00- Access
- read/write
- 7P1FEBSIN
- 6–
- 5–
- 4–
- 3P1FEBSC3
- 2P1FEBSC2
- 1P1FEBSC1
- 0–
4 fields
| Field | Bits | What it does |
|---|---|---|
| P1FEBSIN | 7 | |
| P1FEBSC3 | 3 | |
| P1FEBSC2 | 2 | |
| P1FEBSC1 | 1 |
PSMC1PHS
- Address
0x81A- Reset
0x00- Access
- read/write
- 7P1PHSIN
- 6–
- 5–
- 4–
- 3P1PHSC3
- 2P1PHSC2
- 1P1PHSC1
- 0P1PHST
5 fields
| Field | Bits | What it does |
|---|---|---|
| P1PHSIN | 7 | |
| P1PHSC3 | 3 | |
| P1PHSC2 | 2 | |
| P1PHSC1 | 1 | |
| P1PHST | 0 |
PSMC1DCS
- Address
0x81B- Reset
0x00- Access
- read/write
- 7P1DCSIN
- 6–
- 5–
- 4–
- 3P1DCSC3
- 2P1DCSC2
- 1P1DCSC1
- 0P1DCST
5 fields
| Field | Bits | What it does |
|---|---|---|
| P1DCSIN | 7 | |
| P1DCSC3 | 3 | |
| P1DCSC2 | 2 | |
| P1DCSC1 | 1 | |
| P1DCST | 0 |
PSMC1PRS
- Address
0x81C- Reset
0x00- Access
- read/write
- 7P1PRSIN
- 6–
- 5–
- 4–
- 3P1PRSC3
- 2P1PRSC2
- 1P1PRSC1
- 0P1PRST
5 fields
| Field | Bits | What it does |
|---|---|---|
| P1PRSIN | 7 | |
| P1PRSC3 | 3 | |
| P1PRSC2 | 2 | |
| P1PRSC1 | 1 | |
| P1PRST | 0 |
PSMC1ASDC
- Address
0x81D- Reset
0x00- Access
- read/write
- 7P1ASE
- 6P1ASDEN
- 5P1ARSEN
- 4–
- 3–
- 2–
- 1–
- 0P1ASDOV
4 fields
| Field | Bits | What it does |
|---|---|---|
| P1ASE | 7 | |
| P1ASDEN | 6 | |
| P1ARSEN | 5 | |
| P1ASDOV | 0 |
PSMC1ASDL
- Address
0x81E- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5P1ASDLF
- 4P1ASDLE
- 3P1ASDLD
- 2P1ASDLC
- 1P1ASDLB
- 0P1ASDLA
6 fields
| Field | Bits | What it does |
|---|---|---|
| P1ASDLF | 5 | |
| P1ASDLE | 4 | |
| P1ASDLD | 3 | |
| P1ASDLC | 2 | |
| P1ASDLB | 1 | |
| P1ASDLA | 0 |
PSMC1ASDS
- Address
0x81F- Reset
0x00- Access
- read/write
- 7P1ASDSIN
- 6–
- 5–
- 4–
- 3P1ASDSC3
- 2P1ASDSC2
- 1P1ASDSC1
- 0–
4 fields
| Field | Bits | What it does |
|---|---|---|
| P1ASDSIN | 7 | |
| P1ASDSC3 | 3 | |
| P1ASDSC2 | 2 | |
| P1ASDSC1 | 1 |
PSMC1INT
- Address
0x820- Reset
0x00- Access
- read/write
- 7P1TOVIE
- 6P1TPHIE
- 5P1TDCIE
- 4P1TPRIE
- 3P1TOVIF
- 2P1TPHIF
- 1P1TDCIF
- 0P1TPRIF
8 fields
| Field | Bits | What it does |
|---|---|---|
| P1TOVIE | 7 | |
| P1TPHIE | 6 | |
| P1TDCIE | 5 | |
| P1TPRIE | 4 | |
| P1TOVIF | 3 | |
| P1TPHIF | 2 | |
| P1TDCIF | 1 | |
| P1TPRIF | 0 |
PSMC1PHL
- Address
0x821- Reset
0x00- Access
- read/write
- 7PSMC1PH7
- 6PSMC1PH6
- 5PSMC1PH5
- 4PSMC1PH4
- 3PSMC1PH3
- 2PSMC1PH2
- 1PSMC1PH1
- 0PSMC1PH0
8 fields
| Field | Bits | What it does |
|---|---|---|
| PSMC1PH7 | 7 | |
| PSMC1PH6 | 6 | |
| PSMC1PH5 | 5 | |
| PSMC1PH4 | 4 | |
| PSMC1PH3 | 3 | |
| PSMC1PH2 | 2 | |
| PSMC1PH1 | 1 | |
| PSMC1PH0 | 0 |
PSMC1PHH
- Address
0x822- Reset
0x00- Access
- read/write
- 7PSMC1PH15
- 6PSMC1PH14
- 5PSMC1PH13
- 4PSMC1PH12
- 3PSMC1PH11
- 2PSMC1PH10
- 1PSMC1PH9
- 0PSMC1PH8
8 fields
| Field | Bits | What it does |
|---|---|---|
| PSMC1PH15 | 7 | |
| PSMC1PH14 | 6 | |
| PSMC1PH13 | 5 | |
| PSMC1PH12 | 4 | |
| PSMC1PH11 | 3 | |
| PSMC1PH10 | 2 | |
| PSMC1PH9 | 1 | |
| PSMC1PH8 | 0 |
PSMC1DCL
- Address
0x823- Reset
0x00- Access
- read/write
- 7PSMC1DC7
- 6PSMC1DC6
- 5PSMC1DC5
- 4PSMC1DC4
- 3PSMC1DC3
- 2PSMC1DC2
- 1PSMC1DC1
- 0PSMC1DC0
8 fields
| Field | Bits | What it does |
|---|---|---|
| PSMC1DC7 | 7 | |
| PSMC1DC6 | 6 | |
| PSMC1DC5 | 5 | |
| PSMC1DC4 | 4 | |
| PSMC1DC3 | 3 | |
| PSMC1DC2 | 2 | |
| PSMC1DC1 | 1 | |
| PSMC1DC0 | 0 |
PSMC1DCH
- Address
0x824- Reset
0x00- Access
- read/write
- 7PSMC1DC15
- 6PSMC1DC14
- 5PSMC1DC13
- 4PSMC1DC12
- 3PSMC1DC11
- 2PSMC1DC10
- 1PSMC1DC9
- 0PSMC1DC8
8 fields
| Field | Bits | What it does |
|---|---|---|
| PSMC1DC15 | 7 | |
| PSMC1DC14 | 6 | |
| PSMC1DC13 | 5 | |
| PSMC1DC12 | 4 | |
| PSMC1DC11 | 3 | |
| PSMC1DC10 | 2 | |
| PSMC1DC9 | 1 | |
| PSMC1DC8 | 0 |
PSMC1PRL
- Address
0x825- Reset
0x00- Access
- read/write
- 7PSMC1PR7
- 6PSMC1PR6
- 5PSMC1PR5
- 4PSMC1PR4
- 3PSMC1PR3
- 2PSMC1PR2
- 1PSMC1PR1
- 0PSMC1PR0
8 fields
| Field | Bits | What it does |
|---|---|---|
| PSMC1PR7 | 7 | |
| PSMC1PR6 | 6 | |
| PSMC1PR5 | 5 | |
| PSMC1PR4 | 4 | |
| PSMC1PR3 | 3 | |
| PSMC1PR2 | 2 | |
| PSMC1PR1 | 1 | |
| PSMC1PR0 | 0 |
PSMC1PRH
- Address
0x826- Reset
0x00- Access
- read/write
- 7PSMC1PR15
- 6PSMC1PR14
- 5PSMC1PR13
- 4PSMC1PR12
- 3PSMC1PR11
- 2PSMC1PR10
- 1PSMC1PR9
- 0PSMC1PR8
8 fields
| Field | Bits | What it does |
|---|---|---|
| PSMC1PR15 | 7 | |
| PSMC1PR14 | 6 | |
| PSMC1PR13 | 5 | |
| PSMC1PR12 | 4 | |
| PSMC1PR11 | 3 | |
| PSMC1PR10 | 2 | |
| PSMC1PR9 | 1 | |
| PSMC1PR8 | 0 |
PSMC1TMRL
- Address
0x827- Reset
0x01- Access
- read/write
- 7PSMC1TMR7
- 6PSMC1TMR6
- 5PSMC1TMR5
- 4PSMC1TMR4
- 3PSMC1TMR3
- 2PSMC1TMR2
- 1PSMC1TMR1
- 0PSMC1TMR0
8 fields
| Field | Bits | What it does |
|---|---|---|
| PSMC1TMR7 | 7 | |
| PSMC1TMR6 | 6 | |
| PSMC1TMR5 | 5 | |
| PSMC1TMR4 | 4 | |
| PSMC1TMR3 | 3 | |
| PSMC1TMR2 | 2 | |
| PSMC1TMR1 | 1 | |
| PSMC1TMR0 | 0 |
PSMC1TMRH
- Address
0x828- Reset
0x00- Access
- read/write
- 7PSMC1TMR15
- 6PSMC1TMR14
- 5PSMC1TMR13
- 4PSMC1TMR12
- 3PSMC1TMR11
- 2PSMC1TMR10
- 1PSMC1TMR9
- 0PSMC1TMR8
8 fields
| Field | Bits | What it does |
|---|---|---|
| PSMC1TMR15 | 7 | |
| PSMC1TMR14 | 6 | |
| PSMC1TMR13 | 5 | |
| PSMC1TMR12 | 4 | |
| PSMC1TMR11 | 3 | |
| PSMC1TMR10 | 2 | |
| PSMC1TMR9 | 1 | |
| PSMC1TMR8 | 0 |
PSMC1DBR
- Address
0x829- Reset
0x00- Access
- read/write
- 7PSMC1DBR7
- 6PSMC1DBR6
- 5PSMC1DBR5
- 4PSMC1DBR4
- 3PSMC1DBR3
- 2PSMC1DBR2
- 1PSMC1DBR1
- 0PSMC1DBR0
8 fields
| Field | Bits | What it does |
|---|---|---|
| PSMC1DBR7 | 7 | |
| PSMC1DBR6 | 6 | |
| PSMC1DBR5 | 5 | |
| PSMC1DBR4 | 4 | |
| PSMC1DBR3 | 3 | |
| PSMC1DBR2 | 2 | |
| PSMC1DBR1 | 1 | |
| PSMC1DBR0 | 0 |
PSMC1DBF
- Address
0x82A- Reset
0x00- Access
- read/write
- 7PSMC1DBF7
- 6PSMC1DBF6
- 5PSMC1DBF5
- 4PSMC1DBF4
- 3PSMC1DBF3
- 2PSMC1DBF2
- 1PSMC1DBF1
- 0PSMC1DBF0
8 fields
| Field | Bits | What it does |
|---|---|---|
| PSMC1DBF7 | 7 | |
| PSMC1DBF6 | 6 | |
| PSMC1DBF5 | 5 | |
| PSMC1DBF4 | 4 | |
| PSMC1DBF3 | 3 | |
| PSMC1DBF2 | 2 | |
| PSMC1DBF1 | 1 | |
| PSMC1DBF0 | 0 |
PSMC1BLKR
- Address
0x82B- Reset
0x00- Access
- read/write
- 7PSMC1BLKR7
- 6PSMC1BLKR6
- 5PSMC1BLKR5
- 4PSMC1BLKR4
- 3PSMC1BLKR3
- 2PSMC1BLKR2
- 1PSMC1BLKR1
- 0PSMC1BLKR0
8 fields
| Field | Bits | What it does |
|---|---|---|
| PSMC1BLKR7 | 7 | |
| PSMC1BLKR6 | 6 | |
| PSMC1BLKR5 | 5 | |
| PSMC1BLKR4 | 4 | |
| PSMC1BLKR3 | 3 | |
| PSMC1BLKR2 | 2 | |
| PSMC1BLKR1 | 1 | |
| PSMC1BLKR0 | 0 |
PSMC1BLKF
- Address
0x82C- Reset
0x00- Access
- read/write
- 7PSMC1BLKF7
- 6PSMC1BLKF6
- 5PSMC1BLKF5
- 4PSMC1BLKF4
- 3PSMC1BLKF3
- 2PSMC1BLKF2
- 1PSMC1BLKF1
- 0PSMC1BLKF0
8 fields
| Field | Bits | What it does |
|---|---|---|
| PSMC1BLKF7 | 7 | |
| PSMC1BLKF6 | 6 | |
| PSMC1BLKF5 | 5 | |
| PSMC1BLKF4 | 4 | |
| PSMC1BLKF3 | 3 | |
| PSMC1BLKF2 | 2 | |
| PSMC1BLKF1 | 1 | |
| PSMC1BLKF0 | 0 |
PSMC1FFA
- Address
0x82D- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3PSMC1FFA3
- 2PSMC1FFA2
- 1PSMC1FFA1
- 0PSMC1FFA0
4 fields
| Field | Bits | What it does |
|---|---|---|
| PSMC1FFA3 | 3 | |
| PSMC1FFA2 | 2 | |
| PSMC1FFA1 | 1 | |
| PSMC1FFA0 | 0 |
PSMC1STR0
- Address
0x82E- Reset
0x01- Access
- read/write
- 7–
- 6–
- 5P1STRF
- 4P1STRE
- 3P1STRD
- 2P1STRC
- 1P1STRB
- 0P1STRA
6 fields
| Field | Bits | What it does |
|---|---|---|
| P1STRF | 5 | |
| P1STRE | 4 | |
| P1STRD | 3 | |
| P1STRC | 2 | |
| P1STRB | 1 | |
| P1STRA | 0 |
PSMC1STR1
- Address
0x82F- Reset
0x00- Access
- read/write
- 7P1SSYNC
- 6–
- 5–
- 4–
- 3–
- 2–
- 1P1LSMEN
- 0P1HSMEN
3 fields
| Field | Bits | What it does |
|---|---|---|
| P1SSYNC | 7 | |
| P1LSMEN | 1 | |
| P1HSMEN | 0 |
PSMC2 Programmable switch-mode control 2
PSMC2CON
- Address
0x831- Reset
0x00- Access
- read/write
- 7PSMC2EN
- 6PSMC2LD
- 5P2DBFE
- 4P2DBRE
- 3P2MODE3
- 2P2MODE2
- 1P2MODE1
- 0P2MODE0
5 fields
| Field | Bits | What it does |
|---|---|---|
| PSMC2EN | 7 | |
| PSMC2LD | 6 | |
| P2DBFE | 5 | |
| P2DBRE | 4 | |
| P2MODE | 3:0 |
PSMC2MDL
- Address
0x832- Reset
0x00- Access
- read/write
- 7P2MDLEN
- 6P2MDLPOL
- 5P2MDLBIT
- 4–
- 3P2MSRC3
- 2P2MSRC2
- 1P2MSRC1
- 0P2MSRC0
4 fields
| Field | Bits | What it does |
|---|---|---|
| P2MDLEN | 7 | |
| P2MDLPOL | 6 | |
| P2MDLBIT | 5 | |
| P2MSRC | 3:0 |
PSMC2SYNC
- Address
0x833- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2–
- 1P2SYNC1
- 0P2SYNC0
2 fields
| Field | Bits | What it does |
|---|---|---|
| P2SYNC1 | 1 | |
| P2SYNC0 | 0 |
PSMC2CLK
- Address
0x834- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5P2CPRE1
- 4P2CPRE0
- 3–
- 2–
- 1P2CSRC1
- 0P2CSRC0
2 fields
| Field | Bits | What it does |
|---|---|---|
| P2CPRE | 5:4 | |
| P2CSRC | 1:0 |
PSMC2OEN
- Address
0x835- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2–
- 1P2OEB
- 0P2OEA
2 fields
| Field | Bits | What it does |
|---|---|---|
| P2OEB | 1 | |
| P2OEA | 0 |
PSMC2POL
- Address
0x836- Reset
0x00- Access
- read/write
- 7–
- 6P2INPOL
- 5–
- 4–
- 3–
- 2–
- 1P2POLB
- 0P2POLA
3 fields
| Field | Bits | What it does |
|---|---|---|
| P2INPOL | 6 | |
| P2POLB | 1 | |
| P2POLA | 0 |
PSMC2BLNK
- Address
0x837- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5P2FEBM1
- 4P2FEBM0
- 3–
- 2–
- 1P2REBM1
- 0P2REBM0
2 fields
| Field | Bits | What it does |
|---|---|---|
| P2FEBM | 5:4 | |
| P2REBM | 1:0 |
PSMC2REBS
- Address
0x838- Reset
0x00- Access
- read/write
- 7P2REBSIN
- 6–
- 5–
- 4–
- 3P2REBSC3
- 2P2REBSC2
- 1P2REBSC1
- 0–
4 fields
| Field | Bits | What it does |
|---|---|---|
| P2REBSIN | 7 | |
| P2REBSC3 | 3 | |
| P2REBSC2 | 2 | |
| P2REBSC1 | 1 |
PSMC2FEBS
- Address
0x839- Reset
0x00- Access
- read/write
- 7P2FEBSIN
- 6–
- 5–
- 4–
- 3P2FEBSC3
- 2P2FEBSC2
- 1P2FEBSC1
- 0–
4 fields
| Field | Bits | What it does |
|---|---|---|
| P2FEBSIN | 7 | |
| P2FEBSC3 | 3 | |
| P2FEBSC2 | 2 | |
| P2FEBSC1 | 1 |
PSMC2PHS
- Address
0x83A- Reset
0x00- Access
- read/write
- 7P2PHSIN
- 6–
- 5–
- 4–
- 3P2PHSC3
- 2P2PHSC2
- 1P2PHSC1
- 0P2PHST
5 fields
| Field | Bits | What it does |
|---|---|---|
| P2PHSIN | 7 | |
| P2PHSC3 | 3 | |
| P2PHSC2 | 2 | |
| P2PHSC1 | 1 | |
| P2PHST | 0 |
PSMC2DCS
- Address
0x83B- Reset
0x00- Access
- read/write
- 7P2DCSIN
- 6–
- 5–
- 4–
- 3P2DCSC3
- 2P2DCSC2
- 1P2DCSC1
- 0P2DCST
5 fields
| Field | Bits | What it does |
|---|---|---|
| P2DCSIN | 7 | |
| P2DCSC3 | 3 | |
| P2DCSC2 | 2 | |
| P2DCSC1 | 1 | |
| P2DCST | 0 |
PSMC2PRS
- Address
0x83C- Reset
0x00- Access
- read/write
- 7P2PRSIN
- 6–
- 5–
- 4–
- 3P2PRSC3
- 2P2PRSC2
- 1P2PRSC1
- 0P2PRST
5 fields
| Field | Bits | What it does |
|---|---|---|
| P2PRSIN | 7 | |
| P2PRSC3 | 3 | |
| P2PRSC2 | 2 | |
| P2PRSC1 | 1 | |
| P2PRST | 0 |
PSMC2ASDC
- Address
0x83D- Reset
0x00- Access
- read/write
- 7P2ASE
- 6P2ASDEN
- 5P2ARSEN
- 4–
- 3–
- 2–
- 1–
- 0P2ASDOV
4 fields
| Field | Bits | What it does |
|---|---|---|
| P2ASE | 7 | |
| P2ASDEN | 6 | |
| P2ARSEN | 5 | |
| P2ASDOV | 0 |
PSMC2ASDL
- Address
0x83E- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2–
- 1P2ASDLB
- 0P2ASDLA
2 fields
| Field | Bits | What it does |
|---|---|---|
| P2ASDLB | 1 | |
| P2ASDLA | 0 |
PSMC2ASDS
- Address
0x83F- Reset
0x00- Access
- read/write
- 7P2ASDSIN
- 6–
- 5–
- 4–
- 3P2ASDSC3
- 2P2ASDSC2
- 1P2ASDSC1
- 0–
4 fields
| Field | Bits | What it does |
|---|---|---|
| P2ASDSIN | 7 | |
| P2ASDSC3 | 3 | |
| P2ASDSC2 | 2 | |
| P2ASDSC1 | 1 |
PSMC2INT
- Address
0x840- Reset
0x00- Access
- read/write
- 7P2TOVIE
- 6P2TPHIE
- 5P2TDCIE
- 4P2TPRIE
- 3P2TOVIF
- 2P2TPHIF
- 1P2TDCIF
- 0P2TPRIF
8 fields
| Field | Bits | What it does |
|---|---|---|
| P2TOVIE | 7 | |
| P2TPHIE | 6 | |
| P2TDCIE | 5 | |
| P2TPRIE | 4 | |
| P2TOVIF | 3 | |
| P2TPHIF | 2 | |
| P2TDCIF | 1 | |
| P2TPRIF | 0 |
PSMC2PHL
- Address
0x841- Reset
0x00- Access
- read/write
- 7PSMC2PH7
- 6PSMC2PH6
- 5PSMC2PH5
- 4PSMC2PH4
- 3PSMC2PH3
- 2PSMC2PH2
- 1PSMC2PH1
- 0PSMC2PH0
8 fields
| Field | Bits | What it does |
|---|---|---|
| PSMC2PH7 | 7 | |
| PSMC2PH6 | 6 | |
| PSMC2PH5 | 5 | |
| PSMC2PH4 | 4 | |
| PSMC2PH3 | 3 | |
| PSMC2PH2 | 2 | |
| PSMC2PH1 | 1 | |
| PSMC2PH0 | 0 |
PSMC2PHH
- Address
0x842- Reset
0x00- Access
- read/write
- 7PSMC2PH15
- 6PSMC2PH14
- 5PSMC2PH13
- 4PSMC2PH12
- 3PSMC2PH11
- 2PSMC2PH10
- 1PSMC2PH9
- 0PSMC2PH8
8 fields
| Field | Bits | What it does |
|---|---|---|
| PSMC2PH15 | 7 | |
| PSMC2PH14 | 6 | |
| PSMC2PH13 | 5 | |
| PSMC2PH12 | 4 | |
| PSMC2PH11 | 3 | |
| PSMC2PH10 | 2 | |
| PSMC2PH9 | 1 | |
| PSMC2PH8 | 0 |
PSMC2DCL
- Address
0x843- Reset
0x00- Access
- read/write
- 7PSMC2DC7
- 6PSMC2DC6
- 5PSMC2DC5
- 4PSMC2DC4
- 3PSMC2DC3
- 2PSMC2DC2
- 1PSMC2DC1
- 0PSMC2DC0
8 fields
| Field | Bits | What it does |
|---|---|---|
| PSMC2DC7 | 7 | |
| PSMC2DC6 | 6 | |
| PSMC2DC5 | 5 | |
| PSMC2DC4 | 4 | |
| PSMC2DC3 | 3 | |
| PSMC2DC2 | 2 | |
| PSMC2DC1 | 1 | |
| PSMC2DC0 | 0 |
PSMC2DCH
- Address
0x844- Reset
0x00- Access
- read/write
- 7PSMC2DC15
- 6PSMC2DC14
- 5PSMC2DC13
- 4PSMC2DC12
- 3PSMC2DC11
- 2PSMC2DC10
- 1PSMC2DC9
- 0PSMC2DC8
8 fields
| Field | Bits | What it does |
|---|---|---|
| PSMC2DC15 | 7 | |
| PSMC2DC14 | 6 | |
| PSMC2DC13 | 5 | |
| PSMC2DC12 | 4 | |
| PSMC2DC11 | 3 | |
| PSMC2DC10 | 2 | |
| PSMC2DC9 | 1 | |
| PSMC2DC8 | 0 |
PSMC2PRL
- Address
0x845- Reset
0x00- Access
- read/write
- 7PSMC2PR7
- 6PSMC2PR6
- 5PSMC2PR5
- 4PSMC2PR4
- 3PSMC2PR3
- 2PSMC2PR2
- 1PSMC2PR1
- 0PSMC2PR0
8 fields
| Field | Bits | What it does |
|---|---|---|
| PSMC2PR7 | 7 | |
| PSMC2PR6 | 6 | |
| PSMC2PR5 | 5 | |
| PSMC2PR4 | 4 | |
| PSMC2PR3 | 3 | |
| PSMC2PR2 | 2 | |
| PSMC2PR1 | 1 | |
| PSMC2PR0 | 0 |
PSMC2PRH
- Address
0x846- Reset
0x00- Access
- read/write
- 7PSMC2PR15
- 6PSMC2PR14
- 5PSMC2PR13
- 4PSMC2PR12
- 3PSMC2PR11
- 2PSMC2PR10
- 1PSMC2PR9
- 0PSMC2PR8
8 fields
| Field | Bits | What it does |
|---|---|---|
| PSMC2PR15 | 7 | |
| PSMC2PR14 | 6 | |
| PSMC2PR13 | 5 | |
| PSMC2PR12 | 4 | |
| PSMC2PR11 | 3 | |
| PSMC2PR10 | 2 | |
| PSMC2PR9 | 1 | |
| PSMC2PR8 | 0 |
PSMC2TMRL
- Address
0x847- Reset
0x01- Access
- read/write
- 7PSMC2TMR7
- 6PSMC2TMR6
- 5PSMC2TMR5
- 4PSMC2TMR4
- 3PSMC2TMR3
- 2PSMC2TMR2
- 1PSMC2TMR1
- 0PSMC2TMR0
8 fields
| Field | Bits | What it does |
|---|---|---|
| PSMC2TMR7 | 7 | |
| PSMC2TMR6 | 6 | |
| PSMC2TMR5 | 5 | |
| PSMC2TMR4 | 4 | |
| PSMC2TMR3 | 3 | |
| PSMC2TMR2 | 2 | |
| PSMC2TMR1 | 1 | |
| PSMC2TMR0 | 0 |
PSMC2TMRH
- Address
0x848- Reset
0x00- Access
- read/write
- 7PSMC2TMR15
- 6PSMC2TMR14
- 5PSMC2TMR13
- 4PSMC2TMR12
- 3PSMC2TMR11
- 2PSMC2TMR10
- 1PSMC2TMR9
- 0PSMC2TMR8
8 fields
| Field | Bits | What it does |
|---|---|---|
| PSMC2TMR15 | 7 | |
| PSMC2TMR14 | 6 | |
| PSMC2TMR13 | 5 | |
| PSMC2TMR12 | 4 | |
| PSMC2TMR11 | 3 | |
| PSMC2TMR10 | 2 | |
| PSMC2TMR9 | 1 | |
| PSMC2TMR8 | 0 |
PSMC2DBR
- Address
0x849- Reset
0x00- Access
- read/write
- 7PSMC2DBR7
- 6PSMC2DBR6
- 5PSMC2DBR5
- 4PSMC2DBR4
- 3PSMC2DBR3
- 2PSMC2DBR2
- 1PSMC2DBR1
- 0PSMC2DBR0
8 fields
| Field | Bits | What it does |
|---|---|---|
| PSMC2DBR7 | 7 | |
| PSMC2DBR6 | 6 | |
| PSMC2DBR5 | 5 | |
| PSMC2DBR4 | 4 | |
| PSMC2DBR3 | 3 | |
| PSMC2DBR2 | 2 | |
| PSMC2DBR1 | 1 | |
| PSMC2DBR0 | 0 |
PSMC2DBF
- Address
0x84A- Reset
0x00- Access
- read/write
- 7PSMC2DBF7
- 6PSMC2DBF6
- 5PSMC2DBF5
- 4PSMC2DBF4
- 3PSMC2DBF3
- 2PSMC2DBF2
- 1PSMC2DBF1
- 0PSMC2DBF0
8 fields
| Field | Bits | What it does |
|---|---|---|
| PSMC2DBF7 | 7 | |
| PSMC2DBF6 | 6 | |
| PSMC2DBF5 | 5 | |
| PSMC2DBF4 | 4 | |
| PSMC2DBF3 | 3 | |
| PSMC2DBF2 | 2 | |
| PSMC2DBF1 | 1 | |
| PSMC2DBF0 | 0 |
PSMC2BLKR
- Address
0x84B- Reset
0x00- Access
- read/write
- 7PSMC2BLKR7
- 6PSMC2BLKR6
- 5PSMC2BLKR5
- 4PSMC2BLKR4
- 3PSMC2BLKR3
- 2PSMC2BLKR2
- 1PSMC2BLKR1
- 0PSMC2BLKR0
8 fields
| Field | Bits | What it does |
|---|---|---|
| PSMC2BLKR7 | 7 | |
| PSMC2BLKR6 | 6 | |
| PSMC2BLKR5 | 5 | |
| PSMC2BLKR4 | 4 | |
| PSMC2BLKR3 | 3 | |
| PSMC2BLKR2 | 2 | |
| PSMC2BLKR1 | 1 | |
| PSMC2BLKR0 | 0 |
PSMC2BLKF
- Address
0x84C- Reset
0x00- Access
- read/write
- 7PSMC2BLKF7
- 6PSMC2BLKF6
- 5PSMC2BLKF5
- 4PSMC2BLKF4
- 3PSMC2BLKF3
- 2PSMC2BLKF2
- 1PSMC2BLKF1
- 0PSMC2BLKF0
8 fields
| Field | Bits | What it does |
|---|---|---|
| PSMC2BLKF7 | 7 | |
| PSMC2BLKF6 | 6 | |
| PSMC2BLKF5 | 5 | |
| PSMC2BLKF4 | 4 | |
| PSMC2BLKF3 | 3 | |
| PSMC2BLKF2 | 2 | |
| PSMC2BLKF1 | 1 | |
| PSMC2BLKF0 | 0 |
PSMC2FFA
- Address
0x84D- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3PSMC2FFA3
- 2PSMC2FFA2
- 1PSMC2FFA1
- 0PSMC2FFA0
4 fields
| Field | Bits | What it does |
|---|---|---|
| PSMC2FFA3 | 3 | |
| PSMC2FFA2 | 2 | |
| PSMC2FFA1 | 1 | |
| PSMC2FFA0 | 0 |
PSMC2STR0
- Address
0x84E- Reset
0x01- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2–
- 1P2STRB
- 0P2STRA
2 fields
| Field | Bits | What it does |
|---|---|---|
| P2STRB | 1 | |
| P2STRA | 0 |
PSMC2STR1
- Address
0x84F- Reset
0x00- Access
- read/write
- 7P2SSYNC
- 6–
- 5–
- 4–
- 3–
- 2–
- 1P2LSMEN
- 0P2HSMEN
3 fields
| Field | Bits | What it does |
|---|---|---|
| P2SSYNC | 7 | |
| P2LSMEN | 1 | |
| P2HSMEN | 0 |