All 125 registers by peripheral, at their data-memory address as the register file map gives it (bank and offset), with their reset value and every bit.
CPU CPU core
INDF0
Address
0x00
Reset
x (not fixed at power-on)
Access
read/write
7INDF07
6INDF06
5INDF05
4INDF04
3INDF03
2INDF02
1INDF01
0INDF00
1 field
Field
Bits
What it does
INDF0
7:0
INDF1
Address
0x01
Reset
x (not fixed at power-on)
Access
read/write
7INDF17
6INDF16
5INDF15
4INDF14
3INDF13
2INDF12
1INDF11
0INDF10
1 field
Field
Bits
What it does
INDF1
7:0
PCL
Address
0x02
Reset
0x00
Access
read/write
7PCL7
6PCL6
5PCL5
4PCL4
3PCL3
2PCL2
1PCL1
0PCL0
1 field
Field
Bits
What it does
PCL
7:0
STATUS
Address
0x03
Reset
0x18
Access
read/write
7–
6–
5–
4nTO
3nPD
2Z
1DC
0C
5 fields
Field
Bits
What it does
nTO
4
nPD
3
Z
2
DC
1
C
0
FSR0L
Address
0x04
Reset
0x00
Access
read/write
7FSR0L7
6FSR0L6
5FSR0L5
4FSR0L4
3FSR0L3
2FSR0L2
1FSR0L1
0FSR0L0
1 field
Field
Bits
What it does
FSR0L
7:0
FSR0H
Address
0x05
Reset
0x00
Access
read/write
7FSR0H7
6FSR0H6
5FSR0H5
4FSR0H4
3FSR0H3
2FSR0H2
1FSR0H1
0FSR0H0
1 field
Field
Bits
What it does
FSR0H
7:0
FSR1L
Address
0x06
Reset
0x00
Access
read/write
7FSR1L7
6FSR1L6
5FSR1L5
4FSR1L4
3FSR1L3
2FSR1L2
1FSR1L1
0FSR1L0
1 field
Field
Bits
What it does
FSR1L
7:0
FSR1H
Address
0x07
Reset
0x00
Access
read/write
7FSR1H7
6FSR1H6
5FSR1H5
4FSR1H4
3FSR1H3
2FSR1H2
1FSR1H1
0FSR1H0
1 field
Field
Bits
What it does
FSR1H
7:0
BSR
Address
0x08
Reset
0x00
Access
read/write
7–
6–
5–
4BSR4
3BSR3
2BSR2
1BSR1
0BSR0
1 field
Field
Bits
What it does
BSR
4:0
WREG
Address
0x09
Reset
0x00
Access
read/write
7WREG07
6WREG06
5WREG05
4WREG04
3WREG03
2WREG02
1WREG01
0WREG00
1 field
Field
Bits
What it does
WREG0
7:0
PCLATH
Address
0x0A
Reset
0x00
Access
read/write
7–
6PCLATH6
5PCLATH5
4PCLATH4
3PCLATH3
2PCLATH2
1PCLATH1
0PCLATH0
1 field
Field
Bits
What it does
PCLATH
6:0
STATUS_SHAD
Address
0xFE4
Reset
x (not fixed at power-on)
Access
read/write
7–
6–
5–
4–
3–
2Z_SHAD
1DC_SHAD
0C_SHAD
3 fields
Field
Bits
What it does
Z_SHAD
2
DC_SHAD
1
C_SHAD
0
WREG_SHAD
Address
0xFE5
Reset
x (not fixed at power-on)
Access
read/write
7WREG_SHAD7
6WREG_SHAD6
5WREG_SHAD5
4WREG_SHAD4
3WREG_SHAD3
2WREG_SHAD2
1WREG_SHAD1
0WREG_SHAD0
1 field
Field
Bits
What it does
WREG_SHAD
7:0
BSR_SHAD
Address
0xFE6
Reset
x (not fixed at power-on)
Access
read/write
7–
6–
5–
4BSR_SHAD4
3BSR_SHAD3
2BSR_SHAD2
1BSR_SHAD1
0BSR_SHAD0
1 field
Field
Bits
What it does
BSR_SHAD
4:0
PCLATH_SHAD
Address
0xFE7
Reset
x (not fixed at power-on)
Access
read/write
7–
6PCLATH_SHAD6
5PCLATH_SHAD5
4PCLATH_SHAD4
3PCLATH_SHAD3
2PCLATH_SHAD2
1PCLATH_SHAD1
0PCLATH_SHAD0
1 field
Field
Bits
What it does
PCLATH_SHAD
6:0
FSR0L_SHAD
Address
0xFE8
Reset
x (not fixed at power-on)
Access
read/write
7FSR0L_SHAD7
6FSR0L_SHAD6
5FSR0L_SHAD5
4FSR0L_SHAD4
3FSR0L_SHAD3
2FSR0L_SHAD2
1FSR0L_SHAD1
0FSR0L_SHAD0
1 field
Field
Bits
What it does
FSR0L_SHAD
7:0
FSR0H_SHAD
Address
0xFE9
Reset
x (not fixed at power-on)
Access
read/write
7FSR0H_SHAD7
6FSR0H_SHAD6
5FSR0H_SHAD5
4FSR0H_SHAD4
3FSR0H_SHAD3
2FSR0H_SHAD2
1FSR0H_SHAD1
0FSR0H_SHAD0
1 field
Field
Bits
What it does
FSR0H_SHAD
7:0
FSR1L_SHAD
Address
0xFEA
Reset
x (not fixed at power-on)
Access
read/write
7FSR1L_SHAD7
6FSR1L_SHAD6
5FSR1L_SHAD5
4FSR1L_SHAD4
3FSR1L_SHAD3
2FSR1L_SHAD2
1FSR1L_SHAD1
0FSR1L_SHAD0
1 field
Field
Bits
What it does
FSR1L_SHAD
7:0
FSR1H_SHAD
Address
0xFEB
Reset
x (not fixed at power-on)
Access
read/write
7FSR1H_SHAD7
6FSR1H_SHAD6
5FSR1H_SHAD5
4FSR1H_SHAD4
3FSR1H_SHAD3
2FSR1H_SHAD2
1FSR1H_SHAD1
0FSR1H_SHAD0
1 field
Field
Bits
What it does
FSR1H_SHAD
7:0
STKPTRCurrent Stack pointer
Address
0xFED
Reset
0x1F
Access
read/write
7–
6–
5–
4STKPTR4
3STKPTR3
2STKPTR2
1STKPTR1
0STKPTR0
1 field
Field
Bits
What it does
STKPTR
4:0
TOSLTop of Stack Low byte
Address
0xFEE
Reset
x (not fixed at power-on)
Access
read/write
7TOSL7
6TOSL6
5TOSL5
4TOSL4
3TOSL3
2TOSL2
1TOSL1
0TOSL0
1 field
Field
Bits
What it does
TOSL
7:0
TOSHTop of Stack High byte
Address
0xFEF
Reset
x (not fixed at power-on)
Access
read/write
7–
6TOSH6
5TOSH5
4TOSH4
3TOSH3
2TOSH2
1TOSH1
0TOSH0
1 field
Field
Bits
What it does
TOSH
6:0
INTERRUPT Interrupts
INTCON
Address
0x0B
Reset
x (not fixed at power-on)
Access
read/write
7GIE
6PEIE
5TMR0IE
4INTE
3IOCIE
2TMR0IF
1INTF
0IOCIF
8 fields
Field
Bits
What it does
GIE
7
PEIE
6
TMR0IE
5
INTE
4
IOCIE
3
TMR0IF
2
INTF
1
IOCIF
0
PIR1
Address
0x11
Reset
0x00
Access
read/write
7TMR1GIF
6ADIF
5–
4–
3SSP1IF
2–
1TMR2IF
0TMR1IF
5 fields
Field
Bits
What it does
TMR1GIF
7
Timer1 Gate Interrupt Flag bit
ADIF
6
A/D Converter Interrupt Flag bit
SSP1IF
3
TMR2IF
1
TMR2 to PR2 Match Interrupt Flag bit
TMR1IF
0
TMR1 Overflow Interrupt Flag bit
PIR2
Address
0x12
Reset
0x00
Access
read/write
7–
6C2IF
5C1IF
4–
3BCL1IF
2NCO1IF
1–
0–
4 fields
Field
Bits
What it does
C2IF
6
C1IF
5
BCL1IF
3
NCO1IF
2
PIR3
Address
0x13
Reset
0x00
Access
read/write
7–
6–
5–
4–
3–
2–
1CLC2IF
0CLC1IF
2 fields
Field
Bits
What it does
CLC2IF
1
CLC1IF
0
PIE1Peripheral Interrupt Enable Register 1
Address
0x91
Reset
0x00
Access
read/write
7TMR1GIE
6ADIE
5–
4–
3SSP1IE
2–
1TMR2IE
0TMR1IE
5 fields
Field
Bits
What it does
TMR1GIE
7
Timer1 Gate Interrupt Enable bit
ADIE
6
A/D Converter Interrupt Enable bit
SSP1IE
3
TMR2IE
1
TMR2 to PR2 Match Interrupt Enable bit
TMR1IE
0
TMR1 Overflow Interrupt Enable bit
PIE2Peripheral Interrupt Enable Register 2
Address
0x92
Reset
0x00
Access
read/write
7–
6C2IE
5C1IE
4–
3BCL1IE
2NCO1IE
1–
0–
4 fields
Field
Bits
What it does
C2IE
6
C1IE
5
BCL1IE
3
NCO1IE
2
PIE3Peripheral Interrupt Enable Register 3
Address
0x93
Reset
0x00
Access
read/write
7–
6–
5–
4–
3–
2–
1CLC2IE
0CLC1IE
2 fields
Field
Bits
What it does
CLC2IE
1
CLC1IE
0
PORTA I/O port A
PORTA
Address
0x0C
Reset
x (not fixed at power-on)
Access
read/write
7–
6–
5RA5
4RA4
3RA3
2RA2
1RA1
0RA0
6 fields
Field
Bits
What it does
RA5
5
RA4
4
RA3
3
RA2
2
RA1
1
RA0
0
TRISAPORTA Data Direction Control Register
Address
0x8C
Reset
0x3F
Access
read/write
7–
6–
5TRISA5
4TRISA4
3TRISA3
2TRISA2
1TRISA1
0TRISA0
6 fields
Field
Bits
What it does
TRISA5
5
TRISA4
4
TRISA3
3
TRISA2
2
TRISA1
1
TRISA0
0
LATA
Address
0x10C
Reset
x (not fixed at power-on)
Access
read/write
7–
6–
5LATA5
4LATA4
3–
2LATA2
1LATA1
0LATA0
5 fields
Field
Bits
What it does
LATA5
5
LATA4
4
LATA2
2
LATA1
1
LATA0
0
ANSELA
Address
0x18C
Reset
0x17
Access
read/write
7–
6–
5–
4ANSA4
3–
2ANSA2
1ANSA1
0ANSA0
4 fields
Field
Bits
What it does
ANSA4
4
ANSA2
2
ANSA1
1
ANSA0
0
WPUA
Address
0x20C
Reset
0x3F
Access
read/write
7–
6–
5WPUA5
4WPUA4
3WPUA3
2WPUA2
1WPUA1
0WPUA0
6 fields
Field
Bits
What it does
WPUA5
5
WPUA4
4
WPUA3
3
WPUA2
2
WPUA1
1
WPUA0
0
PORTC I/O port C
PORTC
Address
0x0E
Reset
x (not fixed at power-on)
Access
read/write
7–
6–
5RC5
4RC4
3RC3
2RC2
1RC1
0RC0
6 fields
Field
Bits
What it does
RC5
5
RC4
4
RC3
3
RC2
2
RC1
1
RC0
0
TRISCPORTC Data Direction Control Register
Address
0x8E
Reset
0x3F
Access
read/write
7–
6–
5TRISC5
4TRISC4
3TRISC3
2TRISC2
1TRISC1
0TRISC0
6 fields
Field
Bits
What it does
TRISC5
5
TRISC4
4
TRISC3
3
TRISC2
2
TRISC1
1
TRISC0
0
LATC
Address
0x10E
Reset
x (not fixed at power-on)
Access
read/write
7–
6–
5LATC5
4LATC4
3LATC3
2LATC2
1LATC1
0LATC0
6 fields
Field
Bits
What it does
LATC5
5
LATC4
4
LATC3
3
LATC2
2
LATC1
1
LATC0
0
ANSELC
Address
0x18E
Reset
0x0F
Access
read/write
7–
6–
5–
4–
3ANSC3
2ANSC2
1ANSC1
0ANSC0
4 fields
Field
Bits
What it does
ANSC3
3
ANSC2
2
ANSC1
1
ANSC0
0
TMR0 Timer0
TMR0
Address
0x15
Reset
x (not fixed at power-on)
Access
read/write
7TMR07
6TMR06
5TMR05
4TMR04
3TMR03
2TMR02
1TMR01
0TMR00
1 field
Field
Bits
What it does
TMR0
7:0
OPTION_REGOption Register
Address
0x95
Reset
0xFF
Access
read/write
7nWPUEN
6INTEDG
5TMR0CS
4TMR0SE
3PSA
2PS2
1PS1
0PS0
6 fields
Field
Bits
What it does
nWPUEN
7
Weak Pull-up Enable bit
INTEDG
6
Interrupt Edge Select bit
TMR0CS
5
TMR0SE
4
TMR0 Source Edge Select bit
PSA
3
Prescaler Active bit
PS
2:0
TMR1 Timer1
TMR1L
Address
0x16
Reset
x (not fixed at power-on)
Access
read/write
7TMR1L7
6TMR1L6
5TMR1L5
4TMR1L4
3TMR1L3
2TMR1L2
1TMR1L1
0TMR1L0
1 field
Field
Bits
What it does
TMR1L
7:0
TMR1H
Address
0x17
Reset
x (not fixed at power-on)
Access
read/write
7TMR1H7
6TMR1H6
5TMR1H5
4TMR1H4
3TMR1H3
2TMR1H2
1TMR1H1
0TMR1H0
1 field
Field
Bits
What it does
TMR1H
7:0
T1CON
Address
0x18
Reset
0x00
Access
read/write
7TMR1CS1
6TMR1CS0
5T1CKPS1
4T1CKPS0
3T1OSCEN
2nT1SYNC
1–
0TMR1ON
5 fields
Field
Bits
What it does
TMR1CS
7:6
T1CKPS
5:4
T1OSCEN
3
nT1SYNC
2
TMR1ON
0
T1GCON
Address
0x19
Reset
x (not fixed at power-on)
Access
read/write
7TMR1GE
6T1GPOL
5T1GTM
4T1GSPM
3T1GGO_nDONE
2T1GVAL
1T1GSS1
0T1GSS0
7 fields
Field
Bits
What it does
TMR1GE
7
T1GPOL
6
T1GTM
5
T1GSPM
4
T1GGO_nDONE
3
T1GVAL
2
T1GSS
1:0
TMR2 Timer2
TMR2
Address
0x1A
Reset
0x00
Access
read/write
7TMR27
6TMR26
5TMR25
4TMR24
3TMR23
2TMR22
1TMR21
0TMR20
1 field
Field
Bits
What it does
TMR2
7:0
PR2
Address
0x1B
Reset
0xFF
Access
read/write
7PR27
6PR26
5PR25
4PR24
3PR23
2PR22
1PR21
0PR20
1 field
Field
Bits
What it does
PR2
7:0
T2CON
Address
0x1C
Reset
0x00
Access
read/write
7–
6T2OUTPS3
5T2OUTPS2
4T2OUTPS1
3T2OUTPS0
2TMR2ON
1T2CKPS1
0T2CKPS0
3 fields
Field
Bits
What it does
T2OUTPS
6:3
TMR2ON
2
T2CKPS
1:0
OSCILLATOR Oscillator, power control and watchdog
PCONPower Control Register
Address
0x96
Reset
x (not fixed at power-on)
Access
read/write
7STKOVF
6STKUNF
5–
4nRWDT
3nRMCLR
2nRI
1nPOR
0nBOR
7 fields
Field
Bits
What it does
STKOVF
7
Stack Overflow Flag bit
STKUNF
6
Stack Underflow Flag bit
nRWDT
4
nRMCLR
3
MCLR Reset Flag bit
nRI
2
RESET Instruction Flag bit
nPOR
1
Power-on Reset Status bit
nBOR
0
Brown-out Reset Status bit
WDTCONWatchdog Timer Control Register
Address
0x97
Reset
0x16
Access
read/write
7–
6–
5WDTPS4
4WDTPS3
3WDTPS2
2WDTPS1
1WDTPS0
0SWDTEN
2 fields
Field
Bits
What it does
WDTPS
5:1
SWDTEN
0
Software Enable/Disable for Watch Dog Timer bit
OSCCONOscillator Control Register
Address
0x99
Reset
0x38
Access
read/write
7–
6IRCF3
5IRCF2
4IRCF1
3IRCF0
2–
1SCS1
0SCS0
2 fields
Field
Bits
What it does
IRCF
6:3
SCS
1:0
OSCSTATOscillator Status Register
Address
0x9A
Reset
0x00
Access
read only
7–
6–
5–
4HFIOFR
3–
2–
1LFIOFR
0HFIOFS
3 fields
Field
Bits
What it does
HFIOFR
4
LFIOFR
1
Low Freqency Internal Oscillator Ready bit
HFIOFS
0
Low Freqency Internal Oscillator Ready bit
BORCONBrown-out Reset Control Register
Address
0x116
Reset
x (not fixed at power-on)
Access
read/write
7SBOREN
6BORFS
5–
4–
3–
2–
1–
0BORRDY
3 fields
Field
Bits
What it does
SBOREN
7
Software Brown Out Reset Enable bit
BORFS
6
BORRDY
0
Brown-out Reset Circuit Ready Status bit
ADC Analog-to-digital converter
ADRESLA/D Result Register LSB
Address
0x9B
Reset
x (not fixed at power-on)
Access
read/write
7ADRESL7
6ADRESL6
5ADRESL5
4ADRESL4
3ADRESL3
2ADRESL2
1ADRESL1
0ADRESL0
1 field
Field
Bits
What it does
ADRESL
7:0
ADRESHA/D Result Register MSB
Address
0x9C
Reset
x (not fixed at power-on)
Access
read/write
7ADRESH7
6ADRESH6
5ADRESH5
4ADRESH4
3ADRESH3
2ADRESH2
1ADRESH1
0ADRESH0
1 field
Field
Bits
What it does
ADRESH
7:0
ADCON0Analog-to-Digital Control Register 0
Address
0x9D
Reset
0x00
Access
read/write
7–
6CHS4
5CHS3
4CHS2
3CHS1
2CHS0
1GO/nDONE
0ADON
3 fields
Field
Bits
What it does
CHS
6:2
GO/nDONE
1
A/D Conversion Status bit
ADON
0
A/D Module Enable bit
ADCON1Analog-to-Digital Control Register 1
Address
0x9E
Reset
0x00
Access
read/write
7ADFM
6ADCS2
5ADCS1
4ADCS0
3–
2–
1ADPREF1
0ADPREF0
3 fields
Field
Bits
What it does
ADFM
7
A/D Result Format Select bit
ADCS
6:4
ADPREF
1:0
ADCON2Analog-to-Digital Control Register 2
Address
0x9F
Reset
0x00
Access
read/write
7TRIGSEL3
6TRIGSEL2
5TRIGSEL1
4TRIGSEL0
3–
2–
1–
0–
1 field
Field
Bits
What it does
TRIGSEL
7:4
COMPARATOR Comparators and voltage reference
CM1CON0
Address
0x111
Reset
0x04
Access
read/write
7C1ON
6C1OUT
5C1OE
4C1POL
3–
2C1SP
1C1HYS
0C1SYNC
7 fields
Field
Bits
What it does
C1ON
7
Comparator Enable bit
C1OUT
6
Comparator Output bit
C1OE
5
Comparator Output Enable bit
C1POL
4
Comparator Output Polarity Select bit
C1SP
2
Comparator Speed/Power Select bit
C1HYS
1
Comparator Hysteresis Enable bit
C1SYNC
0
Comparator Output Synchronous Mode bit
CM1CON1
Address
0x112
Reset
0x00
Access
read/write
7C1INTP
6C1INTN
5C1PCH1
4C1PCH0
3–
2C1NCH2
1C1NCH1
0C1NCH0
4 fields
Field
Bits
What it does
C1INTP
7
Comparator Interrupt on Positive going edge Enable bits
C1INTN
6
Comparator Interrupt on Negative going edge Enable bits
C1PCH
5:4
C1NCH
2:0
CM2CON0
Address
0x113
Reset
0x04
Access
read/write
7C2ON
6C2OUT
5C2OE
4C2POL
3–
2C2SP
1C2HYS
0C2SYNC
7 fields
Field
Bits
What it does
C2ON
7
C2OUT
6
C2OE
5
C2POL
4
C2SP
2
C2HYS
1
C2SYNC
0
CM2CON1
Address
0x114
Reset
0x00
Access
read/write
7C2INTP
6C2INTN
5C2PCH1
4C2PCH0
3–
2C2NCH2
1C2NCH1
0C2NCH0
4 fields
Field
Bits
What it does
C2INTP
7
Comparator Interrupt on Positive going edge Enable bits
C2INTN
6
Comparator Interrupt on Negative going edge Enable bits