BETAINDF0
- Address
0x00- Reset
x (not fixed at power-on)- Access
- read/write
- 7INDF07
- 6INDF06
- 5INDF05
- 4INDF04
- 3INDF03
- 2INDF02
- 1INDF01
- 0INDF00
1 field
| Field | Bits | What it does |
|---|---|---|
| INDF0 | 7:0 |
PIC16LF1902 registers
All 87 registers by peripheral, at their data-memory address as the register file map gives it (bank and offset), with their reset value and every bit.
CPU CPU core
INDF1
- Address
0x01- Reset
x (not fixed at power-on)- Access
- read/write
- 7INDF17
- 6INDF16
- 5INDF15
- 4INDF14
- 3INDF13
- 2INDF12
- 1INDF11
- 0INDF10
1 field
| Field | Bits | What it does |
|---|---|---|
| INDF1 | 7:0 |
PCL
- Address
0x02- Reset
0x00- Access
- read/write
- 7PCL7
- 6PCL6
- 5PCL5
- 4PCL4
- 3PCL3
- 2PCL2
- 1PCL1
- 0PCL0
1 field
| Field | Bits | What it does |
|---|---|---|
| PCL | 7:0 |
STATUS
- Address
0x03- Reset
0x18- Access
- read/write
- 7–
- 6–
- 5–
- 4nTO
- 3nPD
- 2Z
- 1DC
- 0C
5 fields
| Field | Bits | What it does |
|---|---|---|
| nTO | 4 | |
| nPD | 3 | |
| Z | 2 | |
| DC | 1 | |
| C | 0 |
FSR0L
- Address
0x04- Reset
0x00- Access
- read/write
- 7FSR0L7
- 6FSR0L6
- 5FSR0L5
- 4FSR0L4
- 3FSR0L3
- 2FSR0L2
- 1FSR0L1
- 0FSR0L0
1 field
| Field | Bits | What it does |
|---|---|---|
| FSR0L | 7:0 |
FSR0H
- Address
0x05- Reset
0x00- Access
- read/write
- 7FSR0H7
- 6FSR0H6
- 5FSR0H5
- 4FSR0H4
- 3FSR0H3
- 2FSR0H2
- 1FSR0H1
- 0FSR0H0
1 field
| Field | Bits | What it does |
|---|---|---|
| FSR0H | 7:0 |
FSR1L
- Address
0x06- Reset
0x00- Access
- read/write
- 7FSR1L7
- 6FSR1L6
- 5FSR1L5
- 4FSR1L4
- 3FSR1L3
- 2FSR1L2
- 1FSR1L1
- 0FSR1L0
1 field
| Field | Bits | What it does |
|---|---|---|
| FSR1L | 7:0 |
FSR1H
- Address
0x07- Reset
0x00- Access
- read/write
- 7FSR1H7
- 6FSR1H6
- 5FSR1H5
- 4FSR1H4
- 3FSR1H3
- 2FSR1H2
- 1FSR1H1
- 0FSR1H0
1 field
| Field | Bits | What it does |
|---|---|---|
| FSR1H | 7:0 |
BSR
- Address
0x08- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4BSR4
- 3BSR3
- 2BSR2
- 1BSR1
- 0BSR0
5 fields
| Field | Bits | What it does |
|---|---|---|
| BSR4 | 4 | |
| BSR3 | 3 | |
| BSR2 | 2 | |
| BSR1 | 1 | |
| BSR0 | 0 |
WREG
- Address
0x09- Reset
0x00- Access
- read/write
- 7WREG07
- 6WREG06
- 5WREG05
- 4WREG04
- 3WREG03
- 2WREG02
- 1WREG01
- 0WREG00
1 field
| Field | Bits | What it does |
|---|---|---|
| WREG0 | 7:0 |
PCLATH
- Address
0x0A- Reset
0x00- Access
- read/write
- 7–
- 6PCLATH6
- 5PCLATH5
- 4PCLATH4
- 3PCLATH3
- 2PCLATH2
- 1PCLATH1
- 0PCLATH0
1 field
| Field | Bits | What it does |
|---|---|---|
| PCLATH | 6:0 |
STATUS_SHAD
- Address
0xFE4- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2Z_SHAD
- 1DC_SHAD
- 0C_SHAD
3 fields
| Field | Bits | What it does |
|---|---|---|
| Z_SHAD | 2 | |
| DC_SHAD | 1 | |
| C_SHAD | 0 |
WREG_SHAD
- Address
0xFE5- Reset
x (not fixed at power-on)- Access
- read/write
- 7WREG_SHAD7
- 6WREG_SHAD6
- 5WREG_SHAD5
- 4WREG_SHAD4
- 3WREG_SHAD3
- 2WREG_SHAD2
- 1WREG_SHAD1
- 0WREG_SHAD0
1 field
| Field | Bits | What it does |
|---|---|---|
| WREG_SHAD | 7:0 |
BSR_SHAD
- Address
0xFE6- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5–
- 4BSR_SHAD4
- 3BSR_SHAD3
- 2BSR_SHAD2
- 1BSR_SHAD1
- 0BSR_SHAD0
1 field
| Field | Bits | What it does |
|---|---|---|
| BSR_SHAD | 4:0 |
PCLATH_SHAD
- Address
0xFE7- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6PCLATH_SHAD6
- 5PCLATH_SHAD5
- 4PCLATH_SHAD4
- 3PCLATH_SHAD3
- 2PCLATH_SHAD2
- 1PCLATH_SHAD1
- 0PCLATH_SHAD0
1 field
| Field | Bits | What it does |
|---|---|---|
| PCLATH_SHAD | 6:0 |
FSR0L_SHAD
- Address
0xFE8- Reset
x (not fixed at power-on)- Access
- read/write
- 7FSR0L_SHAD7
- 6FSR0L_SHAD6
- 5FSR0L_SHAD5
- 4FSR0L_SHAD4
- 3FSR0L_SHAD3
- 2FSR0L_SHAD2
- 1FSR0L_SHAD1
- 0FSR0L_SHAD0
1 field
| Field | Bits | What it does |
|---|---|---|
| FSR0L_SHAD | 7:0 |
FSR0H_SHAD
- Address
0xFE9- Reset
x (not fixed at power-on)- Access
- read/write
- 7FSR0H_SHAD7
- 6FSR0H_SHAD6
- 5FSR0H_SHAD5
- 4FSR0H_SHAD4
- 3FSR0H_SHAD3
- 2FSR0H_SHAD2
- 1FSR0H_SHAD1
- 0FSR0H_SHAD0
1 field
| Field | Bits | What it does |
|---|---|---|
| FSR0H_SHAD | 7:0 |
FSR1L_SHAD
- Address
0xFEA- Reset
x (not fixed at power-on)- Access
- read/write
- 7FSR1L_SHAD7
- 6FSR1L_SHAD6
- 5FSR1L_SHAD5
- 4FSR1L_SHAD4
- 3FSR1L_SHAD3
- 2FSR1L_SHAD2
- 1FSR1L_SHAD1
- 0FSR1L_SHAD0
1 field
| Field | Bits | What it does |
|---|---|---|
| FSR1L_SHAD | 7:0 |
FSR1H_SHAD
- Address
0xFEB- Reset
x (not fixed at power-on)- Access
- read/write
- 7FSR1H_SHAD7
- 6FSR1H_SHAD6
- 5FSR1H_SHAD5
- 4FSR1H_SHAD4
- 3FSR1H_SHAD3
- 2FSR1H_SHAD2
- 1FSR1H_SHAD1
- 0FSR1H_SHAD0
1 field
| Field | Bits | What it does |
|---|---|---|
| FSR1H_SHAD | 7:0 |
STKPTRCurrent Stack pointer
- Address
0xFED- Reset
0x1F- Access
- read/write
- 7–
- 6–
- 5–
- 4STKPTR4
- 3STKPTR3
- 2STKPTR2
- 1STKPTR1
- 0STKPTR0
1 field
| Field | Bits | What it does |
|---|---|---|
| STKPTR | 4:0 |
TOSLTop of Stack Low byte
- Address
0xFEE- Reset
x (not fixed at power-on)- Access
- read/write
- 7TOSL7
- 6TOSL6
- 5TOSL5
- 4TOSL4
- 3TOSL3
- 2TOSL2
- 1TOSL1
- 0TOSL0
1 field
| Field | Bits | What it does |
|---|---|---|
| TOSL | 7:0 |
TOSHTop of Stack High byte
- Address
0xFEF- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6TOSH6
- 5TOSH5
- 4TOSH4
- 3TOSH3
- 2TOSH2
- 1TOSH1
- 0TOSH0
1 field
| Field | Bits | What it does |
|---|---|---|
| TOSH | 6:0 |
INTERRUPT Interrupts
INTCON
- Address
0x0B- Reset
0x00- Access
- read/write
- 7GIE
- 6PEIE
- 5TMR0IE
- 4INTE
- 3IOCIE
- 2TMR0IF
- 1INTF
- 0IOCIF
8 fields
| Field | Bits | What it does |
|---|---|---|
| GIE | 7 | |
| PEIE | 6 | |
| TMR0IE | 5 | |
| INTE | 4 | |
| IOCIE | 3 | |
| TMR0IF | 2 | |
| INTF | 1 | |
| IOCIF | 0 |
PIR1
- Address
0x11- Reset
0x00- Access
- read/write
- 7TMR1GIF
- 6ADIF
- 5–
- 4–
- 3–
- 2–
- 1–
- 0TMR1IF
3 fields
| Field | Bits | What it does |
|---|---|---|
| TMR1GIF | 7 | Timer1 Gate Interrupt Flag bit |
| ADIF | 6 | A/D Converter Interrupt Flag bit |
| TMR1IF | 0 | TMR1 Overflow Interrupt Flag bit |
PIR2
- Address
0x12- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4EEIF
- 3–
- 2LCDIF
- 1–
- 0–
2 fields
| Field | Bits | What it does |
|---|---|---|
| EEIF | 4 | |
| LCDIF | 2 |
PIE1Peripheral Interrupt Enable Register 1
- Address
0x91- Reset
0x00- Access
- read/write
- 7TMR1GIE
- 6ADIE
- 5–
- 4–
- 3–
- 2–
- 1–
- 0TMR1IE
3 fields
| Field | Bits | What it does |
|---|---|---|
| TMR1GIE | 7 | Timer1 Gate Interrupt Enable bit |
| ADIE | 6 | A/D Converter Interrupt Enable bit |
| TMR1IE | 0 | TMR1 Overflow Interrupt Enable bit |
PIE2Peripheral Interrupt Enable Register 2
- Address
0x92- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4EEIE
- 3–
- 2LCDIE
- 1–
- 0–
2 fields
| Field | Bits | What it does |
|---|---|---|
| EEIE | 4 | EEPROM Write Completion Interrupt Enable bit |
| LCDIE | 2 | LCD Module Interrupt Enable bit |
PORTA I/O port A
PORTA
- Address
0x0C- Reset
x (not fixed at power-on)- Access
- read/write
- 7RA7
- 6RA6
- 5RA5
- 4RA4
- 3RA3
- 2RA2
- 1RA1
- 0RA0
8 fields
| Field | Bits | What it does |
|---|---|---|
| RA7 | 7 | |
| RA6 | 6 | |
| RA5 | 5 | |
| RA4 | 4 | |
| RA3 | 3 | |
| RA2 | 2 | |
| RA1 | 1 | |
| RA0 | 0 |
TRISAPORTA Data Direction Control Register
- Address
0x8C- Reset
0xFF- Access
- read/write
- 7TRISA7
- 6TRISA6
- 5TRISA5
- 4TRISA4
- 3TRISA3
- 2TRISA2
- 1TRISA1
- 0TRISA0
8 fields
| Field | Bits | What it does |
|---|---|---|
| TRISA7 | 7 | |
| TRISA6 | 6 | |
| TRISA5 | 5 | |
| TRISA4 | 4 | |
| TRISA3 | 3 | |
| TRISA2 | 2 | |
| TRISA1 | 1 | |
| TRISA0 | 0 |
LATA
- Address
0x10C- Reset
x (not fixed at power-on)- Access
- read/write
- 7LATA7
- 6LATA6
- 5LATA5
- 4LATA4
- 3LATA3
- 2LATA2
- 1LATA1
- 0LATA0
8 fields
| Field | Bits | What it does |
|---|---|---|
| LATA7 | 7 | |
| LATA6 | 6 | |
| LATA5 | 5 | |
| LATA4 | 4 | |
| LATA3 | 3 | |
| LATA2 | 2 | |
| LATA1 | 1 | |
| LATA0 | 0 |
ANSELA
- Address
0x18C- Reset
0x2F- Access
- read/write
- 7–
- 6–
- 5ANSA5
- 4–
- 3ANSA3
- 2ANSA2
- 1ANSA1
- 0ANSA0
5 fields
| Field | Bits | What it does |
|---|---|---|
| ANSA5 | 5 | |
| ANSA3 | 3 | |
| ANSA2 | 2 | |
| ANSA1 | 1 | |
| ANSA0 | 0 |
PORTB I/O port B
PORTB
- Address
0x0D- Reset
x (not fixed at power-on)- Access
- read/write
- 7RB7
- 6RB6
- 5RB5
- 4RB4
- 3RB3
- 2RB2
- 1RB1
- 0RB0
8 fields
| Field | Bits | What it does |
|---|---|---|
| RB7 | 7 | |
| RB6 | 6 | |
| RB5 | 5 | |
| RB4 | 4 | |
| RB3 | 3 | |
| RB2 | 2 | |
| RB1 | 1 | |
| RB0 | 0 |
TRISBPORTB Data Direction Control Register
- Address
0x8D- Reset
0xFF- Access
- read/write
- 7TRISB7
- 6TRISB6
- 5TRISB5
- 4TRISB4
- 3TRISB3
- 2TRISB2
- 1TRISB1
- 0TRISB0
8 fields
| Field | Bits | What it does |
|---|---|---|
| TRISB7 | 7 | |
| TRISB6 | 6 | |
| TRISB5 | 5 | |
| TRISB4 | 4 | |
| TRISB3 | 3 | |
| TRISB2 | 2 | |
| TRISB1 | 1 | |
| TRISB0 | 0 |
LATB
- Address
0x10D- Reset
x (not fixed at power-on)- Access
- read/write
- 7LATB7
- 6LATB6
- 5LATB5
- 4LATB4
- 3LATB3
- 2LATB2
- 1LATB1
- 0LATB0
8 fields
| Field | Bits | What it does |
|---|---|---|
| LATB7 | 7 | |
| LATB6 | 6 | |
| LATB5 | 5 | |
| LATB4 | 4 | |
| LATB3 | 3 | |
| LATB2 | 2 | |
| LATB1 | 1 | |
| LATB0 | 0 |
ANSELB
- Address
0x18D- Reset
0x3F- Access
- read/write
- 7–
- 6–
- 5ANSB5
- 4ANSB4
- 3ANSB3
- 2ANSB2
- 1ANSB1
- 0ANSB0
6 fields
| Field | Bits | What it does |
|---|---|---|
| ANSB5 | 5 | |
| ANSB4 | 4 | |
| ANSB3 | 3 | |
| ANSB2 | 2 | |
| ANSB1 | 1 | |
| ANSB0 | 0 |
WPUB
- Address
0x20D- Reset
0xFF- Access
- read/write
- 7WPUB7
- 6WPUB6
- 5WPUB5
- 4WPUB4
- 3WPUB3
- 2WPUB2
- 1WPUB1
- 0WPUB0
8 fields
| Field | Bits | What it does |
|---|---|---|
| WPUB7 | 7 | |
| WPUB6 | 6 | |
| WPUB5 | 5 | |
| WPUB4 | 4 | |
| WPUB3 | 3 | |
| WPUB2 | 2 | |
| WPUB1 | 1 | |
| WPUB0 | 0 |
PORTC I/O port C
PORTC
- Address
0x0E- Reset
x (not fixed at power-on)- Access
- read/write
- 7RC7
- 6RC6
- 5RC5
- 4RC4
- 3RC3
- 2RC2
- 1RC1
- 0RC0
8 fields
| Field | Bits | What it does |
|---|---|---|
| RC7 | 7 | |
| RC6 | 6 | |
| RC5 | 5 | |
| RC4 | 4 | |
| RC3 | 3 | |
| RC2 | 2 | |
| RC1 | 1 | |
| RC0 | 0 |
TRISCPORTC Data Direction Control Register
- Address
0x8E- Reset
0xFF- Access
- read/write
- 7TRISC7
- 6TRISC6
- 5TRISC5
- 4TRISC4
- 3TRISC3
- 2TRISC2
- 1TRISC1
- 0TRISC0
8 fields
| Field | Bits | What it does |
|---|---|---|
| TRISC7 | 7 | |
| TRISC6 | 6 | |
| TRISC5 | 5 | |
| TRISC4 | 4 | |
| TRISC3 | 3 | |
| TRISC2 | 2 | |
| TRISC1 | 1 | |
| TRISC0 | 0 |
LATC
- Address
0x10E- Reset
x (not fixed at power-on)- Access
- read/write
- 7LATC7
- 6LATC6
- 5LATC5
- 4LATC4
- 3LATC3
- 2LATC2
- 1LATC1
- 0LATC0
8 fields
| Field | Bits | What it does |
|---|---|---|
| LATC7 | 7 | |
| LATC6 | 6 | |
| LATC5 | 5 | |
| LATC4 | 4 | |
| LATC3 | 3 | |
| LATC2 | 2 | |
| LATC1 | 1 | |
| LATC0 | 0 |
PORTE I/O port E
PORTE
- Address
0x10- Reset
x (not fixed at power-on)- Access
- read only
- 7–
- 6–
- 5–
- 4–
- 3RE3
- 2–
- 1–
- 0–
1 field
| Field | Bits | What it does |
|---|---|---|
| RE3 | 3 |
TRISE
- Address
0x90- Reset
0x08- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3TRISE3
- 2TRISE2
- 1TRISE1
- 0TRISE0
WPUE
- Address
0x210- Reset
0x08- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3WPUE3
- 2–
- 1–
- 0–
1 field
| Field | Bits | What it does |
|---|---|---|
| WPUE3 | 3 |
TMR0 Timer0
TMR0
- Address
0x15- Reset
x (not fixed at power-on)- Access
- read/write
- 7TMR07
- 6TMR06
- 5TMR05
- 4TMR04
- 3TMR03
- 2TMR02
- 1TMR01
- 0TMR00
1 field
| Field | Bits | What it does |
|---|---|---|
| TMR0 | 7:0 |
OPTION_REGOption Register
- Address
0x95- Reset
0xFF- Access
- read/write
- 7nWPUEN
- 6INTEDG
- 5TMR0CS
- 4TMR0SE
- 3PSA
- 2PS2
- 1PS1
- 0PS0
8 fields
| Field | Bits | What it does |
|---|---|---|
| nWPUEN | 7 | Weak Pull-up Enable bit |
| INTEDG | 6 | Interrupt Edge Select bit |
| TMR0CS | 5 | TMR0 Clock Source Select bit |
| TMR0SE | 4 | TMR0 Source Edge Select bit |
| PSA | 3 | Prescaler Active bit |
| PS2 | 2 | Prescaler Rate Select bits |
| PS1 | 1 | Prescaler Rate Select bits |
| PS0 | 0 | Prescaler Rate Select bits |
TMR1 Timer1
TMR1L
- Address
0x16- Reset
x (not fixed at power-on)- Access
- read/write
- 7TMR1L7
- 6TMR1L6
- 5TMR1L5
- 4TMR1L4
- 3TMR1L3
- 2TMR1L2
- 1TMR1L1
- 0TMR1L0
1 field
| Field | Bits | What it does |
|---|---|---|
| TMR1L | 7:0 |
TMR1H
- Address
0x17- Reset
x (not fixed at power-on)- Access
- read/write
- 7TMR1H7
- 6TMR1H6
- 5TMR1H5
- 4TMR1H4
- 3TMR1H3
- 2TMR1H2
- 1TMR1H1
- 0TMR1H0
1 field
| Field | Bits | What it does |
|---|---|---|
| TMR1H | 7:0 |
T1CON
- Address
0x18- Reset
0x00- Access
- read/write
- 7TMR1CS1
- 6TMR1CS0
- 5T1CKPS1
- 4T1CKPS0
- 3T1OSCEN
- 2nT1SYNC
- 1–
- 0TMR1ON
5 fields
| Field | Bits | What it does |
|---|---|---|
| TMR1CS | 7:6 | |
| T1CKPS | 5:4 | |
| T1OSCEN | 3 | |
| nT1SYNC | 2 | |
| TMR1ON | 0 |
T1GCON
- Address
0x19- Reset
x (not fixed at power-on)- Access
- read/write
- 7TMR1GE
- 6T1GPOL
- 5T1GTM
- 4T1GSPM
- 3T1GGO_nDONE
- 2T1GVAL
- 1T1GSS1
- 0T1GSS0
7 fields
| Field | Bits | What it does |
|---|---|---|
| TMR1GE | 7 | |
| T1GPOL | 6 | |
| T1GTM | 5 | |
| T1GSPM | 4 | |
| T1GGO_nDONE | 3 | |
| T1GVAL | 2 | |
| T1GSS | 1:0 |
OSCILLATOR Oscillator, power control and watchdog
PCONPower Control Register
- Address
0x96- Reset
x (not fixed at power-on)- Access
- read/write
- 7STKOVF
- 6STKUNF
- 5–
- 4nRWDT
- 3nRMCLR
- 2nRI
- 1nPOR
- 0nBOR
7 fields
| Field | Bits | What it does |
|---|---|---|
| STKOVF | 7 | Stack Overflow Flag bit |
| STKUNF | 6 | Stack Underflow Flag bit |
| nRWDT | 4 | |
| nRMCLR | 3 | MCLR Reset Flag bit |
| nRI | 2 | RESET Instruction Flag bit |
| nPOR | 1 | Power-on Reset Status bit |
| nBOR | 0 | Brown-out Reset Status bit |
WDTCONWatchdog Timer Control Register
- Address
0x97- Reset
0x16- Access
- read/write
- 7–
- 6–
- 5WDTPS4
- 4WDTPS3
- 3WDTPS2
- 2WDTPS1
- 1WDTPS0
- 0SWDTEN
2 fields
| Field | Bits | What it does |
|---|---|---|
| WDTPS | 5:1 | Watchdog Timer Period Select bits |
| SWDTEN | 0 | Software Enable/Disable for Watch Dog Timer bit |
OSCCONOscillator Control Register
- Address
0x99- Reset
0x38- Access
- read/write
- 7–
- 6IRCF3
- 5IRCF2
- 4IRCF1
- 3IRCF0
- 2–
- 1SCS1
- 0SCS0
2 fields
| Field | Bits | What it does |
|---|---|---|
| IRCF | 6:3 | Internal Oscillator Frequency Select bits |
| SCS | 1:0 | System clock select bit |
OSCSTATOscillator Status Register
- Address
0x9A- Reset
x (not fixed at power-on)- Access
- read only
- 7T1OSCR
- 6–
- 5OSTS
- 4HFIOFR
- 3–
- 2–
- 1LFIOFR
- 0HFIOFS
5 fields
| Field | Bits | What it does |
|---|---|---|
| T1OSCR | 7 | Timer1 Oscillator Ready bit |
| OSTS | 5 | Oscillator Start-up Time-out Status bit |
| HFIOFR | 4 | High Freqency Internal Oscillator Ready bit |
| LFIOFR | 1 | Low Freqency Internal Oscillator Ready bit |
| HFIOFS | 0 | Low Freqency Internal Oscillator Ready bit |
BORCONBrown-out Reset Control Register
- Address
0x116- Reset
x (not fixed at power-on)- Access
- read/write
- 7SBOREN
- 6BORFS
- 5–
- 4–
- 3–
- 2–
- 1–
- 0BORRDY
3 fields
| Field | Bits | What it does |
|---|---|---|
| SBOREN | 7 | Software Brown Out Reset Enable bit |
| BORFS | 6 | Brown-out Reset Fast Start bit |
| BORRDY | 0 | Brown-out Reset Circuit Ready Status bit |
ADC Analog-to-digital converter
ADRESLA/D Result Register LSB
- Address
0x9B- Reset
x (not fixed at power-on)- Access
- read/write
- 7ADRESL7
- 6ADRESL6
- 5ADRESL5
- 4ADRESL4
- 3ADRESL3
- 2ADRESL2
- 1ADRESL1
- 0ADRESL0
1 field
| Field | Bits | What it does |
|---|---|---|
| ADRESL | 7:0 |
ADRESHA/D Result Register MSB
- Address
0x9C- Reset
x (not fixed at power-on)- Access
- read/write
- 7ADRESH7
- 6ADRESH6
- 5ADRESH5
- 4ADRESH4
- 3ADRESH3
- 2ADRESH2
- 1ADRESH1
- 0ADRESH0
1 field
| Field | Bits | What it does |
|---|---|---|
| ADRESH | 7:0 |
ADCON0Analog-to-Digital Control Register 0
- Address
0x9D- Reset
0x00- Access
- read/write
- 7–
- 6CHS4
- 5CHS3
- 4CHS2
- 3CHS1
- 2CHS0
- 1GO/nDONE
- 0ADON
3 fields
| Field | Bits | What it does |
|---|---|---|
| CHS | 6:2 | Analog Channel Select bits |
| GO/nDONE | 1 | A/D Conversion Status bit |
| ADON | 0 | A/D Module Enable bit |
ADCON1Analog-to-Digital Control Register 1
- Address
0x9E- Reset
0x00- Access
- read/write
- 7ADFM
- 6ADCS2
- 5ADCS1
- 4ADCS0
- 3–
- 2–
- 1ADPREF1
- 0ADPREF0
3 fields
| Field | Bits | What it does |
|---|---|---|
| ADFM | 7 | A/D Result Format Select bit |
| ADCS | 6:4 | A/D Conversion Clock Select bits |
| ADPREF | 1:0 | Positive Voltage Reference Configuration bits |
FVR Fixed voltage reference
FVRCONVoltage Reference Control Register 0
- Address
0x117- Reset
x (not fixed at power-on)- Access
- read/write
- 7FVREN
- 6FVRRDY
- 5TSEN
- 4TSRNG
- 3–
- 2–
- 1ADFVR1
- 0ADFVR0
5 fields
| Field | Bits | What it does |
|---|---|---|
| FVREN | 7 | Fixed Voltage Reference Enable |
| FVRRDY | 6 | Fixed Voltage Reference Ready Flag |
| TSEN | 5 | Temperature Sensor Enable |
| TSRNG | 4 | Temperature Sensor Range Select |
| ADFVR | 1:0 | A/D Converter Fixed Voltage Reference Selection |
NVM Data EEPROM and flash program memory
PMADRL
- Address
0x191- Reset
0x00- Access
- read/write
- 7PMADRL7
- 6PMADRL6
- 5PMADRL5
- 4PMADRL4
- 3PMADRL3
- 2PMADRL2
- 1PMADRL1
- 0PMADRL0
1 field
| Field | Bits | What it does |
|---|---|---|
| PMADRL | 7:0 |
PMADRH
- Address
0x192- Reset
0x80- Access
- read/write
- 7–
- 6PMADRH6
- 5PMADRH5
- 4PMADRH4
- 3PMADRH3
- 2PMADRH2
- 1PMADRH1
- 0PMADRH0
1 field
| Field | Bits | What it does |
|---|---|---|
| PMADRH | 6:0 |
PMDATL
- Address
0x193- Reset
x (not fixed at power-on)- Access
- read/write
- 7PMDATL7
- 6PMDATL6
- 5PMDATL5
- 4PMDATL4
- 3PMDATL3
- 2PMDATL2
- 1PMDATL1
- 0PMDATL0
1 field
| Field | Bits | What it does |
|---|---|---|
| PMDATL | 7:0 |
PMDATH
- Address
0x194- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5PMDATH5
- 4PMDATH4
- 3PMDATH3
- 2PMDATH2
- 1PMDATH1
- 0PMDATH0
1 field
| Field | Bits | What it does |
|---|---|---|
| PMDATH | 5:0 |
PMCON1
- Address
0x195- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6CFGS
- 5LWLO
- 4FREE
- 3WRERR
- 2WREN
- 1WR
- 0RD
7 fields
| Field | Bits | What it does |
|---|---|---|
| CFGS | 6 | FLASH Program / Configuration Select bit |
| LWLO | 5 | Load Write Latches Only bit |
| FREE | 4 | Program FLASH Erase Enable bit |
| WRERR | 3 | Sequence Error Flag bit |
| WREN | 2 | Program/Erase Enable bit |
| WR | 1 | Write Control bit |
| RD | 0 | Read Control bit |
PMCON2
- Address
0x196- Reset
0x00- Access
- write only
- 7PMCON27
- 6PMCON26
- 5PMCON25
- 4PMCON24
- 3PMCON23
- 2PMCON22
- 1PMCON21
- 0PMCON20
1 field
| Field | Bits | What it does |
|---|---|---|
| PMCON2 | 7:0 |
IOC Interrupt-on-change
IOCBPInterrupt-On-Change Positive Edge Register
- Address
0x394- Reset
0x00- Access
- read/write
- 7IOCBP7
- 6IOCBP6
- 5IOCBP5
- 4IOCBP4
- 3IOCBP3
- 2IOCBP2
- 1IOCBP1
- 0IOCBP0
8 fields
| Field | Bits | What it does |
|---|---|---|
| IOCBP7 | 7 | |
| IOCBP6 | 6 | |
| IOCBP5 | 5 | |
| IOCBP4 | 4 | |
| IOCBP3 | 3 | |
| IOCBP2 | 2 | |
| IOCBP1 | 1 | |
| IOCBP0 | 0 |
IOCBNInterrupt-On-Change Negative Edge Register
- Address
0x395- Reset
0x00- Access
- read/write
- 7IOCBN7
- 6IOCBN6
- 5IOCBN5
- 4IOCBN4
- 3IOCBN3
- 2IOCBN2
- 1IOCBN1
- 0IOCBN0
8 fields
| Field | Bits | What it does |
|---|---|---|
| IOCBN7 | 7 | |
| IOCBN6 | 6 | |
| IOCBN5 | 5 | |
| IOCBN4 | 4 | |
| IOCBN3 | 3 | |
| IOCBN2 | 2 | |
| IOCBN1 | 1 | |
| IOCBN0 | 0 |
IOCBFInterrupt-On-Change Flag Register
- Address
0x396- Reset
0x00- Access
- read/write
- 7IOCBF7
- 6IOCBF6
- 5IOCBF5
- 4IOCBF4
- 3IOCBF3
- 2IOCBF2
- 1IOCBF1
- 0IOCBF0
8 fields
| Field | Bits | What it does |
|---|---|---|
| IOCBF7 | 7 | |
| IOCBF6 | 6 | |
| IOCBF5 | 5 | |
| IOCBF4 | 4 | |
| IOCBF3 | 3 | |
| IOCBF2 | 2 | |
| IOCBF1 | 1 | |
| IOCBF0 | 0 |
LCD LCD
LCDCONLCD Control Register
- Address
0x791- Reset
0x03- Access
- read/write
- 7LCDEN
- 6SLPEN
- 5WERR
- 4–
- 3CS1
- 2CS0
- 1LMUX1
- 0LMUX0
5 fields
| Field | Bits | What it does |
|---|---|---|
| LCDEN | 7 | LCD Module Enable bit |
| SLPEN | 6 | LCD Display Sleep-Enabled bit |
| WERR | 5 | Write Failed Error bit |
| CS | 3:2 | Clock Source bits |
| LMUX | 1:0 | Commons Selection bits |
LCDPSLCD Phase Register
- Address
0x792- Reset
0x00- Access
- read/write
- 7WFT
- 6BIASMD
- 5LCDA
- 4WA
- 3LP3
- 2LP2
- 1LP1
- 0LP0
5 fields
| Field | Bits | What it does |
|---|---|---|
| WFT | 7 | Waveform Type bit |
| BIASMD | 6 | Bias Mode Selection bit |
| LCDA | 5 | LCD Active bit |
| WA | 4 | Write Allow bit |
| LP | 3:0 | LCD Prescaler Selection bits |
LCDREFLCD Reference Voltage Control Register
- Address
0x793- Reset
0x00- Access
- read/write
- 7LCDIRE
- 6–
- 5LCDIRI
- 4–
- 3VLCD3PE
- 2VLCD2PE
- 1VLCD1PE
- 0–
5 fields
| Field | Bits | What it does |
|---|---|---|
| LCDIRE | 7 | LCD Internal Reference Enable bit |
| LCDIRI | 5 | LCD Internal Reference Ladder Idle Enable bit |
| VLCD3PE | 3 | VLCD3 pin enable bit |
| VLCD2PE | 2 | VLCD2 pin enable bit |
| VLCD1PE | 1 | VLCD1 pin enable bit |
LCDCSTLCD Contrast Control Register
- Address
0x794- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2LCDCST2
- 1LCDCST1
- 0LCDCST0
1 field
| Field | Bits | What it does |
|---|---|---|
| LCDCST | 2:0 | LCD Contrast Control bits |
LCDRLLCD Reference Voltage Control Register
- Address
0x795- Reset
0x00- Access
- read/write
- 7LRLAP1
- 6LRLAP0
- 5LRLBP1
- 4LRLBP0
- 3–
- 2LRLAT2
- 1LRLAT1
- 0LRLAT0
3 fields
| Field | Bits | What it does |
|---|---|---|
| LRLAP | 7:6 | LCD Reference Ladder A Time Power Control bits |
| LRLBP | 5:4 | LCD Reference Ladder B Time Power Control bits |
| LRLAT | 2:0 | LCD Reference Ladder A Time interval control bits |
LCDSE0
- Address
0x798- Reset
0x00- Access
- read/write
- 7SEG7
- 6SEG6
- 5SEG5
- 4SEG4
- 3SEG3
- 2SEG2
- 1SEG1
- 0SEG0
8 fields
| Field | Bits | What it does |
|---|---|---|
| SEG7 | 7 | |
| SEG6 | 6 | |
| SEG5 | 5 | |
| SEG4 | 4 | |
| SEG3 | 3 | |
| SEG2 | 2 | |
| SEG1 | 1 | |
| SEG0 | 0 |
LCDSE1
- Address
0x799- Reset
0x00- Access
- read/write
- 7SEG15
- 6SEG14
- 5SEG13
- 4SEG12
- 3SEG11
- 2SEG10
- 1SEG9
- 0SEG8
8 fields
| Field | Bits | What it does |
|---|---|---|
| SEG15 | 7 | |
| SEG14 | 6 | |
| SEG13 | 5 | |
| SEG12 | 4 | |
| SEG11 | 3 | |
| SEG10 | 2 | |
| SEG9 | 1 | |
| SEG8 | 0 |
LCDSE3
- Address
0x79B- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2SE26
- 1SE25
- 0SE24
3 fields
| Field | Bits | What it does |
|---|---|---|
| SE26 | 2 | |
| SE25 | 1 | |
| SE24 | 0 |
LCDDATA0
- Address
0x7A0- Reset
x (not fixed at power-on)- Access
- read/write
- 7SEG7COM0
- 6SEG6COM0
- 5SEG5COM0
- 4SEG4COM0
- 3SEG3COM0
- 2SEG2COM0
- 1SEG1COM0
- 0SEG0COM0
8 fields
| Field | Bits | What it does |
|---|---|---|
| SEG7COM0 | 7 | |
| SEG6COM0 | 6 | |
| SEG5COM0 | 5 | |
| SEG4COM0 | 4 | |
| SEG3COM0 | 3 | |
| SEG2COM0 | 2 | |
| SEG1COM0 | 1 | |
| SEG0COM0 | 0 |
LCDDATA1
- Address
0x7A1- Reset
x (not fixed at power-on)- Access
- read/write
- 7SEG15COM0
- 6SEG14COM0
- 5SEG13COM0
- 4SEG12COM0
- 3SEG11COM0
- 2SEG10COM0
- 1SEG9COM0
- 0SEG8COM0
8 fields
| Field | Bits | What it does |
|---|---|---|
| SEG15COM0 | 7 | |
| SEG14COM0 | 6 | |
| SEG13COM0 | 5 | |
| SEG12COM0 | 4 | |
| SEG11COM0 | 3 | |
| SEG10COM0 | 2 | |
| SEG9COM0 | 1 | |
| SEG8COM0 | 0 |
LCDDATA3
- Address
0x7A3- Reset
x (not fixed at power-on)- Access
- read/write
- 7SEG7COM1
- 6SEG6COM1
- 5SEG5COM1
- 4SEG4COM1
- 3SEG3COM1
- 2SEG2COM1
- 1SEG1COM1
- 0SEG0COM1
8 fields
| Field | Bits | What it does |
|---|---|---|
| SEG7COM1 | 7 | |
| SEG6COM1 | 6 | |
| SEG5COM1 | 5 | |
| SEG4COM1 | 4 | |
| SEG3COM1 | 3 | |
| SEG2COM1 | 2 | |
| SEG1COM1 | 1 | |
| SEG0COM1 | 0 |
LCDDATA4
- Address
0x7A4- Reset
x (not fixed at power-on)- Access
- read/write
- 7SEG15COM1
- 6SEG14COM1
- 5SEG13COM1
- 4SEG12COM1
- 3SEG11COM1
- 2SEG10COM1
- 1SEG9COM1
- 0SEG8COM1
8 fields
| Field | Bits | What it does |
|---|---|---|
| SEG15COM1 | 7 | |
| SEG14COM1 | 6 | |
| SEG13COM1 | 5 | |
| SEG12COM1 | 4 | |
| SEG11COM1 | 3 | |
| SEG10COM1 | 2 | |
| SEG9COM1 | 1 | |
| SEG8COM1 | 0 |
LCDDATA6
- Address
0x7A6- Reset
x (not fixed at power-on)- Access
- read/write
- 7SEG7COM2
- 6SEG6COM2
- 5SEG5COM2
- 4SEG4COM2
- 3SEG3COM2
- 2SEG2COM2
- 1SEG1COM2
- 0SEG0COM2
8 fields
| Field | Bits | What it does |
|---|---|---|
| SEG7COM2 | 7 | |
| SEG6COM2 | 6 | |
| SEG5COM2 | 5 | |
| SEG4COM2 | 4 | |
| SEG3COM2 | 3 | |
| SEG2COM2 | 2 | |
| SEG1COM2 | 1 | |
| SEG0COM2 | 0 |
LCDDATA7
- Address
0x7A7- Reset
x (not fixed at power-on)- Access
- read/write
- 7SEG15COM2
- 6SEG14COM2
- 5SEG13COM2
- 4SEG12COM2
- 3SEG11COM2
- 2SEG10COM2
- 1SEG9COM2
- 0SEG8COM2
8 fields
| Field | Bits | What it does |
|---|---|---|
| SEG15COM2 | 7 | |
| SEG14COM2 | 6 | |
| SEG13COM2 | 5 | |
| SEG12COM2 | 4 | |
| SEG11COM2 | 3 | |
| SEG10COM2 | 2 | |
| SEG9COM2 | 1 | |
| SEG8COM2 | 0 |
LCDDATA9
- Address
0x7A9- Reset
x (not fixed at power-on)- Access
- read/write
- 7SEG7COM3
- 6SEG6COM3
- 5SEG5COM3
- 4SEG4COM3
- 3SEG3COM3
- 2SEG2COM3
- 1SEG1COM3
- 0SEG0COM3
8 fields
| Field | Bits | What it does |
|---|---|---|
| SEG7COM3 | 7 | |
| SEG6COM3 | 6 | |
| SEG5COM3 | 5 | |
| SEG4COM3 | 4 | |
| SEG3COM3 | 3 | |
| SEG2COM3 | 2 | |
| SEG1COM3 | 1 | |
| SEG0COM3 | 0 |
LCDDATA10
- Address
0x7AA- Reset
x (not fixed at power-on)- Access
- read/write
- 7SEG15COM3
- 6SEG14COM3
- 5SEG13COM3
- 4SEG12COM3
- 3SEG11COM3
- 2SEG10COM3
- 1SEG9COM3
- 0SEG8COM3
8 fields
| Field | Bits | What it does |
|---|---|---|
| SEG15COM3 | 7 | |
| SEG14COM3 | 6 | |
| SEG13COM3 | 5 | |
| SEG12COM3 | 4 | |
| SEG11COM3 | 3 | |
| SEG10COM3 | 2 | |
| SEG9COM3 | 1 | |
| SEG8COM3 | 0 |
LCDDATA12
- Address
0x7AC- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2SEG26COM0
- 1SEG25COM0
- 0SEG24COM0
3 fields
| Field | Bits | What it does |
|---|---|---|
| SEG26COM0 | 2 | |
| SEG25COM0 | 1 | |
| SEG24COM0 | 0 |
LCDDATA15
- Address
0x7AF- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2SEG26COM1
- 1SEG25COM1
- 0SEG24COM1
3 fields
| Field | Bits | What it does |
|---|---|---|
| SEG26COM1 | 2 | |
| SEG25COM1 | 1 | |
| SEG24COM1 | 0 |
LCDDATA18
- Address
0x7B2- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2SEG26COM2
- 1SEG25COM2
- 0SEG24COM2
3 fields
| Field | Bits | What it does |
|---|---|---|
| SEG26COM2 | 2 | |
| SEG25COM2 | 1 | |
| SEG24COM2 | 0 |
LCDDATA21
- Address
0x7B5- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2SEG26COM3
- 1SEG25COM3
- 0SEG24COM3
3 fields
| Field | Bits | What it does |
|---|---|---|
| SEG26COM3 | 2 | |
| SEG25COM3 | 1 | |
| SEG24COM3 | 0 |