PIC18F26J13 configuration bits The configuration words set the oscillator, the watchdog, the power-up timer, brown-out reset, low-voltage programming and code protection. Pick a setting and the word below updates; the starting values are the defaults in Microchip's device file. In XC8 each setting is a #pragma config NAME = SETTING line.
CONFIG1L · 0xFFF8 0xFF default 0xFF DEBUG Background Debug Enabled Disabled XINST Extended Instruction Set Disabled Enabled STVREN Stack Overflow/Underflow Reset Disabled Enabled CFGPLLEN PLL Enable Configuration Bit PLL Enabled PLL Disabled PLLDIV 96MHz PLL Prescaler Selection (PLLSEL=0) Divide by 12 (48 MHz oscillator input) Divide by 10 (40 MHz oscillator input) Divide by 6 (24 MHz oscillator input) Divide by 5 (20 MHz oscillator input) Divide by 4 (16 MHz oscillator input) Divide by 3 (12 MHz oscillator input) Divide by 2 (8 MHz oscillator input) No prescale (4 MHz oscillator input drives PLL directly) WDTEN Watchdog Timer Disabled - Controlled by SWDTEN bit Enabled CONFIG1H · 0xFFF9 0xF4 default 0xF4 RESERVED RESERVED RESERVED SIGN Config Word Signature Bit 1 · unprogrammed 0 · programmed CP0 Code Protect Program memory is code-protected Program memory is not code-protected CONFIG2L · 0xFFFA 0xFF default 0xFF IESO Internal External Oscillator Switch Over Mode Disabled Enabled FCMEN Fail-Safe Clock Monitor Disabled Enabled CLKOEC EC Clock Out Enable Bit CLKO output disabled on the RA6 pin CLKO output enabled on the RA6 pin SOSCSEL T1OSC/SOSC Power Selection Bits Reserved Low Power T1OSC/SOSC circuit selected Digital (SCLKI) mode selected High Power T1OSC/SOSC circuit selected OSC Oscillator INTOSC INTOSCO (CLKO-RA6) INTOSCPLL INTOSCPLLO (CLKO-RA6) HS HS+PLL EC (CLKO-RA6) EC+PLL (CLKO-RA6) CONFIG2H · 0xFFFB 0xFF default 0xFF RESERVED RESERVED RESERVED WDTPS Watchdog Postscaler 1:1 1:2 1:4 1:8 1:16 1:32 1:64 1:128 1:256 1:512 1:1024 1:2048 1:4096 1:8192 1:16384 1:32768 CONFIG3L · 0xFFFC 0xFF default 0xFF DSWDTPS Deep Sleep Watchdog Postscaler 1:2 (2.1 ms) 1:8 (8.3 ms) 1:32 (33 ms) 1:128 (132 ms) 1:512 (528 ms) 1:2,048 (2.1 seconds) 1:8,192 (8.5 seconds) 1:32,768 (34 seconds) 1:131,072 (135 seconds) 1:524,288 (9 minutes) 1:2,097,152 (36 minutes) 1:8,388,608 (2.4 hours) 1:33,554,432 (9.6 hours) 1:134,217,728 (38.5 hours) 1:536,870,912 (6.4 days) 1:2,147,483,648 (25.7 days) DSWDTEN Deep Sleep Watchdog Timer Disabled Enabled DSBOREN Deep Sleep BOR Disabled Enabled RTCOSC RTCC Clock Select RTCC uses INTRC RTCC uses T1OSC/T1CKI DSWDTOSC DSWDT Clock Select DSWDT uses T1OSC/T1CKI DSWDT uses INTRC CONFIG3H · 0xFFFD 0xFF default 0xFF RESERVED RESERVED RESERVED MSSP7B_EN MSSP address masking 5 Bit address masking mode 7 Bit address masking mode PLLSEL PLL Selection Bit Selects 96MHz PLL Selects 4x PLL ADCSEL ADC 10 or 12 Bit Select 12 - Bit ADC Enabled 10 - Bit ADC Enabled IOL1WAY IOLOCK One-Way Set Enable bit The IOLOCK bit (PPSCON<0>) can be set and cleared as needed The IOLOCK bit (PPSCON<0>) can be set once CONFIG4L · 0xFFFE 0xBF default 0xBF WPCFG Write/Erase Protect Configuration Region Configuration Words page erase/write-protected Configuration Words page not erase/write-protected RESERVED 1 · unprogrammed 0 · programmed WPFP Write/Erase Protect Page Start/End Location Write Protect Program Flash Page 0 Write Protect Program Flash Page 1 Write Protect Program Flash Page 2 Write Protect Program Flash Page 3 Write Protect Program Flash Page 4 Write Protect Program Flash Page 5 Write Protect Program Flash Page 6 Write Protect Program Flash Page 7 Write Protect Program Flash Page 8 Write Protect Program Flash Page 9 Write Protect Program Flash Page 10 Write Protect Program Flash Page 11 Write Protect Program Flash Page 12 Write Protect Program Flash Page 13 Write Protect Program Flash Page 14 Write Protect Program Flash Page 15 Write Protect Program Flash Page 16 Write Protect Program Flash Page 17 Write Protect Program Flash Page 18 Write Protect Program Flash Page 19 Write Protect Program Flash Page 20 Write Protect Program Flash Page 21 Write Protect Program Flash Page 22 Write Protect Program Flash Page 23 Write Protect Program Flash Page 24 Write Protect Program Flash Page 25 Write Protect Program Flash Page 26 Write Protect Program Flash Page 27 Write Protect Program Flash Page 28 Write Protect Program Flash Page 29 Write Protect Program Flash Page 30 Write Protect Program Flash Page 31 Write Protect Program Flash Page 32 Write Protect Program Flash Page 33 Write Protect Program Flash Page 34 Write Protect Program Flash Page 35 Write Protect Program Flash Page 36 Write Protect Program Flash Page 37 Write Protect Program Flash Page 38 Write Protect Program Flash Page 39 Write Protect Program Flash Page 40 Write Protect Program Flash Page 41 Write Protect Program Flash Page 42 Write Protect Program Flash Page 43 Write Protect Program Flash Page 44 Write Protect Program Flash Page 45 Write Protect Program Flash Page 46 Write Protect Program Flash Page 47 Write Protect Program Flash Page 48 Write Protect Program Flash Page 49 Write Protect Program Flash Page 50 Write Protect Program Flash Page 51 Write Protect Program Flash Page 52 Write Protect Program Flash Page 53 Write Protect Program Flash Page 54 Write Protect Program Flash Page 55 Write Protect Program Flash Page 56 Write Protect Program Flash Page 57 Write Protect Program Flash Page 58 Write Protect Program Flash Page 59 Write Protect Program Flash Page 60 Write Protect Program Flash Page 61 Write Protect Program Flash Page 62 Write Protect Program Flash Page 63 CONFIG4H · 0xFFFF 0xF3 default 0xF3 RESERVED RESERVED WPEND Write/Erase Protect Region Select bit (valid when WPDIS = 0) Pages 0 through WPFP<6:0> erase/write protected Pages WPFP<6:0> through Configuration Words erase/write protected WPDIS Write Protect Disable bit WPFP<6:0>/WPEND region erase/write protected WPFP<6:0>/WPEND region ignored 
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