PIC18F44Q35 configuration bits The configuration words set the oscillator, the watchdog, the power-up timer, brown-out reset, low-voltage programming and code protection. Pick a setting and the word below updates; the starting values are the defaults in Microchip's device file. In XC8 each setting is a #pragma config NAME = SETTING line.
CONFIG1 · 0x300000 0xFF default 0xFF CPUHALT CPU Halt bit CPU halts after Reset (no user code execution) CPU operates normally after loading the Configurable Logic Block (CLB)/Special Function Register (SFR) image RSTOSC Reset Oscillator Selection HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1 EXTOSC with 4x PLL, with EXTOSC operating per FEXTOSC bits Secondary Oscillator Low-Frequency Oscillator HFINTOSC with HFFRQ = 4 MHz and CDIV = 4:1 EXTOSC operating per FEXTOSC bits (device manufacturing default) FEXTOSC External Oscillator Selection LP (crystal oscillator) optimized for 32.768 kHz XT (crystal oscillator) above 500 kHz, below 4 MHz HS (crystal oscillator) up to 8 MHz HS (crystal oscillator) up to 16 MHz HS (crystal oscillator) up to 24 MHz HS (crystal oscillator) up to 32 MHz Oscillator not enabled. EC (external clock) below 500 kHz EC (external clock) for 500 kHz to 8 MHz EC (external clock) above 8 MHz CONFIG2 · 0x300001 0xFF default 0xFF FCMENS Fail-Safe Clock Monitor - Secondary XTAL Enable bit Fail-Safe Clock Monitor Disabled Fail-Safe Clock Monitor enabled; timer will flag FSCMP bit and OSFIF interrupt on SOSC failure. FCMENP Fail-Safe Clock Monitor - Primary XTAL Enable bit Fail-Safe Clock Monitor Disabled Fail-Safe Clock Monitor enabled; timer will flag FSCMP bit and OSFIF interrupt on EXTOSC failure. FCMEN Fail-Safe Clock Monitor Enable bit Fail-Safe Clock Monitor disabled Fail-Safe Clock Monitor enabled CLBSU CLB Configuration on Start-up The CLB will be automatically configured during device configuration The CLB will not be automatically configured during device configuration CSWEN Clock Switch Enable bit The NOSC and NDIV bits cannot be changed by user software Writing to NOSC and NDIV is allowed BBEN Boot Block enable bit Boot block enabled Boot block disabled PR1WAY PRLOCKED One-Way Set Enable bit PRLOCKED bit can be set and cleared repeatedly PRLOCKED bit can be cleared and set only once CLKOUTEN Clock out Enable bit CLKOUT function is enabled CLKOUT function is disabled CONFIG3 · 0x300002 0xFF default 0xFF BOREN Brown-out Reset Enable bits Brown-out Reset disabled Brown-out Reset enabled according to SBOREN Brown-out Reset enabled while running, disabled in Sleep; SBOREN is ignored Brown-out Reset enabled , SBOREN bit is ignored LPBOREN Low Power BOR Enable bit Low-Power BOR enabled Low-Power BOR disabled IVT1WAY IVTLOCK bit One-way set enable bit IVTLOCKED bit can be cleared and set repeatedly IVTLOCKED bit can be cleared and set only once MVECEN Multi-vector enable bit Interrupt contoller does not use vector table to prioritze interrupts Multi-vector enabled, Vector table used for interrupts PWRTS Power-up timer selection bits PWRT set at 1ms PWRT set at 16ms PWRT set at 64ms PWRT is disabled MCLRE MCLR Enable bit If LVP = 0, MCLR pin function is port defined function; If LVP =1, RE3 pin fuction is MCLR If LVP = 0, MCLR pin is MCLR; If LVP = 1, RE3 pin function is MCLR CONFIG4 · 0x300003 0xFF default 0xFF XINST Extended Instruction Set Enable bit Extended Instruction Set and Indexed Addressing Mode enabled Extended Instruction Set and Indexed Addressing Mode disabled DEBUG Background Debugger Background Debugger enabled Background Debugger disabled LVP Low Voltage Programming Enable bit HV on MCLR/VPP must be used for programming Low voltage programming enabled. MCLR/VPP pin function is MCLR. MCLRE configuration bit is ignored STVREN Stack Full/Underflow Reset Enable bit Stack full/underflow will not cause Reset Stack full/underflow will cause Reset PPS1WAY PPSLOCK bit One-Way Set Enable bit PPSLOCKED bit can be set and cleared repeatedly (subject to the unlock sequence) PPSLOCKED bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle ZCD1 ZCD1 Disable bit ZCD1 module is always enabled; ZCDMD and ZCDSEN bits are ignored ZCD1 module is disabled. ZCD1 can be enabled by setting the ZCDSEN bit of ZCDCON BORV Brown-out Reset Voltage Selection bits Brown-out Reset Voltage (VBOR) set to 2.85V Brown-out Reset Voltage (VBOR) set to 2.7V Brown-out Reset Voltage (VBOR) set to 2.45V Brown-out Reset Voltage (VBOR) set to 1.9V CONFIG5 · 0x300004 0xFF default 0xFF WDTE WDT operating mode WDT Disabled; SEN is ignored WDT enabled/disabled by SEN bit WDT enabled while sleep=0, suspended when sleep=1; SEN ignored WDT enabled regardless of sleep; SEN is ignored WDTCPS WDT Period selection bits Divider ratio 1:32 Divider ratio 1:64 Divider ratio 1:128 Divider ratio 1:256 Divider ratio 1:512 Divider ratio 1:1024 Divider ratio 1:2048 Divider ratio 1:4096 Divider ratio 1:8192 Divider ratio 1:16384 Divider ratio 1:32768 Divider ratio 1:65536 Divider ratio 1:131072 Divider ratio 1:262144 Divider ratio 1:524288 Divider ratio 1:1048576 Divider ratio 1:2097152 Divider ratio 1:4194304 Divider ratio 1:8388608 Divider ratio 1:32 Divider ratio 1:32 Divider ratio 1:32 Divider ratio 1:32 Divider ratio 1:32 Divider ratio 1:32 Divider ratio 1:32 Divider ratio 1:32 Divider ratio 1:32 Divider ratio 1:32 Divider ratio 1:32 Divider ratio 1:32 Divider ratio 1:65536; software control of WDTPS CONFIG6 · 0x300005 0xFF default 0xFF WDTCCS WDT input clock selector WDT reference clock is the 31.0 kHz LFINTOSC WDT reference clock is the 31.25 kHz MFINTOSC WDT reference clock is SOSC Software Control WDTCWS WDT Window Select bits window delay = 87.5; no software control; keyed access required window delay = 75 percent of time; no software control; keyed access required window delay = 62.5 percent of time; no software control; keyed access required window delay = 50 percent of time; no software control; keyed access required window delay = 37.5 percent of time; no software control; keyed access required window delay = 25 percent of time; no software control; keyed access required window always open (100%); no software control; keyed access required window always open (100%); software control; keyed access not required CONFIG7 · 0x300006 0xFF default 0xFF BBSIZE Boot Block Size Selection bits Boot Block size is 128 words Boot Block size is 256 words Boot Block size is 384 words Boot Block size is 512 words Boot Block size is 640 words Boot Block size is 768 words Boot Block size is 896 words Boot Block size is 1024 words Boot Block size is 1152 words Boot Block size is 1280 words Boot Block size is 1408 words Boot Block size is 1536 words Boot Block size is 1664 words Boot Block size is 1792 words Boot Block size is 1920 words Boot Block size is 2048 words Boot Block size is 2176 words Boot Block size is 2304 words Boot Block size is 2432 words Boot Block size is 2560 words Boot Block size is 2688 words Boot Block size is 2816 words Boot Block size is 2944 words Boot Block size is 3072 words Boot Block size is 3200 words Boot Block size is 3328 words Boot Block size is 3456 words Boot Block size is 3584 words Boot Block size is 3712 words Boot Block size is 3840 words Boot Block size is 3968 words Boot Block size is 4096 words Boot Block size is 4224 words Boot Block size is 4352 words Boot Block size is 4480 words Boot Block size is 4608 words Boot Block size is 4736 words Boot Block size is 4864 words Boot Block size is 4992 words Boot Block size is 5120 words Boot Block size is 5248 words Boot Block size is 5376 words Boot Block size is 5504 words Boot Block size is 5632 words Boot Block size is 5760 words Boot Block size is 5888 words Boot Block size is 6016 words Boot Block size is 6144 words Boot Block size is 6272 words Boot Block size is 6400 words Boot Block size is 6528 words Boot Block size is 6656 words Boot Block size is 6784 words Boot Block size is 6912 words Boot Block size is 7040 words Boot Block size is 7168 words Boot Block size is 7296 words Boot Block size is 7424 words Boot Block size is 7552 words Boot Block size is 7680 words Boot Block size is 7808 words Boot Block size is 7936 words Boot Block size is 8064 words Boot Block size is 8192 words Boot Block size is 8320 words Boot Block size is 8448 words Boot Block size is 8576 words Boot Block size is 8704 words Boot Block size is 8832 words Boot Block size is 8960 words Boot Block size is 9088 words Boot Block size is 9216 words Boot Block size is 9344 words Boot Block size is 9472 words Boot Block size is 9600 words Boot Block size is 9728 words Boot Block size is 9856 words Boot Block size is 9984 words Boot Block size is 10112 words Boot Block size is 10240 words Boot Block size is 10368 words Boot Block size is 10496 words Boot Block size is 10624 words Boot Block size is 10752 words Boot Block size is 10880 words Boot Block size is 11008 words Boot Block size is 11136 words Boot Block size is 11264 words Boot Block size is 11392 words Boot Block size is 11520 words Boot Block size is 11648 words Boot Block size is 11776 words Boot Block size is 11904 words Boot Block size is 12032 words Boot Block size is 12160 words Boot Block size is 12288 words Boot Block size is 12416 words Boot Block size is 12544 words Boot Block size is 12672 words Boot Block size is 12800 words Boot Block size is 12928 words Boot Block size is 13056 words Boot Block size is 13184 words Boot Block size is 13312 words Boot Block size is 13440 words Boot Block size is 13568 words Boot Block size is 13696 words Boot Block size is 13824 words Boot Block size is 13952 words Boot Block size is 14080 words Boot Block size is 14208 words Boot Block size is 14336 words Boot Block size is 14464 words Boot Block size is 14592 words Boot Block size is 14720 words Boot Block size is 14848 words Boot Block size is 14976 words Boot Block size is 15104 words Boot Block size is 15232 words Boot Block size is 15360 words Boot Block size is 15488 words Boot Block size is 15616 words Boot Block size is 15744 words Boot Block size is 15872 words Boot Block size is 16000 words Boot Block size is 16128 words Boot Block size is 16256 words Boot Block size is 16384 words Boot Block size is 32768 words CONFIG8 · 0x300007 0xFF default 0xFF CLBSA CLB Configuration Start Address (High Byte) CONFIG9 · 0x300008 0xFF default 0xFF WRTAPP Application Block write protection bit Application Block write protected Application Block not write protected WRTSAF SAF Write protection bit SAF Write Protected SAF not Write Protected WRTD Data EEPROM Write Protection bit Data EEPROM Write protected Data EEPROM not Write protected WRTC Configuration Register Write Protection bit Configuration registers Write protected Configuration registers not Write protected WRTB Boot Block Write Protection bit Boot Block Write protected Boot Block not Write protected CONFIG10 · 0x300009 0xFF default 0xFF CP PFM Code Protection bit PFM code protection enabled PFM code protection disabled CONFIG11 · 0x30000A 0xFF default 0xFF CPD Data EEPROM Code Protection bit Data EEPROM code protection enabled Data EEPROM code protection disabled 
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