PIC18LF25J11 configuration bits The configuration words set the oscillator, the watchdog, the power-up timer, brown-out reset, low-voltage programming and code protection. Pick a setting and the word below updates; the starting values are the defaults in Microchip's device file. In XC8 each setting is a #pragma config NAME = SETTING line.
CONFIG1L · 0x7FF8 0xE1 default 0xE1 DEBUG Background Debug Enabled Disabled XINST Extended Instruction Set Disabled Enabled STVREN Stack Overflow/Underflow Reset Disabled Enabled WDTEN Watchdog Timer Disabled - Controlled by SWDTEN bit Enabled CONFIG1H · 0x7FF9 0xF4 default 0xF4 RESERVED RESERVED SIGN Config Word Signature Bit 1 · unprogrammed 0 · programmed CP0 Code Protect Program memory is code-protected Program memory is not code-protected CONFIG2L · 0x7FFA 0xDF default 0xDF IESO Internal External Oscillator Switch Over Mode Disabled Enabled FCMEN Fail-Safe Clock Monitor Disabled Enabled LPT1OSC Low-Power Timer1 Oscillator Low-power operation High-power operation T1DIG T1OSCEN Enforcement Secondary Oscillator clock source may not be selected Secondary Oscillator clock source may be selected OSC Oscillator INTOSC INTOSCO (CLKO-RA6) INTOSCPLL INTOSCPLLO (CLKO-RA6) HS HS+PLL EC (CLKO-RA6) EC+PLL (CLKO-RA6) CONFIG2H · 0x7FFB 0xFF default 0xFF RESERVED RESERVED WDTPS Watchdog Postscaler 1:1 1:2 1:4 1:8 1:16 1:32 1:64 1:128 1:256 1:512 1:1024 1:2048 1:4096 1:8192 1:16384 1:32768 CONFIG3L · 0x7FFC 0xFF default 0xFF DSWDTPS Deep Sleep Watchdog Postscaler 1:2 (2.1 ms) 1:8 (8.3 ms) 1:32 (33 ms) 1:128 (132 ms) 1:512 (528 ms) 1:2,048 (2.1 seconds) 1:8,192 (8.5 seconds) 1:32,768 (34 seconds) 1:131,072 (135 seconds) 1:524,288 (9 minutes) 1:2,097,152 (36 minutes) 1:8,388,608 (2.4 hours) 1:33,554,432 (9.6 hours) 1:134,217,728 (38.5 hours) 1:536,870,912 (6.4 days) 1:2,147,483,648 (25.7 days) DSWDTEN Deep Sleep Watchdog Timer Disabled Enabled DSBOREN Deep Sleep BOR Disabled Enabled RTCOSC RTCC Clock Select RTCC uses INTRC RTCC uses T1OSC/T1CKI DSWDTOSC DSWDT Clock Select DSWDT uses T1OSC/T1CKI DSWDT uses INTRC CONFIG3H · 0x7FFD 0xF9 default 0xF9 RESERVED RESERVED MSSP7B_EN MSSP address masking 5 Bit address masking mode 7 Bit address masking mode IOL1WAY IOLOCK One-Way Set Enable bit The IOLOCK bit (PPSCON<0>) can be set and cleared as needed The IOLOCK bit (PPSCON<0>) can be set once CONFIG4L · 0x7FFE 0xDF default 0xDF WPCFG Write/Erase Protect Configuration Region Configuration Words page erase/write-protected Configuration Words page not erase/write-protected WPEND Write/Erase Protect Region Select (valid when WPDIS = 0) Page 0 through WPFP<5:0> erase/write protected Page WPFP<5:0> through Configuration Words erase/write protected RESERVED 1 · unprogrammed 0 · programmed WPFP Write/Erase Protect Page Start/End Location Write Protect Program Flash Page 0 Write Protect Program Flash Page 1 Write Protect Program Flash Page 2 Write Protect Program Flash Page 3 Write Protect Program Flash Page 4 Write Protect Program Flash Page 5 Write Protect Program Flash Page 6 Write Protect Program Flash Page 7 Write Protect Program Flash Page 8 Write Protect Program Flash Page 9 Write Protect Program Flash Page 10 Write Protect Program Flash Page 11 Write Protect Program Flash Page 12 Write Protect Program Flash Page 13 Write Protect Program Flash Page 14 Write Protect Program Flash Page 15 Write Protect Program Flash Page 16 Write Protect Program Flash Page 17 Write Protect Program Flash Page 18 Write Protect Program Flash Page 19 Write Protect Program Flash Page 20 Write Protect Program Flash Page 21 Write Protect Program Flash Page 22 Write Protect Program Flash Page 23 Write Protect Program Flash Page 24 Write Protect Program Flash Page 25 Write Protect Program Flash Page 26 Write Protect Program Flash Page 27 Write Protect Program Flash Page 28 Write Protect Program Flash Page 29 Write Protect Program Flash Page 30 Write Protect Program Flash Page 31 CONFIG4H · 0x7FFF 0xF1 default 0xF1 RESERVED WPDIS Write Protect Disable bit WPFP<5:0>/WPEND region erase/write protected WPFP<5:0>/WPEND region ignored 
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