PIC24FJ192GA106 configuration bits The configuration words set the oscillator and PLL, the watchdog, the debugger pins, brown-out reset and code protection: they are the last words of flash (from 0x020BF8), programmed with the code. Pick a setting and the word below updates; the starting values are the defaults in Microchip's device file, and an erased bit reads 1. In XC16 each setting is a #pragma config FNOSC = FRC line.
CONFIG3 · 0x20BFA 0xFFFF default 0xFFFF WPEND Segment Write Protection End Page Select bit Write Protect from page 0 to WPFP Write Protect from WPFP to the last page of memory WPCFG Configuration Word Code Page Protection Select bit Last page and Flash configuration words are code-protected Last page(at the top of program memory) and Flash configuration words are not protected WPDIS Segment Write Protection Disable bit Segmented code protection enabled Segmented code protection disabled WPFP Write Protection Flash Page Segment Boundary Page 0 (0x00) Page 1 (0x400) Page 2 (0x800) Page 3 (0xC00) Page 4 (0x1000) Page 5 (0x1400) Page 6 (0x1800) Page 7 (0x1C00) Page 8 (0x2000) Page 9 (0x2400) Page 10 (0x2800) Page 11 (0x2C00) Page 12 (0x3000) Page 13 (0x3400) Page 14 (0x3800) Page 15 (0x3C00) Page 16 (0x4000) Page 17 (0x4400) Page 18 (0x4800) Page 19 (0x4C00) Page 20 (0x5000) Page 21 (0x5400) Page 22 (0x5800) Page 23 (0x5C00) Page 24 (0x6000) Page 25 (0x6400) Page 26 (0x6800) Page 27 (0x6C00) Page 28 (0x7000) Page 29 (0x7400) Page 30 (0x7800) Page 31 (0x7C00) Page 32 (0x8000) Page 33 (0x8400) Page 34 (0x8800) Page 35 (0x8C00) Page 36 (0x9000) Page 37 (0x9400) Page 38 (0x9800) Page 39 (0x9C00) Page 40 (0xA000) Page 41 (0xA400) Page 42 (0xA800) Page 43 (0xAC00) Page 44 (0xB000) Page 45 (0xB400) Page 46 (0xB800) Page 47 (0xBC00) Page 48 (0xC000) Page 49 (0xC400) Page 50 (0xC800) Page 51 (0xCC00) Page 52 (0xD000) Page 53 (0xD400) Page 54 (0xD800) Page 55 (0xDC00) Page 56 (0xE000) Page 57 (0xE400) Page 58 (0xE800) Page 59 (0xEC00) Page 60 (0xF000) Page 61 (0xF400) Page 62 (0xF800) Page 63 (0xFC00) Page 64 (0x10000) Page 65 (0x10400) Page 66 (0x10800) Page 67 (0x10C00) Page 68 (0x11000) Page 69 (0x11400) Page 70 (0x11800) Page 71 (0x11C00) Page 72 (0x12000) Page 73 (0x12400) Page 74 (0x12800) Page 75 (0x12C00) Page 76 (0x13000) Page 77 (0x13400) Page 78 (0x13800) Page 79 (0x13C00) Page 80 (0x14000) Page 81 (0x14400) Page 82 (0x14800) Page 83 (0x14C00) Page 84 (0x15000) Page 85 (0x15400) Page 86 (0x15800) Page 87 (0x15C00) Page 88 (0x16000) Page 89 (0x16400) Page 90 (0x16800) Page 91 (0x16C00) Page 92 (0x17000) Page 93 (0x17400) Page 94 (0x17800) Page 95 (0x17C00) Page 96 (0x18000) Page 97 (0x18400) Page 98 (0x18800) Page 99 (0x18C00) Page 100 (0x19000) Page 101 (0x19400) Page 102 (0x19800) Page 103 (0x19C00) Page 104 (0x1A000) Page 105 (0x1A400) Page 106 (0x1A800) Page 107 (0x1AC00) Page 108 (0x1B000) Page 109 (0x1B400) Page 110 (0x1B800) Page 111 (0x1BC00) Page 112 (0x1C000) Page 113 (0x1C400) Page 114 (0x1C800) Page 115 (0x1CC00) Page 116 (0x1D000) Page 117 (0x1D400) Page 118 (0x1D800) Page 119 (0x1DC00) Page 120 (0x1E000) Page 121 (0x1E400) Page 122 (0x1E800) Page 123 (0x1EC00) Page 124 (0x1F000) Page 125 (0x1F400) Page 126 (0x1F800) Page 127 (0x1FC00) Page 128 (0x20000) Page 129 (0x20400) Page 130 (0x20800) Highest Page (same as page 130) CONFIG2 · 0x20BFC 0xF7FF default 0xF7FF IESO Internal External Switch Over Mode IESO mode (Two-speed start-up)disabled IESO mode (Two-speed start-up) enabled FNOSC Oscillator Select Fast RC Oscillator (FRC) Fast RC oscillator with Postscaler and PLL module (FRCPLL) Primary oscillator (XT, HS, EC) Primary oscillator (XT, HS, EC) with PLL module (XTPLL,HSPLL, ECPLL) Secondary oscillator (SOSC) Low-Power RC oscillator (LPRC) Fast RC oscillator with Postscaler (FRCDIV) FCKSM Clock Switching and Monitor Both Clock switching and Fail-safe Clock Monitor are enabled Clock switching is enabled, Fail-safe Clock Monitor is disabled Both Clock Switching and Fail-safe Clock Monitor are disabled 3 (not named) OSCIOFNC Primary Oscillator Output Function OSCO functions as port I/O (RC15) OSCO functions as CLKO (FOSC/2) IOL1WAY IOLOCK One-Way Set Enable bit Unlimited Writes To RP Registers Write RP Registers Once I2C2SEL I2C2 Pin Select bit Use alternate ASCL2/ASDA2 pins for I2C2 Use Default SCL2/SDA2 pins for I2C2 POSCMOD Primary Oscillator Select EC oscillator mode selected XT oscillator mode selected HS oscillator mode selected Primary oscillator disabled CONFIG1 · 0x20BFE 0x7FFF default 0x7FFF JTAGEN JTAG Port Enable JTAG port is disabled JTAG port is enabled GCP General Code Segment Code Protect Code protection is enabled for the entire program memory space Code protection is disabled GWRP General Code Segment Write Protect Writes to program memory are disabled Writes to program memory are allowed BKBUG Background Debug Device resets into debug mode Device resets into Operational mode ICS Comm Channel Select Emulator functions are shared with PGEC3/PGED3 Emulator functions are shared with PGEC2/PGED2 Emulator functions are shared with PGEC1/PGED1 FWDTEN Watchdog Timer Enable Watchdog Timer is disabled Watchdog Timer is enabled WINDIS Watchdog Timer Window Windowed Watchdog Timer enabled; FWDTEN must be 1 Standard Watchdog Timer is enabled,(Windowed-mode is disabled) FWPSA WDT Prescaler Prescaler ratio of 1:32 Prescaler ratio of 1:128 WDTPS Watchdog Timer Postscaler 1:1 1:2 1:4 1:8 1:16 1:32 1:64 1:128 1:256 1:512 1:1,024 1:2,048 1:4,096 1:8,192 1:16,384 1:32,768