PIC32CK1025GC01064 memory map

Where everything sits, at its exact address. The PIC32CK1025GC01064 has one 32-bit address space that its Arm Cortex-M33 core reaches flash, SRAM and the peripherals through alike: flash at 0x0C000000, SRAM at 0x20000000, the peripherals from 0x40000000 and the core's own system registers (SysTick, the NVIC) at 0xE000E000.

Memory map

Flash, SRAM and the peripheral buses in the one 32-bit space (the calibration and user rows are listed below).

Private peripheral bus0xE0000000 – 0xE00FFFFF1 MB

RESERVED0x46000000 – 0x460015FF5.5 KB

HPB2 BRIDGE0x45000000 – 0x4502FFFF192 KB

HPB1 BRIDGE0x44800000 – 0x4482FFFF192 KB

HPB0 BRIDGE0x44000000 – 0x4402FFFF192 KB

SRAM0x20000000 – 0x2003FFFF256 KB

External serial memory, execute in place (SQI_XIP)0x10000000 – 0x1FFFFFFF256 MB

SQI SFR0x0FFFF000 – 0x0FFFFFFF4 KB

FLASH PFM0x0C000000 – 0x0C0FFFFF1 MB

FLASH CFM BOOTCFG20x0A00A000 – 0x0A00AFFF4 KB

FLASH CFM USERCFG20x0A008000 – 0x0A008FFF4 KB

FLASH CFM CALBACKUP0x0A006000 – 0x0A006FFF4 KB

FLASH CFM DALCFG0x0A004000 – 0x0A004FFF4 KB

FLASH CFM BOOTCFG10x0A002000 – 0x0A002FFF4 KB

FLASH CFM USERCFG10x0A000000 – 0x0A000FFF4 KB

FLASH BFM0x08000000 – 0x0801FFFF128 KB

SRAM0x00003000 – 0x0000303F64 B

SRAM0x00001000 – 0x000013FF1 KB

SRAM0x00000000 – 0x00000FFF4 KB

Every segment

Segment	Space	Start	End	Size	Page
Private peripheral bus	base	`0xE0000000`	`0xE00FFFFF`	1 MB
SRAM	base	`0x00000000`	`0x00000FFF`	4 KB
SRAM	base	`0x00001000`	`0x000013FF`	1 KB
SRAM	base	`0x00003000`	`0x0000303F`	64 B
PRM ROM	base	`0x04000000`	`0x04007FFF`	32 KB
FLASH BFM	base	`0x08000000`	`0x0801FFFF`	128 KB	4096 B
FLASH CFM USERCFG1	base	`0x0A000000`	`0x0A000FFF`	4 KB	4096 B
FLASH CFM USEROTP1	base	`0x0A001000`	`0x0A001FFF`	4 KB	4096 B
FLASH CFM BOOTCFG1	base	`0x0A002000`	`0x0A002FFF`	4 KB	4096 B
FLASH CFM DALCFG	base	`0x0A004000`	`0x0A004FFF`	4 KB	4096 B
FLASH CFM CALBACKUP	base	`0x0A006000`	`0x0A006FFF`	4 KB	4096 B
FLASH CFM CALOTP	base	`0x0A007000`	`0x0A007FFF`	4 KB	4096 B
FLASH CFM USERCFG2	base	`0x0A008000`	`0x0A008FFF`	4 KB	4096 B
FLASH CFM USEROTP2	base	`0x0A009000`	`0x0A009FFF`	4 KB	4096 B
FLASH CFM BOOTCFG2	base	`0x0A00A000`	`0x0A00AFFF`	4 KB	4096 B
FLASH PFM	base	`0x0C000000`	`0x0C0FFFFF`	1 MB	4096 B
SQI SFR	base	`0x0FFFF000`	`0x0FFFFFFF`	4 KB
External serial memory, execute in place (SQI_XIP)	base	`0x10000000`	`0x1FFFFFFF`	256 MB
SRAM	base	`0x20000000`	`0x2003FFFF`	256 KB
HPB0 BRIDGE	base	`0x44000000`	`0x4402FFFF`	192 KB
HPB1 BRIDGE	base	`0x44800000`	`0x4482FFFF`	192 KB
HPB2 BRIDGE	base	`0x45000000`	`0x4502FFFF`	192 KB
RESERVED	base	`0x46000000`	`0x460015FF`	5.5 KB