The 13 registers of NVM (Flash controller (NVM)), from 0xBF800A00, with their reset value and every field. The PIC32MK1024MCF064 has 1848 registers in 120 peripherals, one page each.
Most PIC32 SFRs have three more registers right after them: CLR at +4, SET at +8 and INV at +C (T1CONCLR, T1CONSET, T1CONINV), which clear, set or flip just the bits written as 1, in one write.
NVM Flash controller (NVM)
NVMCONFlash Programming Control Register
Address
0xBF800A00
Reset
0x00000000
Access
read/write
Size
32-bit
7 fields
Field
Bits
What it does
WR
15
Write Control bit
0 Flash operation is complete or inactive
1 Initiate a Flash operation
WREN
14
Write Enable bit
0 Disable writes to WR bit and enables writes to the NVMOP bits
1 Enable writes to the WR bit and disables writes to the NVMOP bits
WRERR
13
Write Error bit
0 Program or erase sequence completed normally
1 Program or erase sequence did not complete successfully
LVDERR
12
Low-Voltage Detect Error bit
0 Voltage level is acceptable for programming
1 Low-voltage detected (possible data corruption
PFSWAP
7
Program Flash Bank Swap Control bit
0 Program Flash Bank 1 is mapped to the lower mapped region and program Flash Bank 2 is mapped to the upper mapped region
1 Program Flash Bank 2 is mapped to the lower mapped region and program Flash Bank 1 is mapped to the upper mapped region
BFSWAP
6
Boot Flash Bank Alias Swap Control bit
0 Boot Flash Bank 1 is mapped to the lower boot alias and boot Flash Bank 2 is mapped to the upper boot alias
1 Boot Flash Bank 2 is mapped to the lower boot alias and boot Flash Bank 1 is mapped to the upper boot alias
NVMOP
3:0
NVM Operation bits
0 No operation
1 Word program operation: programs word selected by NVMADDR
2 Quad Word (128-bit) program operation: programs the 128-bit Flash word selected by NVMADDR
3 Program erase operation: erase all of program Flash memory (all pages must be unprotected
3 Row program operation: programs row selected by NVMADDR
4 Reserved
4 Page erase operation: erases page selected by NVMADDR
5 Lower program Flash memory erase operation: erases only the lower mapped region of program Flash (all pages in that region must be unprotected)
6 Upper program Flash memory erase operation: erases only the upper mapped region of program Flash (all pages in that region must be unprotected)
7 Reserved
NVMKEYProgramming Unlock Register
Address
0xBF800A10
Reset
0x00000000
Access
write only
Size
32-bit
NVMADDRFlash Address Register
Address
0xBF800A20
Reset
0x00000000
Access
read/write
Size
32-bit
NVMDATA0Flash Data Register (x = 0-3
Address
0xBF800A30
Reset
0x00000000
Access
read/write
Size
32-bit
NVMDATA1Flash Data Register (x = 0-3
Address
0xBF800A40
Reset
0x00000000
Access
read/write
Size
32-bit
NVMDATA2Flash Data Register (x = 0-3
Address
0xBF800A50
Reset
0x00000000
Access
read/write
Size
32-bit
NVMDATA3Flash Data Register (x = 0-3
Address
0xBF800A60
Reset
0x00000000
Access
read/write
Size
32-bit
NVMSRCADDRSource Data Address Register
Address
0xBF800A70
Reset
0x00000000
Access
read/write
Size
32-bit
NVMPWPProgram Flash Write-Protect Register
Address
0xBF800A80
Reset
0x80000000
Access
read/write
Size
32-bit
2 fields
Field
Bits
What it does
PWP
23:0
PWPULOCK
31
Program Flash Memory Page Write-protect Unlock bit
0 Register is locked and cannot be modified
1 Register is not locked and can be modified
NVMBWPFlash Boot (Page) Write-Protect Register
Address
0xBF800A90
Reset
0x00009FDF
Access
read/write
Size
32-bit
12 fields
Field
Bits
What it does
LBWPULOCK
15
Lower Boot Alias Write-protect Unlock bit
0 LBWPx bits are locked and cannot be modified
2 LBWPx bits are not locked and can be modified
LBWP4
12
Lower Boot Alias Page 4 Write-protect bit
0 Write protection for physical address 0x01FC10000 through 0x1FC13FFF enabled
0 Write protection for physical address 0x01FC10000 through 0x1FC13FFF disabled
LBWP3
11
Lower Boot Alias Page 3 Write-protect bit
0 Write protection for physical address 0x01FC0C000 through 0x1FC0FFFF enabled
0 Write protection for physical address 0x01FC0C000 through 0x1FC0FFFF disabled
LBWP2
10
Lower Boot Alias Page 2 Write-protect bit
0 Write protection for physical address 0x01FC08000 through 0x1FC0BFFF enabled
0 Write protection for physical address 0x01FC08000 through 0x1FC0BFFF disabled
LBWP1
9
Lower Boot Alias Page 1 Write-protect bit
0 Write protection for physical address 0x01FC04000 through 0x1FC07FFF enabled
0 Write protection for physical address 0x01FC04000 through 0x1FC07FFF disabled
LBWP0
8
Lower Boot Alias Page 0 Write-protect bit
0 Write protection for physical address 0x01FC00000 through 0x1FC03FFF enabled
0 Write protection for physical address 0x01FC00000 through 0x1FC03FFF disabled
UBWPULOCK
7
Upper Boot Alias Write-protect Unlock bit
0 UBWPx bits are not locked and can be modified
0 UBWPx bits are locked and cannot be modified
UBWP4
4
Upper Boot Alias Page 4 Write-protect bit
0 Write protection for physical address 0x01FC30000 through 0x1FC33FFF disabled
1 Write protection for physical address 0x01FC30000 through 0x1FC33FFF enabled
UBWP3
3
Upper Boot Alias Page 3 Write-protect bit
0 Write protection for physical address 0x01FC2C000 through 0x1FC2FFFF disabled
1 Write protection for physical address 0x01FC2C000 through 0x1FC2FFFF enabled
UBWP2
2
Upper Boot Alias Page 2 Write-protect bit
0 Write protection for physical address 0x01FC28000 through 0x1FC2BFFF disabled
1 Write protection for physical address 0x01FC28000 through 0x1FC2BFFF enabled
UBWP1
1
Upper Boot Alias Page 1 Write-protect bit
0 Write protection for physical address 0x01FC24000 through 0x1FC27FFF disabled
1 Write protection for physical address 0x01FC24000 through 0x1FC27FFF enabled
UBWP0
0
Upper Boot Alias Page 0 Write-protect bit
0 Write protection for physical address 0x01FC20000 through 0x1FC23FFF disabled
1 Write protection for physical address 0x01FC20000 through 0x1FC23FFF enabled
NVMCON2Flash Programming Control Register 2
Address
0xBF800AA0
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
Field
Bits
What it does
SWAPLOCK
7:6
Flash Memory Swap Lock Control bits
0 PFSWAP and BFSWAP are writable and SWAPLOCK is writable
1 PFSWAP and BFSWAP are not writable and SWAPLOCK is writable
2 PFSWAP and BFSWAP are not writable and SWAPLOCK is writable
3 PFSWAP and BFSWAP are not writable and SWAPLOCK is not writable
BETA