BETAPIC32MM0064GPL020 interrupts
The 40 interrupt sources (IRQs) of the interrupt controller (EVIC). IRQ n has its flag in IFSx and its enable bit in IECx, bit n mod 32 of register n ÷ 32; each source jumps to its vector, one per IRQ. With multi-vector mode on (INTCONbits.MVEC = 1) each vector has its own handler; in XC32 it is void __ISR(_TIMER_1_VECTOR, IPL4AUTO) Timer1Handler(void), its IPL matching the priority set in IPCx.
| IRQ | Vector | Name | Handler | Source |
|---|---|---|---|---|
| 0 | 0 | CORE_TIMER | __ISR(_CORE_TIMER_VECTOR, IPL4AUTO) | Core Timer |
| 1 | 1 | CORE_SOFTWARE_0 | __ISR(_CORE_SOFTWARE_0_VECTOR, IPL4AUTO) | Core Software 0 |
| 2 | 2 | CORE_SOFTWARE_1 | __ISR(_CORE_SOFTWARE_1_VECTOR, IPL4AUTO) | Core Software 1 |
| 3 | 3 | EXTERNAL_0 | __ISR(_EXTERNAL_0_VECTOR, IPL4AUTO) | External 0 |
| 4 | 4 | EXTERNAL_1 | __ISR(_EXTERNAL_1_VECTOR, IPL4AUTO) | External 1 |
| 5 | 5 | EXTERNAL_2 | __ISR(_EXTERNAL_2_VECTOR, IPL4AUTO) | External 2 |
| 6 | 6 | EXTERNAL_3 | __ISR(_EXTERNAL_3_VECTOR, IPL4AUTO) | External 3 |
| 7 | 7 | EXTERNAL_4 | __ISR(_EXTERNAL_4_VECTOR, IPL4AUTO) | External 4 |
| 8 | 8 | CHANGE_NOTICE_A | __ISR(_CHANGE_NOTICE_A_VECTOR, IPL4AUTO) | PORT A Change Notification |
| 9 | 9 | CHANGE_NOTICE_B | __ISR(_CHANGE_NOTICE_B_VECTOR, IPL4AUTO) | PORT B Change Notification |
| 10 | 10 | CHANGE_NOTICE_C | __ISR(_CHANGE_NOTICE_C_VECTOR, IPL4AUTO) | PORT C Change Notification |
| 11 | 11 | TIMER_1 | __ISR(_TIMER_1_VECTOR, IPL4AUTO) | Timer 1 |
| 12 | 12 | COMPARATOR_1 | __ISR(_COMPARATOR_1_VECTOR, IPL4AUTO) | Comparator 1 |
| 13 | 13 | COMPARATOR_2 | __ISR(_COMPARATOR_2_VECTOR, IPL4AUTO) | Comparator 2 |
| 14 | 14 | RTCC | __ISR(_RTCC_VECTOR, IPL4AUTO) | Real Time Clock Alarm |
| 15 | 15 | ADC | __ISR(_ADC_VECTOR, IPL4AUTO) | ADC Conversion Done |
| 16 | 16 | CRC | __ISR(_CRC_VECTOR, IPL4AUTO) | CRC |
| 17 | 17 | HLVD | __ISR(_HLVD_VECTOR, IPL4AUTO) | HLVD |
| 18 | 18 | CLC1 | __ISR(_CLC1_VECTOR, IPL4AUTO) | Logic Cell 1 |
| 19 | 19 | CLC2 | __ISR(_CLC2_VECTOR, IPL4AUTO) | Logic Cell 2 |
| 20 | 20 | SPI1_ERR | __ISR(_SPI1_ERR_VECTOR, IPL4AUTO) | SPI 1 Error |
| 21 | 21 | SPI1_TX | __ISR(_SPI1_TX_VECTOR, IPL4AUTO) | SPI 1 Transmission |
| 22 | 22 | SPI1_RX | __ISR(_SPI1_RX_VECTOR, IPL4AUTO) | SPI 1 Reception |
| 23 | 23 | UART1_RX | __ISR(_UART1_RX_VECTOR, IPL4AUTO) | UART 1 Reception |
| 24 | 24 | UART1_TX | __ISR(_UART1_TX_VECTOR, IPL4AUTO) | UART 1 Transmission |
| 25 | 25 | UART1_ERR | __ISR(_UART1_ERR_VECTOR, IPL4AUTO) | UART 1 Error |
| 29 | 29 | CCP1 | __ISR(_CCP1_VECTOR, IPL4AUTO) | CCP 1 Input Capture or Output Compare |
| 30 | 30 | CCT1 | __ISR(_CCT1_VECTOR, IPL4AUTO) | CCP 1 Timer |
| 31 | 31 | CCP2 | __ISR(_CCP2_VECTOR, IPL4AUTO) | CCP 2 Input Capture or Output Compare |
| 32 | 32 | CCT2 | __ISR(_CCT2_VECTOR, IPL4AUTO) | CCP 2 Timer |
| 33 | 33 | CCP3 | __ISR(_CCP3_VECTOR, IPL4AUTO) | CCP 3 Input Capture or Output Compare |
| 34 | 34 | CCT3 | __ISR(_CCT3_VECTOR, IPL4AUTO) | CCP 3 Timer |
| 37 | 37 | SPI2_ERR | __ISR(_SPI2_ERR_VECTOR, IPL4AUTO) | SPI 2 Error |
| 38 | 38 | SPI2_TX | __ISR(_SPI2_TX_VECTOR, IPL4AUTO) | SPI 2 Transmission |
| 39 | 39 | SPI2_RX | __ISR(_SPI2_RX_VECTOR, IPL4AUTO) | SPI 2 Reception |
| 40 | 40 | UART2_RX | __ISR(_UART2_RX_VECTOR, IPL4AUTO) | UART 2 Reception |
| 41 | 41 | UART2_TX | __ISR(_UART2_TX_VECTOR, IPL4AUTO) | UART 2 Transmission |
| 42 | 42 | UART2_ERR | __ISR(_UART2_ERR_VECTOR, IPL4AUTO) | UART 2 Error |
| 46 | 46 | NVM | __ISR(_NVM_VECTOR, IPL4AUTO) | NVM Program or Erase Complete |
| 47 | 47 | PERFORMANCE_COUNTER | __ISR(_PERFORMANCE_COUNTER_VECTOR, IPL4AUTO) | Core Performance Counter |