PIC32MM0256GPM028 RCON registers

The 4 registers of RCON (Reset control), from 0xBF8026E0, with their reset value and every field. The PIC32MM0256GPM028 has 419 registers in 52 peripherals, one page each.

Most PIC32 SFRs have three more registers right after them: CLR at +4, SET at +8 and INV at +C (T1CONCLR, T1CONSET, T1CONINV), which clear, set or flip just the bits written as 1, in one write.

RCON Reset control

RCONReset Control Register

Address: 0xBF8026E0
Reset: 0x00000003
Access: read/write
Size: 32-bit

12 fields

Field	Bits	What it does
PORCORE	30
BCFGERR	27
BCFGFAIL	26
CMR	9	Configuration Mismatch Reset Flag bit `0` A Configuration Mismatch Reset has not occurred `1` A Configuration Mismatch Reset has occurred
EXTR	7	External Reset Pin Flag bit `0` Master Clear (pin) Reset has not occurred `1` Master Clear (pin) Reset has occurred
SWR	6	Software Reset Flag bit `0` Software Reset was not executed `1` Software Reset was executed
WDTO	4	Watchdog Timer Time-out Flag bit `0` WDT Time-out has not occurred `1` WDT Time-out has occurred
SLEEP	3	Wake From Sleep Flag bit `0` Device was not in Sleep mode `1` Device was in Sleep mode
IDLE	2	Wake From Idle Flag bit `0` Device was not in Idle mode `1` Device was in Idle mode
BOR	1	Brown-out Reset Flag bit `0` Brown-out Reset has not occurred `1` Brown-out Reset has occurred
POR	0	Power-on Reset Flag bit `0` Power-on Reset has not occurred `1` Power-on Reset has occurred
PORIO	31

RSWRST

Address: 0xBF8026F0
Reset: 0x00000000
Access: write only
Size: 32-bit

1 field

Field	Bits	What it does
SWRST	0

RNMICONNon-Maskable Interrupt (NMI) Control Register

Address: 0xBF802700
Reset: 0x00000000
Access: read/write
Size: 32-bit

7 fields

Field	Bits	What it does
WDTO	24
SWNMI	23	Software NMI Trigger `0` An NMI will not be generated `1` An NMI will be generated
GNMI	19	General NMI bit `0` A general NMI event has not been detected `1` A general NMI event has been detected or a user-initiated NMI event has occurred
LVD	18
CF	17	Clock Fail Detect bit `0` FSCM has not detected clock failure `1` FSCM has detected clock failure and caused an NMI
WDTS	16	Watchdog Timer Time-out in Sleep Mode Flag bit `0` WDT time-out has not occurred during Sleep mode `1` WDT time-out has occurred during Sleep mode and caused a wake-up from sleep
NMICNT	15:0	NMI Reset Counter Value bits `0` No delay between NMI assertion and device Reset event `1` 1 SYSCLK cycle before a device Reset occurs `2` 2 SYSCLK cycle before a device Reset occurs `65535` 65535 SYSCLK cycles before a device Reset occurs

PWRCON

Address: 0xBF802710
Reset: 0x00000000
Access: read/write
Size: 32-bit

3 fields

Field	Bits	What it does
SBOREN	2
RETEN	1
VREGS	0	Voltage Regulator Stand-by Enable bit `0` Voltage regulator will go to Stand-by mode during Sleep `1` Voltage regulator will remain active during Sleep