PIC32MX775F256H memory map

Where everything sits, at its exact address. The PIC32MX775F256H has one 32-bit address space, seen through the MIPS32 segments: program flash at 0x9D000000 (KSEG0, cached), the boot flash the chip starts from after a reset at 0xBFC00000, RAM at 0xA0000000 and the special function registers from 0xBF800000 (KSEG1, uncached). These are the virtual addresses XC32 and the datasheet's register tables use; for flash, boot flash, RAM and the SFRs the physical address is the same with the top three bits cleared (0x9D000000 is 0x1D000000).

Memory map

Program flash, boot flash, RAM and the SFRs in the one 32-bit space (the configuration words are listed below).

Boot flash (bootconfig)0xBFC00000 – 0xBFC02FEF12 KB
SFRs (periph4)0xBF88B000 – 0xBF88CFFF8 KB
SFRs (periph3)0xBF889000 – 0xBF889FFF4 KB
SFRs (periph2)0xBF880000 – 0xBF886FFF28 KB
SFRs (periph1)0xBF80F000 – 0xBF80F7FF2 KB
SFRs (periph0)0xBF800000 – 0xBF80A3FF41 KB
RAM0xA0000000 – 0xA000FFFF64 KB
Program flash0x9D000000 – 0x9D03FFFF256 KB

Every segment

SegmentSpaceStartEndSizePage
Program flashbase0x9D0000000x9D03FFFF256 KB
RAMbase0xA00000000xA000FFFF64 KB
SFRs (periph0)base0xBF8000000xBF80A3FF41 KB
SFRs (periph1)base0xBF80F0000xBF80F7FF2 KB
SFRs (periph2)base0xBF8800000xBF886FFF28 KB
SFRs (periph3)base0xBF8890000xBF889FFF4 KB
SFRs (periph4)base0xBF88B0000xBF88CFFF8 KB
Boot flash (bootconfig)base0xBFC000000xBFC02FEF12 KB
Configuration words (config)base0xBFC02FF00xBFC02FFF16 B