PIC32MZ1024ECH124 memory map

Where everything sits, at its exact address. The PIC32MZ1024ECH124 has one 32-bit address space, seen through the MIPS32 segments: program flash at 0x9D000000 (KSEG0, cached), the boot flash the chip starts from after a reset at 0xBFC00000, RAM at 0x80000000 and the special function registers from 0xBF800000 (KSEG1, uncached). These are the virtual addresses XC32 and the datasheet's register tables use; for flash, boot flash, RAM and the SFRs the physical address is the same with the top three bits cleared (0x9D000000 is 0x1D000000).

Memory map

Program flash, boot flash, RAM and the SFRs in the one 32-bit space (the configuration words are listed below).

Serial quad interface (SQI)0xD0000000 – 0xD3FFFFFF64 MB

External bus interface (EBI)0xC0000000 – 0xC3FFFFFF64 MB

Boot flash (lowerbootalias)0xBFC00000 – 0xBFC0FEFF63.8 KB

SFRs (periph_ssx)0xBF8F0000 – 0xBF8FFFFF64 KB

SFRs (periph_indep)0xBF8E0000 – 0xBF8E6FFF28 KB

SFRs (periph_pb5_std)0xBF880000 – 0xBF882FFF12 KB

SFRs (periph_pb4_std)0xBF860000 – 0xBF8609FF2.5 KB

SFRs (periph_pb3_std)0xBF840000 – 0xBF84C1FF48.5 KB

SFRs (periph_pb2_std)0xBF820000 – 0xBF82E1FF56.5 KB

SFRs (periph_pb1_fast)0xBF810000 – 0xBF811FFF8 KB

SFRs (periph_pb1_std)0xBF800000 – 0xBF8017FF6 KB

Program flash0x9D000000 – 0x9D0FFFFF1 MB

RAM0x80000000 – 0x8007FFFF512 KB

Every segment

Segment	Space	Start	End	Size
RAM	base	`0x80000000`	`0x8007FFFF`	512 KB
Program flash	base	`0x9D000000`	`0x9D0FFFFF`	1 MB
SFRs (periph_pb1_std)	base	`0xBF800000`	`0xBF8017FF`	6 KB
SFRs (periph_pb1_fast)	base	`0xBF810000`	`0xBF811FFF`	8 KB
SFRs (periph_pb2_std)	base	`0xBF820000`	`0xBF82E1FF`	56.5 KB
SFRs (periph_pb3_std)	base	`0xBF840000`	`0xBF84C1FF`	48.5 KB
SFRs (periph_pb4_std)	base	`0xBF860000`	`0xBF8609FF`	2.5 KB
SFRs (periph_pb5_std)	base	`0xBF880000`	`0xBF882FFF`	12 KB
SFRs (periph_indep)	base	`0xBF8E0000`	`0xBF8E6FFF`	28 KB
SFRs (periph_ssx)	base	`0xBF8F0000`	`0xBF8FFFFF`	64 KB
Boot flash (lowerbootalias)	base	`0xBFC00000`	`0xBFC0FEFF`	63.8 KB
Configuration words (lowerbootaliasaltconfig)	base	`0xBFC0FF40`	`0xBFC0FF7F`	64 B
Configuration words (lowerbootaliasconfig)	base	`0xBFC0FFC0`	`0xBFC0FFFF`	64 B
Boot flash (lowerbootaliaslastpage)	base	`0xBFC10000`	`0xBFC13FFF`	16 KB
Boot flash (upperbootalias)	base	`0xBFC20000`	`0xBFC2FEFF`	63.8 KB
Configuration words (upperbootaliasaltconfig)	base	`0xBFC2FF40`	`0xBFC2FF7F`	64 B
Configuration words (upperbootaliasconfig)	base	`0xBFC2FFC0`	`0xBFC2FFFF`	64 B
Boot flash (upperbootaliaslastpage)	base	`0xBFC30000`	`0xBFC33FFF`	16 KB
Boot flash (boot1)	base	`0xBFC40000`	`0xBFC4FEFF`	63.8 KB
Configuration words (altboot1config)	base	`0xBFC4FF40`	`0xBFC4FF7F`	64 B
Configuration words (boot1config)	base	`0xBFC4FFC0`	`0xBFC4FFFF`	64 B
Boot flash (boot1lastpage)	base	`0xBFC50000`	`0xBFC53FFF`	16 KB
Configuration words (adccal)	base	`0xBFC54000`	`0xBFC54013`	20 B
Configuration words (serial)	base	`0xBFC54020`	`0xBFC54027`	8 B
Boot flash (boot2)	base	`0xBFC60000`	`0xBFC6FEFF`	63.8 KB
Configuration words (altboot2config)	base	`0xBFC6FF40`	`0xBFC6FF7F`	64 B
Configuration words (boot2config)	base	`0xBFC6FFC0`	`0xBFC6FFFF`	64 B
Boot flash (boot2lastpage)	base	`0xBFC70000`	`0xBFC73FFF`	16 KB
External bus interface (EBI)	base	`0xC0000000`	`0xC3FFFFFF`	64 MB
Serial quad interface (SQI)	base	`0xD0000000`	`0xD3FFFFFF`	64 MB