The 3 registers of PMD (Peripheral module disable), from 0xBF800090, with their reset value and every field. The PIC32MZ1025W104132 has 1091 registers in 66 peripherals, one page each.
Most PIC32 SFRs have three more registers right after them: CLR at +4, SET at +8 and INV at +C (T1CONCLR, T1CONSET, T1CONINV), which clear, set or flip just the bits written as 1, in one write.
PMD Peripheral module disable
PMD1PERIPHERAL MODULE DISABLE 1 REGISTER
Address
0xBF800090
Reset
0x00000000
Access
read/write
Size
32-bit
11 fields
Field
Bits
What it does
SQI1MD
29
SQI Module Disable
0 Enabled
1 Disabled
RNG1MD
26
RNG1 Module Disable
0 Enabled
1 Disabled
CRYPT1MD
24
CRYPTO1 Module Disable
0 Enabled
1 Disabled
BA414MD
23
BA414E Module Disable
0 Enabled
1 Disabled
DMA1MD
19
DMA Controller Module Disable
0 Enabled
1 Disabled
RTCC1MD
16
RTCC Module Disable (Unused at top level- part of XDS controller SFR)
0 Enabled
1 Disabled
CVD1MD
15
CVD Module Disable
0 Enabled
1 Disabled
PTGMD
11
PTG Module Disable
0 Enabled
1 Disabled
ADC1MD
8
ADC Controller Module Disable
0 Enabled
1 Disabled
ADCSARSHRMD
7
Shared ADC SAR Core Module Disable bit
0 Enabled
1 Disabled - When disabled the corresponding ADC SAR SHARED will be disabled.
ADCSAR0MD
0
ADC SAR Core 0 Module Disable bit
0 Enabled
1 Disabled - When disabled the corresponding ADC SAR will be disabled.
BETA