WBZ450 CMCC registers

The 11 registers of CMCC (Cortex M Cache Controller), from 0x41002000, with their reset value and every field. The WBZ450 has 1802 registers in 52 peripherals, one page each.

CMCC Cortex M Cache Controller

TYPECache Type Register

Address
0x41002000
Reset
0x000012D2
Access
read only
Size
32-bit
6 fields
FieldBitsWhat it does
CLSIZE13:11Cache Line Size
  • 0 Cache Line Size is 4 bytes
  • 1 Cache Line Size is 8 bytes
  • 2 Cache Line Size is 16 bytes
  • 3 Cache Line Size is 32 bytes
  • 4 Cache Line Size is 64 bytes
  • 5 Cache Line Size is 128 bytes
CSIZE10:8Cache Size
  • 0 Cache Size is 1 KB
  • 1 Cache Size is 2 KB
  • 2 Cache Size is 4 KB
  • 3 Cache Size is 8 KB
  • 4 Cache Size is 16 KB
  • 5 Cache Size is 32 KB
  • 6 Cache Size is 64 KB
LCKDOWN7Lock Down supported
WAYNUM6:5Number of Way
  • 0 Direct Mapped Cache
  • 1 2-WAY set associative
  • 2 4-WAY set associative
RRP4Round Robin Policy supported
GCLK1dynamic Clock Gating supported

CFGCache Configuration Register

Address
0x41002004
Reset
0x00000020
Access
read/write
Size
32-bit
3 fields
FieldBitsWhat it does
CSIZESW6:4Cache size configured by software
  • 0 The Cache Size is configured to 1KB
  • 1 The Cache Size is configured to 2KB
  • 2 The Cache Size is configured to 4KB
  • 3 The Cache Size is configured to 8KB
  • 4 The Cache Size is configured to 16KB
  • 5 The Cache Size is configured to 32KB
  • 6 The Cache Size is configured to 64KB
DCDIS2Data Cache Disable
ICDIS1Instruction Cache Disable

CTRLCache Control Register

Address
0x41002008
Reset
0x00000000
Access
write only
Size
32-bit
1 field
FieldBitsWhat it does
CEN0Cache Controller Enable

SRCache Status Register

Address
0x4100200C
Reset
0x00000000
Access
read only
Size
32-bit
1 field
FieldBitsWhat it does
CSTS0Cache Controller Status

LCKWAYCache Lock per Way Register

Address
0x41002010
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
FieldBitsWhat it does
LCKWAY3:0Lockdown way Register

MAINT0Cache Maintenance Register 0

Address
0x41002020
Reset
0x00000000
Access
write only
Size
32-bit
1 field
FieldBitsWhat it does
INVALL0Cache Controller invalidate All

MAINT1Cache Maintenance Register 1

Address
0x41002024
Reset
0x00000000
Access
write only
Size
32-bit
2 fields
FieldBitsWhat it does
INDEX11:4Invalidate Index
WAY31:28Invalidate Way
  • 0 Way 0 is selection for index invalidation
  • 1 Way 1 is selection for index invalidation
  • 2 Way 2 is selection for index invalidation
  • 3 Way 3 is selection for index invalidation

MCFGCache Monitor Configuration Register

Address
0x41002028
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
FieldBitsWhat it does
MODE1:0Cache Controller Monitor Counter Mode
  • 0 Cycle counter
  • 1 Instruction hit counter
  • 2 Data hit counter

MENCache Monitor Enable Register

Address
0x4100202C
Reset
0x00000000
Access
read/write
Size
32-bit
1 field
FieldBitsWhat it does
MENABLE0Cache Controller Monitor Enable

MCTRLCache Monitor Control Register

Address
0x41002030
Reset
0x00000000
Access
write only
Size
32-bit
1 field
FieldBitsWhat it does
SWRST0Cache Controller Software Reset

MSRCache Monitor Status Register

Address
0x41002034
Reset
0x00000000
Access
read only
Size
32-bit
1 field
FieldBitsWhat it does
EVENT_CNT31:0Monitor Event Counter