WBZ450 peripherals

Each block of the WBZ450: what it is, the registers that control it and the pins it uses.

EIC

EIC

External Interrupt Controller

Registers

Pins

TC0

TC

Basic Timer Counter

Registers

TC1

TC

Basic Timer Counter

Registers

TC2

TC

Basic Timer Counter

Registers

TC3

TC

Basic Timer Counter

Registers

TCC0

TCC

Timer Counter Control

Registers

TCC1

TCC

Timer Counter Control

Registers

TCC2

TCC

Timer Counter Control

Registers

SERCOM0

SERCOM

Serial Communication Interface

Registers

I2CM.CTRLA0x40000C00I2CS.CTRLA0x40000C00SPIM.CTRLA0x40000C00SPIS.CTRLA0x40000C00USART_EXT.CTRLA0x40000C00USART_INT.CTRLA0x40000C00I2CM.CTRLB0x40000C04I2CS.CTRLB0x40000C04SPIM.CTRLB0x40000C04SPIS.CTRLB0x40000C04USART_EXT.CTRLB0x40000C04USART_INT.CTRLB0x40000C04I2CM.CTRLC0x40000C08I2CS.CTRLC0x40000C08SPIM.CTRLC0x40000C08SPIS.CTRLC0x40000C08USART_EXT.CTRLC0x40000C08USART_INT.CTRLC0x40000C08I2CM.BAUD0x40000C0CSPIM.BAUD0x40000C0CSPIS.BAUD0x40000C0CUSART_EXT.BAUD0x40000C0CUSART_INT.BAUD0x40000C0CUSART_EXT.RXPL0x40000C0EUSART_INT.RXPL0x40000C0EI2CM.INTENCLR0x40000C14I2CS.INTENCLR0x40000C14SPIM.INTENCLR0x40000C14SPIS.INTENCLR0x40000C14USART_EXT.INTENCLR0x40000C14USART_INT.INTENCLR0x40000C14I2CM.INTENSET0x40000C16I2CS.INTENSET0x40000C16SPIM.INTENSET0x40000C16SPIS.INTENSET0x40000C16USART_EXT.INTENSET0x40000C16USART_INT.INTENSET0x40000C16I2CM.INTFLAG0x40000C18I2CS.INTFLAG0x40000C18SPIM.INTFLAG0x40000C18SPIS.INTFLAG0x40000C18USART_EXT.INTFLAG0x40000C18USART_INT.INTFLAG0x40000C18I2CM.STATUS0x40000C1AI2CS.STATUS0x40000C1ASPIM.STATUS0x40000C1ASPIS.STATUS0x40000C1AUSART_EXT.STATUS0x40000C1AUSART_INT.STATUS0x40000C1AI2CM.SYNCBUSY0x40000C1CI2CS.SYNCBUSY0x40000C1CSPIM.SYNCBUSY0x40000C1CSPIS.SYNCBUSY0x40000C1CUSART_EXT.SYNCBUSY0x40000C1CUSART_INT.SYNCBUSY0x40000C1CUSART_EXT.RXERRCNT0x40000C20USART_INT.RXERRCNT0x40000C20I2CS.LENGTH0x40000C22SPIM.LENGTH0x40000C22SPIS.LENGTH0x40000C22USART_EXT.LENGTH0x40000C22USART_INT.LENGTH0x40000C22I2CM.ADDR0x40000C24I2CS.ADDR0x40000C24SPIM.ADDR0x40000C24SPIS.ADDR0x40000C24I2CM.DATA0x40000C28I2CS.DATA0x40000C28SPIM.DATA0x40000C28SPIS.DATA0x40000C28USART_EXT.DATA0x40000C28USART_INT.DATA0x40000C28I2CM.DBGCTRL0x40000C30SPIM.DBGCTRL0x40000C30SPIS.DBGCTRL0x40000C30USART_EXT.DBGCTRL0x40000C30USART_INT.DBGCTRL0x40000C30

Pins

SERCOM1

SERCOM

Serial Communication Interface

Registers

I2CM.CTRLA0x40001000I2CS.CTRLA0x40001000SPIM.CTRLA0x40001000SPIS.CTRLA0x40001000USART_EXT.CTRLA0x40001000USART_INT.CTRLA0x40001000I2CM.CTRLB0x40001004I2CS.CTRLB0x40001004SPIM.CTRLB0x40001004SPIS.CTRLB0x40001004USART_EXT.CTRLB0x40001004USART_INT.CTRLB0x40001004I2CM.CTRLC0x40001008I2CS.CTRLC0x40001008SPIM.CTRLC0x40001008SPIS.CTRLC0x40001008USART_EXT.CTRLC0x40001008USART_INT.CTRLC0x40001008I2CM.BAUD0x4000100CSPIM.BAUD0x4000100CSPIS.BAUD0x4000100CUSART_EXT.BAUD0x4000100CUSART_INT.BAUD0x4000100CUSART_EXT.RXPL0x4000100EUSART_INT.RXPL0x4000100EI2CM.INTENCLR0x40001014I2CS.INTENCLR0x40001014SPIM.INTENCLR0x40001014SPIS.INTENCLR0x40001014USART_EXT.INTENCLR0x40001014USART_INT.INTENCLR0x40001014I2CM.INTENSET0x40001016I2CS.INTENSET0x40001016SPIM.INTENSET0x40001016SPIS.INTENSET0x40001016USART_EXT.INTENSET0x40001016USART_INT.INTENSET0x40001016I2CM.INTFLAG0x40001018I2CS.INTFLAG0x40001018SPIM.INTFLAG0x40001018SPIS.INTFLAG0x40001018USART_EXT.INTFLAG0x40001018USART_INT.INTFLAG0x40001018I2CM.STATUS0x4000101AI2CS.STATUS0x4000101ASPIM.STATUS0x4000101ASPIS.STATUS0x4000101AUSART_EXT.STATUS0x4000101AUSART_INT.STATUS0x4000101AI2CM.SYNCBUSY0x4000101CI2CS.SYNCBUSY0x4000101CSPIM.SYNCBUSY0x4000101CSPIS.SYNCBUSY0x4000101CUSART_EXT.SYNCBUSY0x4000101CUSART_INT.SYNCBUSY0x4000101CUSART_EXT.RXERRCNT0x40001020USART_INT.RXERRCNT0x40001020I2CS.LENGTH0x40001022SPIM.LENGTH0x40001022SPIS.LENGTH0x40001022USART_EXT.LENGTH0x40001022USART_INT.LENGTH0x40001022I2CM.ADDR0x40001024I2CS.ADDR0x40001024SPIM.ADDR0x40001024SPIS.ADDR0x40001024I2CM.DATA0x40001028I2CS.DATA0x40001028SPIM.DATA0x40001028SPIS.DATA0x40001028USART_EXT.DATA0x40001028USART_INT.DATA0x40001028I2CM.DBGCTRL0x40001030SPIM.DBGCTRL0x40001030SPIS.DBGCTRL0x40001030USART_EXT.DBGCTRL0x40001030USART_INT.DBGCTRL0x40001030

Pins

ADCHS

ADCHS

12-bit Analog to Digital Converter

Registers

ADCCON10x44001400ADCCON1CLR0x44001404ADCCON1SET0x44001408ADCCON1INV0x4400140CADCCON20x44001410ADCCON2CLR0x44001414ADCCON2SET0x44001418ADCCON2INV0x4400141CADCCON30x44001420ADCCON3CLR0x44001424ADCCON3SET0x44001428ADCCON3INV0x4400142CADCIMCON10x44001440ADCIMOD1CLR0x44001444ADCIMOD1SET0x44001448ADCIMOD1INV0x4400144CADCGIRQEN10x44001480ADCGIRQEN1CLR0x44001484ADCGIRQEN1SET0x44001488ADCGIRQEN1INV0x4400148CADCCSS10x440014A0ADCCSS1CLR0x440014A4ADCCSS1SET0x440014A8ADCCSS1INV0x440014ACADCDSTAT10x440014C0ADCDSTAT1CLR0x440014C4ADCDSTAT1SET0x440014C8ADCDSTAT1INV0x440014CCADCCMPEN10x440014E0ADCCMPEN0CLR0x440014E4ADCCMPEN0SET0x440014E8ADCCMPEN0INV0x440014ECADCCMP10x440014F0ADCCMP0CLR0x440014F4ADCCMP0SET0x440014F8ADCCMP0INV0x440014FCADCCMPEN20x44001500ADCCMPEN1CLR0x44001504ADCCMPEN1SET0x44001508ADCCMPEN1INV0x4400150CADCCMP20x44001510ADDCMP1CLR0x44001514ADDCMP1SET0x44001518ADDCMP1INV0x4400151CADCFLTR10x440015A0ADCFLTR0CLR0x440015A4ADCFLTR0SET0x440015A8ADCFLTR0INV0x440015ACADCFLTR20x440015B0ADCFLTR1CLR0x440015B4ADCFLTR1SET0x440015B8ADCFLTR1INV0x440015BCADCTRG10x44001600ADCTRG1CLR0x44001604ADCTRG1SET0x44001608ADCTRG1INV0x4400160CADCTRG20x44001610ADTRG2CLR0x44001614ADTRG2SET0x44001618ADTRG2INV0x4400161CADTRG3CLR0x44001624ADTRG3SET0x44001628ADTRG3INV0x4400162CADCCMPCON10x44001680ADCCMPCON1CLR0x44001684ADCCMPCON1SET0x44001688ADCCMPCON1INV0x4400168CADCCMPCON20x44001690ADCMPCON2CLR0x44001694ADCMPCON2SET0x44001698ADCMPCON2INV0x4400169CADCFSTATCLR0x440016E4ADCFSTATSET0x440016E8ADCFSTATINV0x440016ECADCFIFOCLR0x440016F4ADCFIFOSET0x440016F8ADCFIFOINV0x440016FCADCBASE0x44001700ADCBASECLR0x44001704ADCBASESET0x44001708ADCBASEINV0x4400170CADCDMASTAT0x44001710ADCDMASTATCLR0x44001714ADCDMASTATSET0x44001718ADCDMASTATINV0x4400171CADCCNTB0x44001720ADCCNTBCLR0x44001724ADCCNTBSET0x44001728ADCCNTBINV0x4400172CADCDMAB0x44001730ADCDMABCLR0x44001734ADCDMABSET0x44001738ADCDMABINV0x4400173CADCTRGSNS0x44001740ADCTRGSNSCLR0x44001744ADCTRGSNSSET0x44001748ADCTRGSNSINV0x4400174CADC0TIMECLR0x44001754ADC0TIMESET0x44001758ADC0TIMEINV0x4400175CADCEISTAT1CLR0x440017E4ADCEISTAT1SET0x440017E8ADCEISTAT1INV0x440017ECADCANCON0x44001800ADCANLCTLCLR0x44001804ADCANLCTLSET0x44001808ADCANLCTLINV0x4400180CADC7CFG0x44001A70ADCFGSHRCLR0x44001A74ADCFGSHRSET0x44001A78ADCFGSHRINV0x44001A7CADCSVCONCLR0x44001A84ADCSVCONSET0x44001A88ADCSVCONINV0x44001A8CADCSYSCFG00x44001B00ADCSYSCFG0CLR0x44001B04ADCSYSCFG0SET0x44001B08ADCSYSCFG0INV0x44001B0CADCDATA00x44001E00ADCDATA10x44001E10ADCDATA20x44001E20ADCDATA30x44001E30ADCDATA40x44001E40ADCDATA50x44001E50ADCDATA60x44001E60ADCDATA70x44001E70ADCDATA80x44001E80ADCDATA90x44001E90ADCDATA100x44001EA0ADCDATA110x44001EB0

Pins

AES

AES

Advanced Encryption Standard

Registers

CCL

CCL

Configurable Custom Logic

Registers

Pins

CCL/IN[1]PA00CCL/IN[2]PA00CCL/IN[4]PA00CCL/IN[5]PA00CCL/OUT[0]PA00CCL/IN[2]PA01CCL/IN[5]PA01CCL/OUT[0]PA01CCL/OUT[1]PA01CCL/IN[0]PA02CCL/IN[3]PA02CCL/OUT[1]PA02CCL/IN[0]PA03CCL/IN[1]PA03CCL/IN[3]PA03CCL/IN[4]PA03CCL/OUT[0]PA03CCL/IN[1]PA04CCL/IN[2]PA04CCL/IN[4]PA04CCL/IN[5]PA04CCL/OUT[0]PA04CCL/OUT[1]PA04CCL/IN[2]PA05CCL/IN[5]PA05CCL/OUT[0]PA05CCL/OUT[1]PA05CCL/IN[0]PA06CCL/IN[3]PA06CCL/OUT[1]PA06CCL/IN[0]PA07CCL/IN[1]PA07CCL/IN[3]PA07CCL/IN[4]PA07CCL/IN[1]PA08CCL/IN[2]PA08CCL/IN[4]PA08CCL/IN[5]PA08CCL/OUT[0]PA08CCL/OUT[1]PA08CCL/IN[0]PA09CCL/IN[2]PA09CCL/IN[3]PA09CCL/IN[5]PA09CCL/OUT[0]PA09CCL/OUT[1]PA09CCL/IN[0]PA10CCL/IN[3]PA10CCL/OUT[1]PA10CCL/IN[0]PA11CCL/IN[1]PA11CCL/IN[3]PA11CCL/IN[4]PA11CCL/IN[1]PA12CCL/IN[2]PA12CCL/IN[4]PA12CCL/IN[5]PA12CCL/IN[2]PA13CCL/IN[5]PA13CCL/OUT[0]PA13CCL/OUT[1]PA13CCL/IN[0]PA14CCL/IN[3]PA14CCL/OUT[1]PA14CCL/IN[0]PB00CCL/IN[1]PB00CCL/IN[3]PB00CCL/IN[4]PB00CCL/IN[1]PB01CCL/IN[2]PB01CCL/IN[4]PB01CCL/IN[5]PB01CCL/OUT[0]PB01CCL/IN[2]PB02CCL/IN[5]PB02CCL/OUT[0]PB02CCL/OUT[1]PB02CCL/IN[0]PB03CCL/IN[3]PB03CCL/OUT[1]PB03CCL/IN[0]PB04CCL/IN[1]PB04CCL/IN[3]PB04CCL/IN[4]PB04CCL/IN[1]PB05CCL/IN[2]PB05CCL/IN[4]PB05CCL/IN[5]PB05CCL/OUT[0]PB05CCL/IN[2]PB06CCL/IN[5]PB06CCL/OUT[0]PB06CCL/OUT[1]PB06CCL/IN[0]PB07CCL/IN[3]PB07CCL/OUT[1]PB07CCL/IN[0]PB08CCL/IN[1]PB08CCL/IN[3]PB08CCL/IN[4]PB08CCL/IN[1]PB09CCL/IN[2]PB09CCL/IN[4]PB09CCL/IN[5]PB09CCL/OUT[0]PB09CCL/IN[2]PB10CCL/IN[5]PB10CCL/OUT[0]PB10CCL/OUT[1]PB10CCL/IN[0]PB11CCL/IN[3]PB11CCL/OUT[1]PB11CCL/IN[0]PB12CCL/IN[1]PB12CCL/IN[3]PB12CCL/IN[4]PB12CCL/IN[1]PB13CCL/IN[2]PB13CCL/IN[4]PB13CCL/IN[5]PB13CCL/OUT[0]PB13

CFG

CFG

Registers

CRU

CRU

Registers

OSCCON0x44000A00OSCCONCLR0x44000A04OSCCONSET0x44000A08OSCCONINV0x44000A0COSCTUN0x44000A10OSCTUNCLR0x44000A14OSCTUNSET0x44000A18OSCTUNINV0x44000A1CSPLLCON0x44000A20SPLLCONCLR0x44000A24SPLLCONSET0x44000A28SPLLCONINV0x44000A2CREFO1CON0x44000A70REFO1CONCLR0x44000A74REFO1CONSET0x44000A78REFO1CONINV0x44000A7CREFO1TRIM0x44000A80REFO1TRIMCLR0x44000A84REFO1TRIMSET0x44000A88REFO1TRIMINV0x44000A8CREFO2CON0x44000A90REFO2CONCLR0x44000A94REFO2CONSET0x44000A98REFO2CONINV0x44000A9CREFO2TRIM0x44000AA0REFO2TRIMCLR0x44000AA4REFO2TRIMSET0x44000AA8REFO2TRIMINV0x44000AACREFO3CON0x44000AB0REFO3CONCLR0x44000AB4REFO3CONSET0x44000AB8REFO3CONINV0x44000ABCREFO3TRIM0x44000AC0REFO3TRIMCLR0x44000AC4REFO3TRIMSET0x44000AC8REFO3TRIMINV0x44000ACCREFO4CON0x44000AD0REFO4CONCLR0x44000AD4REFO4CONSET0x44000AD8REFO4CONINV0x44000ADCREFO4TRIM0x44000AE0REFO4TRIMCLR0x44000AE4REFO4TRIMSET0x44000AE8REFO4TRIMINV0x44000AECREFO5CON0x44000AF0REFO5CONCLR0x44000AF4REFO5CONSET0x44000AF8REFO5CONINV0x44000AFCREFO5TRIM0x44000B00REFO5TRIMCLR0x44000B04REFO5TRIMSET0x44000B08REFO5TRIMINV0x44000B0CREFO6CON0x44000B10REFO6CONCLR0x44000B14REFO6CONSET0x44000B18REFO6CONINV0x44000B1CREFO6TRIM0x44000B20REFO6TRIMCLR0x44000B24REFO6TRIMSET0x44000B28REFO6TRIMINV0x44000B2CPB1DIV0x44000B30PB1DIVCLR0x44000B34PB1DIVSET0x44000B38PB1DIVINV0x44000B3CPB2DIV0x44000B40PB2DIVCLR0x44000B44PB2DIVSET0x44000B48PB2DIVINV0x44000B4CPB3DIV0x44000B50PB3DIVCLR0x44000B54PB3DIVSET0x44000B58PB3DIVINV0x44000B5CSLEWCON0x44000B60SLEWCONCLR0x44000B64SLEWCONSET0x44000B68SLEWCONINV0x44000B6CCLKSTAT0x44000B70CLKDIAG0x44000B90

DMAC

DMAC

Direct Memory Access Controller

Registers

CTRL0x41004000CRCCTRL0x41004002CRCDATAIN0x41004004CRCCHKSUM0x41004008CRCSTATUS0x4100400CDBGCTRL0x4100400DSWTRIGCTRL0x41004010PRICTRL00x41004014INTPEND0x41004020INTSTATUS0x41004024BUSYCH0x41004028PENDCH0x4100402CACTIVE0x41004030BASEADDR0x41004034WRBADDR0x41004038CHANNEL0.CHCTRLA0x41004040CHANNEL0.CHCTRLB0x41004044CHANNEL0.CHPRILVL0x41004045CHANNEL0.CHEVCTRL0x41004046CHANNEL0.CHINTENCLR0x4100404CCHANNEL0.CHINTENSET0x4100404DCHANNEL0.CHINTFLAG0x4100404ECHANNEL0.CHSTATUS0x4100404FCHANNEL1.CHCTRLA0x41004050CHANNEL1.CHCTRLB0x41004054CHANNEL1.CHPRILVL0x41004055CHANNEL1.CHEVCTRL0x41004056CHANNEL1.CHINTENCLR0x4100405CCHANNEL1.CHINTENSET0x4100405DCHANNEL1.CHINTFLAG0x4100405ECHANNEL1.CHSTATUS0x4100405FCHANNEL2.CHCTRLA0x41004060CHANNEL2.CHCTRLB0x41004064CHANNEL2.CHPRILVL0x41004065CHANNEL2.CHEVCTRL0x41004066CHANNEL2.CHINTENCLR0x4100406CCHANNEL2.CHINTENSET0x4100406DCHANNEL2.CHINTFLAG0x4100406ECHANNEL2.CHSTATUS0x4100406FCHANNEL3.CHCTRLA0x41004070CHANNEL3.CHCTRLB0x41004074CHANNEL3.CHPRILVL0x41004075CHANNEL3.CHEVCTRL0x41004076CHANNEL3.CHINTENCLR0x4100407CCHANNEL3.CHINTENSET0x4100407DCHANNEL3.CHINTFLAG0x4100407ECHANNEL3.CHSTATUS0x4100407FCHANNEL4.CHCTRLA0x41004080CHANNEL4.CHCTRLB0x41004084CHANNEL4.CHPRILVL0x41004085CHANNEL4.CHEVCTRL0x41004086CHANNEL4.CHINTENCLR0x4100408CCHANNEL4.CHINTENSET0x4100408DCHANNEL4.CHINTFLAG0x4100408ECHANNEL4.CHSTATUS0x4100408FCHANNEL5.CHCTRLA0x41004090CHANNEL5.CHCTRLB0x41004094CHANNEL5.CHPRILVL0x41004095CHANNEL5.CHEVCTRL0x41004096CHANNEL5.CHINTENCLR0x4100409CCHANNEL5.CHINTENSET0x4100409DCHANNEL5.CHINTFLAG0x4100409ECHANNEL5.CHSTATUS0x4100409FCHANNEL6.CHCTRLA0x410040A0CHANNEL6.CHCTRLB0x410040A4CHANNEL6.CHPRILVL0x410040A5CHANNEL6.CHEVCTRL0x410040A6CHANNEL6.CHINTENCLR0x410040ACCHANNEL6.CHINTENSET0x410040ADCHANNEL6.CHINTFLAG0x410040AECHANNEL6.CHSTATUS0x410040AFCHANNEL7.CHCTRLA0x410040B0CHANNEL7.CHCTRLB0x410040B4CHANNEL7.CHPRILVL0x410040B5CHANNEL7.CHEVCTRL0x410040B6CHANNEL7.CHINTENCLR0x410040BCCHANNEL7.CHINTENSET0x410040BDCHANNEL7.CHINTFLAG0x410040BECHANNEL7.CHSTATUS0x410040BFCHANNEL8.CHCTRLA0x410040C0CHANNEL8.CHCTRLB0x410040C4CHANNEL8.CHPRILVL0x410040C5CHANNEL8.CHEVCTRL0x410040C6CHANNEL8.CHINTENCLR0x410040CCCHANNEL8.CHINTENSET0x410040CDCHANNEL8.CHINTFLAG0x410040CECHANNEL8.CHSTATUS0x410040CFCHANNEL9.CHCTRLA0x410040D0CHANNEL9.CHCTRLB0x410040D4CHANNEL9.CHPRILVL0x410040D5CHANNEL9.CHEVCTRL0x410040D6CHANNEL9.CHINTENCLR0x410040DCCHANNEL9.CHINTENSET0x410040DDCHANNEL9.CHINTFLAG0x410040DECHANNEL9.CHSTATUS0x410040DFCHANNEL10.CHCTRLA0x410040E0CHANNEL10.CHCTRLB0x410040E4CHANNEL10.CHPRILVL0x410040E5CHANNEL10.CHEVCTRL0x410040E6CHANNEL10.CHINTENCLR0x410040ECCHANNEL10.CHINTENSET0x410040EDCHANNEL10.CHINTFLAG0x410040EECHANNEL10.CHSTATUS0x410040EFCHANNEL11.CHCTRLA0x410040F0CHANNEL11.CHCTRLB0x410040F4CHANNEL11.CHPRILVL0x410040F5CHANNEL11.CHEVCTRL0x410040F6CHANNEL11.CHINTENCLR0x410040FCCHANNEL11.CHINTENSET0x410040FDCHANNEL11.CHINTFLAG0x410040FECHANNEL11.CHSTATUS0x410040FFCHANNEL12.CHCTRLA0x41004100CHANNEL12.CHCTRLB0x41004104CHANNEL12.CHPRILVL0x41004105CHANNEL12.CHEVCTRL0x41004106CHANNEL12.CHINTENCLR0x4100410CCHANNEL12.CHINTENSET0x4100410DCHANNEL12.CHINTFLAG0x4100410ECHANNEL12.CHSTATUS0x4100410FCHANNEL13.CHCTRLA0x41004110CHANNEL13.CHCTRLB0x41004114CHANNEL13.CHPRILVL0x41004115CHANNEL13.CHEVCTRL0x41004116CHANNEL13.CHINTENCLR0x4100411CCHANNEL13.CHINTENSET0x4100411DCHANNEL13.CHINTFLAG0x4100411ECHANNEL13.CHSTATUS0x4100411FCHANNEL14.CHCTRLA0x41004120CHANNEL14.CHCTRLB0x41004124CHANNEL14.CHPRILVL0x41004125CHANNEL14.CHEVCTRL0x41004126CHANNEL14.CHINTENCLR0x4100412CCHANNEL14.CHINTENSET0x4100412DCHANNEL14.CHINTFLAG0x4100412ECHANNEL14.CHSTATUS0x4100412FCHANNEL15.CHCTRLA0x41004130CHANNEL15.CHCTRLB0x41004134CHANNEL15.CHPRILVL0x41004135CHANNEL15.CHEVCTRL0x41004136CHANNEL15.CHINTENCLR0x4100413CCHANNEL15.CHINTENSET0x4100413DCHANNEL15.CHINTFLAG0x4100413ECHANNEL15.CHSTATUS0x4100413F

DMT

DMT

Dead Man Timer

Registers

ETM

ETM

Embedded Trace Macrocell

Registers

EVSYS

EVSYS

Event System Interface

Registers

CTRLA0x41006000SWEVT0x41006004PRICTRL0x41006008INTPEND0x41006010INTSTATUS0x41006014BUSYCH0x41006018READYUSR0x4100601CCHANNEL0.CHANNEL0x41006020CHANNEL0.CHINTENCLR0x41006024CHANNEL0.CHINTENSET0x41006025CHANNEL0.CHINTFLAG0x41006026CHANNEL0.CHSTATUS0x41006027CHANNEL1.CHANNEL0x41006028CHANNEL1.CHINTENCLR0x4100602CCHANNEL1.CHINTENSET0x4100602DCHANNEL1.CHINTFLAG0x4100602ECHANNEL1.CHSTATUS0x4100602FCHANNEL2.CHANNEL0x41006030CHANNEL2.CHINTENCLR0x41006034CHANNEL2.CHINTENSET0x41006035CHANNEL2.CHINTFLAG0x41006036CHANNEL2.CHSTATUS0x41006037CHANNEL3.CHANNEL0x41006038CHANNEL3.CHINTENCLR0x4100603CCHANNEL3.CHINTENSET0x4100603DCHANNEL3.CHINTFLAG0x4100603ECHANNEL3.CHSTATUS0x4100603FCHANNEL4.CHANNEL0x41006040CHANNEL4.CHINTENCLR0x41006044CHANNEL4.CHINTENSET0x41006045CHANNEL4.CHINTFLAG0x41006046CHANNEL4.CHSTATUS0x41006047CHANNEL5.CHANNEL0x41006048CHANNEL5.CHINTENCLR0x4100604CCHANNEL5.CHINTENSET0x4100604DCHANNEL5.CHINTFLAG0x4100604ECHANNEL5.CHSTATUS0x4100604FCHANNEL6.CHANNEL0x41006050CHANNEL6.CHINTENCLR0x41006054CHANNEL6.CHINTENSET0x41006055CHANNEL6.CHINTFLAG0x41006056CHANNEL6.CHSTATUS0x41006057CHANNEL7.CHANNEL0x41006058CHANNEL7.CHINTENCLR0x4100605CCHANNEL7.CHINTENSET0x4100605DCHANNEL7.CHINTFLAG0x4100605ECHANNEL7.CHSTATUS0x4100605FCHANNEL8.CHANNEL0x41006060CHANNEL8.CHINTENCLR0x41006064CHANNEL8.CHINTENSET0x41006065CHANNEL8.CHINTFLAG0x41006066CHANNEL8.CHSTATUS0x41006067CHANNEL9.CHANNEL0x41006068CHANNEL9.CHINTENCLR0x4100606CCHANNEL9.CHINTENSET0x4100606DCHANNEL9.CHINTFLAG0x4100606ECHANNEL9.CHSTATUS0x4100606FCHANNEL10.CHANNEL0x41006070CHANNEL10.CHINTENCLR0x41006074CHANNEL10.CHINTENSET0x41006075CHANNEL10.CHINTFLAG0x41006076CHANNEL10.CHSTATUS0x41006077CHANNEL11.CHANNEL0x41006078CHANNEL11.CHINTENCLR0x4100607CCHANNEL11.CHINTENSET0x4100607DCHANNEL11.CHINTFLAG0x4100607ECHANNEL11.CHSTATUS0x4100607FCHANNEL12.CHANNEL0x41006080CHANNEL12.CHINTENCLR0x41006084CHANNEL12.CHINTENSET0x41006085CHANNEL12.CHINTFLAG0x41006086CHANNEL12.CHSTATUS0x41006087CHANNEL13.CHANNEL0x41006088CHANNEL13.CHINTENCLR0x4100608CCHANNEL13.CHINTENSET0x4100608DCHANNEL13.CHINTFLAG0x4100608ECHANNEL13.CHSTATUS0x4100608FCHANNEL14.CHANNEL0x41006090CHANNEL14.CHINTENCLR0x41006094CHANNEL14.CHINTENSET0x41006095CHANNEL14.CHINTFLAG0x41006096CHANNEL14.CHSTATUS0x41006097CHANNEL15.CHANNEL0x41006098CHANNEL15.CHINTENCLR0x4100609CCHANNEL15.CHINTENSET0x4100609DCHANNEL15.CHINTFLAG0x4100609ECHANNEL15.CHSTATUS0x4100609FCHANNEL16.CHANNEL0x410060A0CHANNEL16.CHINTENCLR0x410060A4CHANNEL16.CHINTENSET0x410060A5CHANNEL16.CHINTFLAG0x410060A6CHANNEL16.CHSTATUS0x410060A7CHANNEL17.CHANNEL0x410060A8CHANNEL17.CHINTENCLR0x410060ACCHANNEL17.CHINTENSET0x410060ADCHANNEL17.CHINTFLAG0x410060AECHANNEL17.CHSTATUS0x410060AFCHANNEL18.CHANNEL0x410060B0CHANNEL18.CHINTENCLR0x410060B4CHANNEL18.CHINTENSET0x410060B5CHANNEL18.CHINTFLAG0x410060B6CHANNEL18.CHSTATUS0x410060B7CHANNEL19.CHANNEL0x410060B8CHANNEL19.CHINTENCLR0x410060BCCHANNEL19.CHINTENSET0x410060BDCHANNEL19.CHINTFLAG0x410060BECHANNEL19.CHSTATUS0x410060BFCHANNEL20.CHANNEL0x410060C0CHANNEL20.CHINTENCLR0x410060C4CHANNEL20.CHINTENSET0x410060C5CHANNEL20.CHINTFLAG0x410060C6CHANNEL20.CHSTATUS0x410060C7CHANNEL21.CHANNEL0x410060C8CHANNEL21.CHINTENCLR0x410060CCCHANNEL21.CHINTENSET0x410060CDCHANNEL21.CHINTFLAG0x410060CECHANNEL21.CHSTATUS0x410060CFCHANNEL22.CHANNEL0x410060D0CHANNEL22.CHINTENCLR0x410060D4CHANNEL22.CHINTENSET0x410060D5CHANNEL22.CHINTFLAG0x410060D6CHANNEL22.CHSTATUS0x410060D7CHANNEL23.CHANNEL0x410060D8CHANNEL23.CHINTENCLR0x410060DCCHANNEL23.CHINTENSET0x410060DDCHANNEL23.CHINTFLAG0x410060DECHANNEL23.CHSTATUS0x410060DFCHANNEL24.CHANNEL0x410060E0CHANNEL24.CHINTENCLR0x410060E4CHANNEL24.CHINTENSET0x410060E5CHANNEL24.CHINTFLAG0x410060E6CHANNEL24.CHSTATUS0x410060E7CHANNEL25.CHANNEL0x410060E8CHANNEL25.CHINTENCLR0x410060ECCHANNEL25.CHINTENSET0x410060EDCHANNEL25.CHINTFLAG0x410060EECHANNEL25.CHSTATUS0x410060EFCHANNEL26.CHANNEL0x410060F0CHANNEL26.CHINTENCLR0x410060F4CHANNEL26.CHINTENSET0x410060F5CHANNEL26.CHINTFLAG0x410060F6CHANNEL26.CHSTATUS0x410060F7CHANNEL27.CHANNEL0x410060F8CHANNEL27.CHINTENCLR0x410060FCCHANNEL27.CHINTENSET0x410060FDCHANNEL27.CHINTFLAG0x410060FECHANNEL27.CHSTATUS0x410060FFCHANNEL28.CHANNEL0x41006100CHANNEL28.CHINTENCLR0x41006104CHANNEL28.CHINTENSET0x41006105CHANNEL28.CHINTFLAG0x41006106CHANNEL28.CHSTATUS0x41006107CHANNEL29.CHANNEL0x41006108CHANNEL29.CHINTENCLR0x4100610CCHANNEL29.CHINTENSET0x4100610DCHANNEL29.CHINTFLAG0x4100610ECHANNEL29.CHSTATUS0x4100610FCHANNEL30.CHANNEL0x41006110CHANNEL30.CHINTENCLR0x41006114CHANNEL30.CHINTENSET0x41006115CHANNEL30.CHINTFLAG0x41006116CHANNEL30.CHSTATUS0x41006117CHANNEL31.CHANNEL0x41006118CHANNEL31.CHINTENCLR0x4100611CCHANNEL31.CHINTENSET0x4100611DCHANNEL31.CHINTFLAG0x4100611ECHANNEL31.CHSTATUS0x4100611FUSER00x41006120USER10x41006124USER20x41006128USER30x4100612CUSER40x41006130USER50x41006134USER60x41006138USER70x4100613CUSER80x41006140USER90x41006144USER100x41006148USER110x4100614CUSER120x41006150USER130x41006154USER140x41006158USER150x4100615CUSER160x41006160USER170x41006164USER180x41006168USER190x4100616CUSER200x41006170USER210x41006174USER220x41006178USER230x4100617CUSER240x41006180USER250x41006184USER260x41006188USER270x4100618CUSER280x41006190USER290x41006194USER300x41006198USER310x4100619CUSER320x410061A0USER330x410061A4USER340x410061A8USER350x410061ACUSER360x410061B0USER370x410061B4USER380x410061B8USER390x410061BCUSER400x410061C0USER410x410061C4USER420x410061C8USER430x410061CCUSER440x410061D0USER450x410061D4USER460x410061D8USER470x410061DCUSER480x410061E0USER490x410061E4USER500x410061E8USER510x410061EC

GPIOA

GPIO

GPIO

Registers

Pins

GPIOB

GPIO

GPIO

Registers

Pins

HMATRIX

HMATRIXB

HSB Matrix

Registers

ITM

ITM

Instrumentation Trace Macrocell

Registers

NVIC

NVIC

Nested Vectored Interrupt Controller

Registers

NVM

NVM

flash controller

Registers

PFW

PFW

flash wrapper

Registers

PMU

PMU

PMU SPI controller

Registers

Pins

PPS

PPS

PPS

Registers

Pins

PUKCC

PUKCC

PUblic-Key Cryptography Controller

RTC

RTC

Real-Time Counter

Registers

Pins

SystemControl

SystemControl

System Control Registers

Registers

ZIGBEE

ZIGBEE

ZIGBEE Radio Registers