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LM741Single bipolar operational amplifier

Understand analog gain through negative feedback.

Manufacturer-referenced

Texas Instruments · LM741CN/NOPB

PDIP-8SNOSC25D · October 2015

LM741 is a classic single operational amplifier with a bipolar input stage, internal compensation and dedicated offset-adjustment pins. Negative feedback turns its high open-loop gain into a predictable closed-loop circuit. Our example uses a ±15 V supply and a gain of ten: a 0.20 V input ideally becomes 2.00 V. The supply midpoint is the signal ground; it is separate from the IC’s negative power pin. This page uses the commercial LM741CN/NOPB in PDIP-8. The reviewed TI document removed the obsolete SOIC package, so this reference does not offer a fabricated SMD counterpart.

3D View

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Real View

LM741CN/NOPB black package with silver leads and readable markings.
LM741CN/NOPB · PDIP-8Package illustration

Pinout

LM741CN/NOPBPDIP-8Top view
Select a pin to see its functionPDIP-8 · 8 pins

PCB Footprint

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Finding PDIP-8 packageTop view · mm
Offset adjustmentSignal inputsSupply railsAnalog outputUnconnected
LM741CN/NOPBPDIP-8Top view

Click a lead or use the arrow keys. Top view

1
PIN 1 · Offset adjustment

OFFSET1

Offset adjustment

Function

One end of the optional offset-null network.

How to connect

Leave open in the basic example.

Electrical note

Use the manufacturer trim circuit when offset adjustment is required.

At a glance

Single bipolar operational amplifier

Use the signal midpoint and two supply rails correctly. The output cannot reach either rail.

±15 V · split supplyExample rails
1 Eight-pin packageAmplifiers
0–70 °CLM741C ambient
0.5 V/µs · unity gain, 25°CTypical slew rate

Operating profile

LM741CN/NOPB

Selected package
PDIP-8LM741CN/NOPB
Example gain
10×90 kΩ feedback / 10 kΩ to ground
Ideal example output
2.00 VVIN = 0.20 V

Operating conditions

Key parameters and their test conditions

Recommended split supply
±10 to ±18 VConditions / notes: TI operating table; ±15 V nominal
Ambient temperature
0 to +70°CConditions / notes: LM741C grade
Example rails
+15 V / −15 VConditions / notes: 30 V total span; midpoint is 0 V
Input common-mode range
±12 V minimum; ±13 V typicalConditions / notes: ±15 V supply; 25°C
Local bypass
100 nF from each rail to midpointConditions / notes: Short paths near pins 7 and 4

Package details

Follows the selected physical package

Manufacturer
Texas Instruments
Part number
LM741CN/NOPB
Package
PDIP-8
Connections
8 pins
Mounting
Through-hole
Lead pitch
2.54 mm
Package code
dip
Thermal reference
Board and package dependent; see manufacturer data

Connections by function

Select a pin to open its function, electrical notes and wiring guidance.

Offset adjustment2 pins

Signal inputs2 pins

Supply rails2 pins

Analog output1 pins

Unconnected1 pins

Compare two inputs

The input stage responds to the difference between pins 3 and 2. Small input errors can cause large output changes without feedback.

Return part of the output

The 90 kΩ and 10 kΩ network returns one tenth of the output to IN−. Negative feedback brings this near the voltage at IN+.

Stay within the analog limits

With ±15 V rails, the example has comfortable headroom. Input offset and bias currents introduce DC error; bandwidth, slew rate and loading limit changing signals.

The resistor ratio determines nominal gain. Real offset, bias current, output swing and dynamic limits determine how accurately that gain is achieved.

LM741 compact functional cutaway: bipolar differential input, voltage gain with internal compensation, output driver and offset adjustment. Supply pins7and4.
Functional stages, not a transistor-level die schematic.
LM741CN positive rail7to+15V,negative rail4to−15V,IN+3to0.20V,OUT6through90kΩtoIN−2and10kΩto0V.100nFbypass oneachrail;offset1and5andNC8open.
Ground symbols denote the 0 V supply midpoint. Pin 4 connects to −15 V, not to ground.

Pin reference

Select a pin to explore its function and connection.

8 pins
PinSignalTypeFunction
OFFSET1Offset adjustmentOne end of the optional offset-null network.
IN−Inverting inputNegative feedback input.
IN+Non-inverting inputPositive signal input.
V−Negative supplyNegative power rail.
OFFSET2Offset adjustmentOther end of the optional offset-null network.
OUTAnalog outputAmplified output signal.
V+Positive supplyPositive power rail.
NCNo connectionNo electrical connection is specified for this contact.
PDIP-8 · Top view · Select a pin number to inspect its connection.

Operating conditions

Commercial LM741C reference

ParameterValueConditions / notes
Recommended split supply±10 to ±18 VTI operating table; ±15 V nominal
Ambient temperature0 to +70°CLM741C grade
Example rails+15 V / −15 V30 V total span; midpoint is 0 V
Input common-mode range±12 V minimum; ±13 V typical±15 V supply; 25°C
Local bypass100 nF from each rail to midpointShort paths near pins 7 and 4

Do not substitute military-grade limits or assume modern rail-to-rail operation.

DC characteristics

LM741C · ±15 V · 25°C unless stated

ParameterValueConditions / notes
Input offset2 mV typical; 6 mV maximumRS ≤ 10 kΩ
Input bias current80 nA typical; 500 nA maximumMagnitude; specified test conditions
Input offset current20 nA typical; 200 nA maximumDifference between the input currents
Supply current1.7 mA typical; 2.8 mA maximumNo external output load
Open-loop gain200 V/mV typical; 20 minimumVO = ±10 V; RL ≥ 2 kΩ

Input offset is multiplied by the closed-loop noise gain. Bias-current errors depend on the source resistances.

Output and dynamic limits

Specified test conditions

ParameterValueConditions / notes
Output swing, RL ≥ 10 kΩ±14 V typical; ±12 V minimum±15 V supply
Output swing, RL ≥ 2 kΩ±13 V typical; ±10 V minimum±15 V supply
Slew rate0.5 V/µs typical25°C; unity gain
Small-signal rise time0.3 µs typical25°C; unity gain
Large sine-wave requirementSR ≥ 2π f VPEAKEngineering design relation, not a new device rating

Load, amplitude and frequency matter together. A slow DC example does not establish high-frequency performance.

Gain-of-ten example

Non-inverting connection

ParameterValueConditions / notes
VIN0.20 VPin 3, referenced to 0 V
Rf90 kΩPin 6 to pin 2
Rg10 kΩPin 2 to 0 V
Nominal gain10 V/V1 + Rf / Rg
Ideal output2.00 V0.20 V × 10
Feedback node0.20 V nominalOutput divided by ten
Null pins / NC1, 5 and 8 left openOptional trim is not used

An illustrative light-load DC example; it is not a precision or rail-to-rail claim.

Package and connection reference

LM741CN/NOPB · PDIP-8

ParameterValueConditions / notes
Lead pitch2.54 mmThrough-hole
InputsIN− 2; IN+ 3Differential signal pair
Output6Amplifier output
PowerV− 4; V+ 7Both rails are required for this circuit
Offset adjustment1 and 5See manufacturer trim circuit
No connection8Leave open

PDIP top view; orient the notch before counting pins.

Take it into ProTech

Find LM741 in the Components Library to place its schematic symbol and connect its pins.

Reference page · circuit simulation model not yet availableOpen ProTech

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