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PCF85748-bit quasi-bidirectional I²C I/O expander

Add eight simple I/O lines through a two-wire bus.

Manufacturer-referenced

Texas Instruments · PCF8574N

PDIP-16SCPS068K · September 2024

PCF8574 adds eight quasi-bidirectional I/O lines to a standard-mode I²C bus. A controller reads or writes one port byte directly after the device address; there is no direction register or register-address byte. Three hardware address pins allow eight PCF8574 devices on one bus. Writing a port bit LOW turns on its sink driver. Writing it HIGH releases the pin with a weak current-source pull-up, allowing an external switch or device to pull it LOW for input use. All port bits start HIGH after power-on, and software must keep input bits HIGH in every subsequent output write. The example uses one port bit to sink a current-limited LED and another to read a grounded pushbutton. An open-drain interrupt reports input changes. The expander, controller and pull-ups share a 5 V logic domain; using another controller voltage requires a compatible supply choice or suitable level translation.

Real View

PCF8574N black package with silver leads and readable markings.
PCF8574N · PDIP-16Package illustration

Pinout

PCF8574NPDIP-16Top view
Select a pin to see its functionPDIP-16 · 16 pins

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16Physical pins PCF8574NPDIP-16 Manufacturer-referencedTexas Instruments

Pin diagram

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Package map
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PCF8574NPDIP-16Top view

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1
PIN 1 · Hardware address

A0

Address input

Function

Sets bit 0 of the 7-bit I²C address. Tie directly to VCC or GND.

How to connect

Ground all three address inputs for address 0x20.

Electrical note

Keep stable throughout a bus transaction.

Key specifications

Each port bit combines an output latch, a sink driver and a weak HIGH current source. Writing 1 prepares an input; writing 0 actively pulls the terminal LOW.

Operating supply2.5–6 V
I²C clock100 kHz maximum
Quasi-bidirectional lines8 No direction register
Operating range−40–85 °C

Operating profile

Supply, signals and operating conditions

PCF8574 operating profile
ParameterValueConditions / notes
Selected packagePDIP-16PCF8574N
7-bit address0x20–0x27A2 · A1 · A0
Standby current10 µA max.Specified no-load conditions
Use these values with the stated grade and test conditions.

Package details

PCF8574N · PDIP-16

Selected package
Selected PCF8574 physical package
PropertyDetails
ManufacturerTexas Instruments
Part numberPCF8574N
PackagePDIP-16
Connections16 pins
MountingThrough-hole
Lead pitch2.54 mm
Package codedip
Thermal referenceBoard and package dependent; see manufacturer data

Port behavior

Quasi-bidirectional operation

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ParameterValueConditions / notes
Latch bit 0Active LOW sinkSuitable for sinking a current-limited LED
Latch bit 1Weak current-source HIGHCan be pulled LOW externally and used as input
Power-on stateAll latch bits HIGHPins behave as inputs with weak HIGH sources
Direction registersNoneDirection follows the output-latch state
Read valueActual terminal levelsMay differ from the software output shadow
Output updateWhole 8-bit byteKeep all input bits HIGH in every write

HIGH is not a sustained strong push-pull output. The temporary strong pull-up assists a rising edge only.

Address selection

7-bit addresses; do not include the R/W bit

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ParameterValueConditions / notes
A2 A1 A0 = 0000x20Write byte 0x40 · read byte 0x41
A2 A1 A0 = 0010x21Write byte 0x42 · read byte 0x43
A2 A1 A0 = 0100x22Write byte 0x44 · read byte 0x45
A2 A1 A0 = 0110x23Write byte 0x46 · read byte 0x47
A2 A1 A0 = 1000x24Write byte 0x48 · read byte 0x49
A2 A1 A0 = 1010x25Write byte 0x4a · read byte 0x4b
A2 A1 A0 = 1100x26Write byte 0x4c · read byte 0x4d
A2 A1 A0 = 1110x27Write byte 0x4e · read byte 0x4f

PCF8574A has a different address block. This page uses PCF8574.

Example byte transfers

Address pins grounded · 7-bit address 0x20

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ParameterValueConditions / notes
LED off; inputs releasedWrite 0xFFAll port latches HIGH
LED on at P0Write 0xFEP0 LOW; P1–P7 remain HIGH
Read the buttonRead one byte; inspect bit 1P1 LOW when the grounded button is pressed
Typical pressed read with LED on0xFCAssumes other released inputs read HIGH
Transfer structureSTART → address → data → STOPNo register-address byte
INT servicingRead port, process changes, debounceRead/write or return to original state can reset INT

The example values describe the stated wiring. Do not use a read byte as an unfiltered output-latch shadow.

Electrical limits

Recommended operation unless marked otherwise

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ParameterValueConditions / notes
VCC2.5–6 VExample uses 5 V
Input HIGH / LOW≥ 0.7 VCC / ≤ 0.3 VCCSupply-dependent logic thresholds
P-port weak HIGH source30–310 µA magnitudeAt VO = GND, VCC 2.5–6 V
P-port sink10 mA minimum; 25 mA typicalAt VCC 5 V, VO 1 V
Recommended LOW current25 mA maximum per portObserve total device and thermal limits
SDA sink3 mA minimumAt VOL 0.4 V
INT sink1.6 mA minimumAt VOL 0.4 V
Standby supply current2.5 µA typical; 10 µA maximumVCC 6 V; inputs at rails; unloaded
Operating supply current40 µA typical; 100 µA maximumVCC 6 V; 100 kHz clock; unloaded

Do not interpret the absolute 50 mA port rating as a design target.

Bus timing and pull-ups

Standard-mode I²C

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ParameterValueConditions / notes
SCL frequency100 kHz maximumNot a 400 kHz fast-mode expander
SCL LOW / HIGH4.7 µs / 4.0 µs minimumTiming requirements
SDA setup250 ns minimumBefore SCL rises
Bus rise time1 µs maximumChoose pull-ups for capacitance and sink current
Maximum bus capacitance400 pFRequires a compatible pull-up value
Example pull-ups4.7 kΩ on SDA and SCLAbout 0.40 µs rise at an assumed 100 pF
Port / interrupt delay4 µs maximumSpecified switching-test conditions

The example 4.7 kΩ is a starting value for a short bus, not a guarantee at the full 400 pF limit.

Button and LED connections

5 V controller and expander

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ParameterValueConditions / notes
SupplyVCC16 +5 V; GND8 common100 nF local bypass
AddressA0 pin1, A1 pin2, A2 pin3 to GNDSelects 0x20
SDA15 / SCL14Controller I²C busEach has a 4.7 kΩ pull-up to +5 V
INT13Controller interrupt input10 kΩ pull-up to +5 V
P0 pin4LED cathodeAnode via 1 kΩ to +5 V; LOW turns it on
P1 pin5Pushbutton to GNDWrite latch bit 1 before reading; debounce
P2–P7Unused in this exampleLeave open and maintain latch bits HIGH

At assumed VF 2 V and VOL 0.2 V, LED current is (5 − 2 − 0.2)/1k = 2.8 mA. Actual values depend on the LED and port.

Package selection and stress limits

PCF8574N · PDIP-16

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ParameterValueConditions / notes
N packagePDIP-16; 2.54 mm pitchThrough-hole view shown
DW packageWide SOIC-16; 1.27 mm pitch7.5 mm nominal body width
PW / DGV alternatives20 physical leadsDifferent mapping with unused pins; not shown
VCC absolute maximum6.5 VNormal recommended maximum is 6 V
Continuous supply/ground current±100 mA absolute maximumStress rating; sum all loads
Storage temperature−65 to +150°CUnpowered

The two selected 16-pin packages share logical pin numbering but require different PCB footprints.

Connections by function

Select a pin for its function, connection guidance and electrical notes.

Hardware address3 pins

Eight port bits8 pins

Ground1 pin

Input-change interrupt1 pin

I²C interface2 pins

Supply1 pin

Read the conditions with every value

Typical values describe stated test conditions. Absolute maximum ratings are stress limits, not operating targets.

Official PDF datasheet

PCF8574 at a glance

Follow the labeled connections and functional stages

PCF8574 working principle: illustrated functional stages, basic circuit and connections
Select the diagram to read it at full resolution.

How it works

3 stages · Explore one step at a time

Step 1 / 3

Choose an address

Tie A2–A0 to fixed levels. All LOW selects the 7-bit address 0x20.

Step 2 / 3

Write the output latch

Send a single port byte. A zero sinks a load, while one releases the line for input or a weak HIGH.

Step 3 / 3

Read and service changes

Read the physical port state and service INT. Debounce switches in firmware and preserve input bits in the output shadow.

PCF8574 in a circuit

One output, one input and an interrupt line.

Physical16pinPCF8574 withA0A1A2ground supply5V bypass andI2Cpullups P0LEDsink P1groundedbutton INTpullup tohost.
P0 LOW lights the LED. P1 remains latched HIGH so the switch can pull it LOW.

Connect it, step by step

Follow the component values and pin connections

Set address and power

Ground the address pins, use a shared 5 V domain and bypass the supply.

Preserve input bits

Write FE for the LED on and FF for off; P1 remains HIGH in either write.

Read the switch

Read bit 1 when polling or servicing INT, and debounce in firmware.

Inside PCF8574

I²C control, an 8-bit latch and quasi-bidirectional ports.

PCF8574 cutaway containing address decode I2C shift register output latch weak source sink driver input sampling and interrupt logic.
Functional architecture; all port latches start HIGH after power-on.

Explore the circuit

Select a stage to see its role and connections

Address and transfer

SDA and SCL move a port byte after the matched address.

Latch and release

LOW activates the sink. HIGH releases a port with weak sourcing for input use.

Sample and notify

Reads sample terminal levels; input changes can assert the open-drain interrupt.

Selected packagePDIP-16PCF8574N
Physical connections16 pinsPackage-specific numbering
Reference collection8 tables49 parameters & pin functions

Pin reference

Signal names, electrical functions and connection guidance

PDIP-16
Physical pin numbers16 pins

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PCF8574 pin functions and connections
PinSignalTypeFunction & connection
A0Address inputSets bit 0 of the 7-bit I²C address. Tie directly to VCC or GND.
Connection guidance

Ground all three address inputs for address 0x20.

Keep stable throughout a bus transaction.

A1Address inputSets bit 1 of the 7-bit I²C address. Tie directly to VCC or GND.
Connection guidance

Ground all three address inputs for address 0x20.

Keep stable throughout a bus transaction.

A2Address inputSets bit 2 of the 7-bit I²C address. Tie directly to VCC or GND.
Connection guidance

Ground all three address inputs for address 0x20.

Keep stable throughout a bus transaction.

P0Quasi-bidirectional I/OPort bit 0. Writing 0 actively sinks; writing 1 releases the pin with its weak current-source pull-up so it can be read as an input.
Connection guidance

Connect LED cathode; LED anode reaches +5 V through 1 kΩ.

Not a conventional push-pull HIGH output; preserve input bits as 1 in every output write.

P1Quasi-bidirectional I/OPort bit 1. Writing 0 actively sinks; writing 1 releases the pin with its weak current-source pull-up so it can be read as an input.
Connection guidance

Connect a pushbutton to GND and leave its output-latch bit HIGH.

Not a conventional push-pull HIGH output; preserve input bits as 1 in every output write.

P2Quasi-bidirectional I/OPort bit 2. Writing 0 actively sinks; writing 1 releases the pin with its weak current-source pull-up so it can be read as an input.
Connection guidance

Leave unused pins open with their latch bits HIGH.

Not a conventional push-pull HIGH output; preserve input bits as 1 in every output write.

P3Quasi-bidirectional I/OPort bit 3. Writing 0 actively sinks; writing 1 releases the pin with its weak current-source pull-up so it can be read as an input.
Connection guidance

Leave unused pins open with their latch bits HIGH.

Not a conventional push-pull HIGH output; preserve input bits as 1 in every output write.

GNDGroundSupply and signal reference.
Connection guidance

Connect to controller ground.

P4Quasi-bidirectional I/OPort bit 4. Writing 0 actively sinks; writing 1 releases the pin with its weak current-source pull-up so it can be read as an input.
Connection guidance

Leave unused pins open with their latch bits HIGH.

Not a conventional push-pull HIGH output; preserve input bits as 1 in every output write.

P5Quasi-bidirectional I/OPort bit 5. Writing 0 actively sinks; writing 1 releases the pin with its weak current-source pull-up so it can be read as an input.
Connection guidance

Leave unused pins open with their latch bits HIGH.

Not a conventional push-pull HIGH output; preserve input bits as 1 in every output write.

P6Quasi-bidirectional I/OPort bit 6. Writing 0 actively sinks; writing 1 releases the pin with its weak current-source pull-up so it can be read as an input.
Connection guidance

Leave unused pins open with their latch bits HIGH.

Not a conventional push-pull HIGH output; preserve input bits as 1 in every output write.

P7Quasi-bidirectional I/OPort bit 7. Writing 0 actively sinks; writing 1 releases the pin with its weak current-source pull-up so it can be read as an input.
Connection guidance

Leave unused pins open with their latch bits HIGH.

Not a conventional push-pull HIGH output; preserve input bits as 1 in every output write.

INT̅Open-drain interrupt outputAsserts LOW after a change on an input port. Reading/writing the port or return to its original state resets the interrupt as described in the data sheet.
Connection guidance

Pull up with 10 kΩ to +5 V and connect to a 5 V-compatible interrupt input.

Edges during the acknowledge/reset interval may be lost; read the port and debounce buttons.

SCLI²C clock inputStandard-mode serial clock, up to 100 kHz.
Connection guidance

Connect controller SCL with a suitable pull-up to VCC.

SDAI²C serial dataBidirectional open-drain serial data.
Connection guidance

Connect controller SDA with a suitable pull-up to VCC.

VCCPositive supplyOperates from 2.5 V to 6 V.
Connection guidance

Use +5 V for this example and 100 nF directly to GND pin 8.

At 5 V, the specified input HIGH threshold is 3.5 V; do not assume a 3.3 V HIGH is sufficient.

PDIP-16 · Top view · Select a pin number to open its interactive pinout.

Port behavior

Quasi-bidirectional operation

Manufacturer-referenced values6 parameters

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ParameterValueConditions / notes
Latch bit 0Active LOW sinkSuitable for sinking a current-limited LED
Latch bit 1Weak current-source HIGHCan be pulled LOW externally and used as input
Power-on stateAll latch bits HIGHPins behave as inputs with weak HIGH sources
Direction registersNoneDirection follows the output-latch state
Read valueActual terminal levelsMay differ from the software output shadow
Output updateWhole 8-bit byteKeep all input bits HIGH in every write

HIGH is not a sustained strong push-pull output. The temporary strong pull-up assists a rising edge only.

Address selection

7-bit addresses; do not include the R/W bit

Manufacturer-referenced values8 parameters

Scroll within the table to see all columns and rows.

ParameterValueConditions / notes
A2 A1 A0 = 0000x20Write byte 0x40 · read byte 0x41
A2 A1 A0 = 0010x21Write byte 0x42 · read byte 0x43
A2 A1 A0 = 0100x22Write byte 0x44 · read byte 0x45
A2 A1 A0 = 0110x23Write byte 0x46 · read byte 0x47
A2 A1 A0 = 1000x24Write byte 0x48 · read byte 0x49
A2 A1 A0 = 1010x25Write byte 0x4a · read byte 0x4b
A2 A1 A0 = 1100x26Write byte 0x4c · read byte 0x4d
A2 A1 A0 = 1110x27Write byte 0x4e · read byte 0x4f

PCF8574A has a different address block. This page uses PCF8574.

Example byte transfers

Address pins grounded · 7-bit address 0x20

Manufacturer-referenced values6 parameters

Scroll within the table to see all columns and rows.

ParameterValueConditions / notes
LED off; inputs releasedWrite 0xFFAll port latches HIGH
LED on at P0Write 0xFEP0 LOW; P1–P7 remain HIGH
Read the buttonRead one byte; inspect bit 1P1 LOW when the grounded button is pressed
Typical pressed read with LED on0xFCAssumes other released inputs read HIGH
Transfer structureSTART → address → data → STOPNo register-address byte
INT servicingRead port, process changes, debounceRead/write or return to original state can reset INT

The example values describe the stated wiring. Do not use a read byte as an unfiltered output-latch shadow.

Electrical limits

Recommended operation unless marked otherwise

Manufacturer-referenced values9 parameters

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ParameterValueConditions / notes
VCC2.5–6 VExample uses 5 V
Input HIGH / LOW≥ 0.7 VCC / ≤ 0.3 VCCSupply-dependent logic thresholds
P-port weak HIGH source30–310 µA magnitudeAt VO = GND, VCC 2.5–6 V
P-port sink10 mA minimum; 25 mA typicalAt VCC 5 V, VO 1 V
Recommended LOW current25 mA maximum per portObserve total device and thermal limits
SDA sink3 mA minimumAt VOL 0.4 V
INT sink1.6 mA minimumAt VOL 0.4 V
Standby supply current2.5 µA typical; 10 µA maximumVCC 6 V; inputs at rails; unloaded
Operating supply current40 µA typical; 100 µA maximumVCC 6 V; 100 kHz clock; unloaded

Do not interpret the absolute 50 mA port rating as a design target.

Bus timing and pull-ups

Standard-mode I²C

Manufacturer-referenced values7 parameters

Scroll within the table to see all columns and rows.

ParameterValueConditions / notes
SCL frequency100 kHz maximumNot a 400 kHz fast-mode expander
SCL LOW / HIGH4.7 µs / 4.0 µs minimumTiming requirements
SDA setup250 ns minimumBefore SCL rises
Bus rise time1 µs maximumChoose pull-ups for capacitance and sink current
Maximum bus capacitance400 pFRequires a compatible pull-up value
Example pull-ups4.7 kΩ on SDA and SCLAbout 0.40 µs rise at an assumed 100 pF
Port / interrupt delay4 µs maximumSpecified switching-test conditions

The example 4.7 kΩ is a starting value for a short bus, not a guarantee at the full 400 pF limit.

Button and LED connections

5 V controller and expander

Manufacturer-referenced values7 parameters

Scroll within the table to see all columns and rows.

ParameterValueConditions / notes
SupplyVCC16 +5 V; GND8 common100 nF local bypass
AddressA0 pin1, A1 pin2, A2 pin3 to GNDSelects 0x20
SDA15 / SCL14Controller I²C busEach has a 4.7 kΩ pull-up to +5 V
INT13Controller interrupt input10 kΩ pull-up to +5 V
P0 pin4LED cathodeAnode via 1 kΩ to +5 V; LOW turns it on
P1 pin5Pushbutton to GNDWrite latch bit 1 before reading; debounce
P2–P7Unused in this exampleLeave open and maintain latch bits HIGH

At assumed VF 2 V and VOL 0.2 V, LED current is (5 − 2 − 0.2)/1k = 2.8 mA. Actual values depend on the LED and port.

Package selection and stress limits

PCF8574N · PDIP-16

Manufacturer-referenced values6 parameters

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ParameterValueConditions / notes
N packagePDIP-16; 2.54 mm pitchThrough-hole view shown
DW packageWide SOIC-16; 1.27 mm pitch7.5 mm nominal body width
PW / DGV alternatives20 physical leadsDifferent mapping with unused pins; not shown
VCC absolute maximum6.5 VNormal recommended maximum is 6 V
Continuous supply/ground current±100 mA absolute maximumStress rating; sum all loads
Storage temperature−65 to +150°CUnpowered

The two selected 16-pin packages share logical pin numbering but require different PCB footprints.

Read each value with its conditions

Typical values describe the stated test conditions. Absolute maximum ratings are stress limits, not operating targets.

Texas Instruments · SCPS068K · September 2024
Official PDF datasheet

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