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TL081Single JFET-input operational amplifier

High input impedance for sensitive analog signals.

Manufacturer-referenced

STMicroelectronics · TL081CN

PDIP-8TL081 · Rev 3 · June 2008

TL081 is a single operational amplifier with a JFET input stage and internal frequency compensation. It is useful when the signal source should supply very little input current. The example uses ±15 V rails and a gain of ten. A physical IC, two feedback resistors and local bypass capacitors show how a small input produces a larger output without changing polarity. This reference follows ST’s TL081C grade: TL081CN in DIP-8 and TL081CDT in SO-8. The pins retain the same numbers in both packages; limits from other manufacturers or newer revisions are not mixed into these tables.

Real View

TL081CN black package with silver leads and readable markings.
TL081CN · PDIP-8Package illustration

Pinout

TL081CNPDIP-8Top view
Select a pin to see its functionPDIP-8 · 8 pins

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Offset trimJFET signal inputsSupply railsAnalog outputUnconnected
TL081CNPDIP-8Top view

Click a lead or use the arrow keys. Top view

1
PIN 1 · Offset trim

NULL1

Offset null

Function

Optional input-offset trim connection.

How to connect

Leave open for the illustrated circuit.

Electrical note

Use the ST offset-adjustment network if trimming is required.

At a glance

Single JFET-input operational amplifier

A JFET input reduces source loading, while external negative feedback determines useful gain.

6–36 V · total rail-to-rail spanSupply span
4 MHz · specified ±15 V testTypical gain-bandwidth
0–70 °CC-grade ambient
16 V/µs · specified testTypical slew rate

Operating profile

TL081CN

Selected package
PDIP-8TL081CN
Input technology
JFETLow bias at room temperature
Example gain
10×0.20 V → 2.00 V, ideal

Operating conditions

Key parameters and their test conditions

Total supply span
6–36 VConditions / notes: V+ minus V−
Ambient temperature
0 to +70°CConditions / notes: C-grade devices
Reference test supply
±15 VConditions / notes: Used for electrical values unless stated
Common-mode range
±11 V minimum; −12 to +15 V typicalConditions / notes: ±15 V supply; see manufacturer conditions
Example input
0.20 VConditions / notes: Relative to the 0 V midpoint

Package details

Follows the selected physical package

Manufacturer
STMicroelectronics
Part number
TL081CN
Package
PDIP-8
Connections
8 pins
Mounting
Through-hole
Lead pitch
2.54 mm
Package code
dip
Thermal reference
Board and package dependent; see manufacturer data

Connections by function

Select a pin to open its function, electrical notes and wiring guidance.

Offset trim2 pins

JFET signal inputs2 pins

Supply rails2 pins

Analog output1 pins

Unconnected1 pins

Sense with JFET inputs

The differential input stage has a high input impedance. Leakage still rises with temperature, so a high-impedance source needs careful board cleanliness and bias analysis.

Close the feedback loop

A 90 kΩ resistor returns the output to IN− and a 10 kΩ resistor connects that node to 0 V. Their ratio sets a nominal non-inverting gain of ten.

Allow headroom and bandwidth

The amplifier needs input and output headroom. At higher frequencies, gain-bandwidth and slew rate limit the signal independently of the resistor ratio.

Check common-mode range, load, temperature and signal speed. High input impedance does not mean the amplifier can sense or drive every voltage.

TL081 functional stages inside a compact IC outline: JFET differential input, compensated voltage gain and output driver, with offset contacts and split supply.
Functional cutaway; not a transistor-level die schematic.
TL081CN poweredfrom±15Vwith100nFrailbypasses.0.2VtoIN+3.OUT6through90ktoIN−2and10kto0V.Trimpins1and5andNC8open.
All ground symbols are the 0 V midpoint, not the negative supply rail.

Pin reference

Select a pin to explore its function and connection.

8 pins
PinSignalTypeFunction
NULL1Offset nullOptional input-offset trim connection.
IN−Inverting inputInput used by the feedback network.
IN+Non-inverting inputJFET signal input.
V−Negative supplyNegative power rail.
NULL2Offset nullSecond optional trim connection.
OUTAnalog outputOutput of the internally compensated amplifier.
V+Positive supplyPositive power rail.
NCNo connectionUnused package contact.
PDIP-8 · Top view · Select a pin number to inspect its connection.

Operating conditions

ST TL081C grade

ParameterValueConditions / notes
Total supply span6–36 VV+ minus V−
Ambient temperature0 to +70°CC-grade devices
Reference test supply±15 VUsed for electrical values unless stated
Common-mode range±11 V minimum; −12 to +15 V typical±15 V supply; see manufacturer conditions
Example input0.20 VRelative to the 0 V midpoint

A typical range is not a guaranteed operating boundary. Use the specified minimum range for design margin.

DC characteristics

±15 V · 25°C · TL081C

ParameterValueConditions / notes
Input offset voltage3 mV typical; 10 mV maximumRS = 50 Ω
Input resistance1 TΩ typicalManufacturer Ri characteristic
Input offset current5 pA typical; 100 pA maximumDifference between input currents at 25°C
No-load supply current1.4 mA typical; 2.5 mA maximumPer amplifier
Open-loop gain200 V/mV typical; 25 minimumRL = 2 kΩ; VO = ±10 V

Bias leakage rises rapidly with temperature; room-temperature leakage values do not apply over the full range.

Output and dynamic characteristics

±15 V · specified tests

ParameterValueConditions / notes
Output swing at RL = 10 kΩ±13.5 V typical; ±12 V minimum25°C
Output swing at RL = 2 kΩ±12 V typical; ±10 V minimum25°C
Gain-bandwidth product4 MHz typical; 2.5 MHz minimumRL = 2 kΩ; CL = 100 pF; f = 100 kHz
Slew rate16 V/µs typical; 8 V/µs minimumUnity gain; 10 V input step; RL = 2 kΩ; CL = 100 pF
Input noise density15 nV/√Hz typicalRS = 100 Ω; 1 kHz

Do not infer output current or stability from bandwidth alone.

Gain-of-ten example

Split-supply non-inverting stage

ParameterValueConditions / notes
Power rails+15 V / −15 VPins 7 and 4
Input0.20 VIN+ pin 3
Feedback90 kΩOUT pin 6 to IN− pin 2
Ground resistor10 kΩIN− pin 2 to 0 V
Ideal gain / output10 V/V / 2.00 V1 + 90 / 10
Bypass100 nF per railEach rail to the 0 V midpoint
Trim and NCPins 1, 5, 8 openNo offset-trim network in this circuit

The meter is high impedance. Real output includes offset, noise and resistor errors.

Package and pin reference

TL081CN · PDIP-8

ParameterValueConditions / notes
Pitch2.54 mmThrough-hole
InputsIN− 2; IN+ 3JFET differential pair
Output6Single analog channel
PowerV− 4; V+ 70 V is the external supply midpoint
Offset trim1 and 5Optional; consult the exact manufacturer circuit
No connection8Leave open

Do not confuse TL081’s single-amplifier pinout with the dual TL072 pinout.

High-impedance buffers

Buffer suitable sensor or resistor-network signals without substantial room-temperature input loading.

Manufacturer application guide

Audio signal conditioning

Use controlled gains and AC coupling as required; verify noise, headroom and load for the complete signal chain.

Manufacturer application guide

Take it into ProTech

Find TL081 in the Components Library to place its schematic symbol and connect its pins.

Reference page · circuit simulation model not yet availableOpen ProTech

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