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TL494Dual-output PWM controller

One timing ramp. Controlled pulses. Two flexible outputs.

Manufacturer-referenced

Texas Instruments · TL494CN

PDIP-16SLVS074J · September 2026

TL494 combines two error amplifiers, a timing oscillator, dead-time control, a pulse-steering circuit and two uncommitted output transistors. It generates control pulses for a power stage; it does not contain a complete regulated power converter. An external resistor and capacitor set the oscillator frequency. Feedback and dead-time voltages determine how long the outputs conduct, while pin 13 selects simultaneous or alternating output operation. The internal five-volt reference supplies small control networks. Our 12 V bench example uses only resistor-loaded outputs and a potentiometer to adjust dead time. A scope shows pulse-width changes without needing a transformer or power switch. Compare the TL494CN PDIP-16 and TL494CDR SOIC-16 package views.

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TL494CN black PDIP-16 package with silver contacts and readable marking.
TL494CN · PDIP-16Package illustration

Pinout

TL494CNPDIP-16Top view
Select a pin to see its functionPDIP-16 · 16 pins

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16Physical pins TL494CNPDIP-16 Manufacturer-referencedTexas Instruments

Pin diagram

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TL494CNPDIP-16Top view

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1
PIN 1 · Error amplifier inputs

1IN+

Error amplifier 1 noninverting input

Function

A higher voltage than 1IN− demands shorter output pulses.

How to connect

Ground in the open-loop pulse example.

Key specifications

The error amplifiers and dead-time input can each reduce the output conduction interval. Output mode determines whether the two channels pulse together or alternate.

Recommended VCC7–40 V
Reference output5 V nominal · ±5% initial
Oscillator range1–300 kHz
Selected C grade0–70 °C

Operating profile

Supply, signals and operating conditions

TL494 operating profile
ParameterValueConditions / notes
Selected packagePDIP-16TL494CN
Main exampleSingle-endedPin 13 grounded
Calculated oscillator10 kHz100 kΩ × 1 nF
Use these values with the stated grade and test conditions.

Package details

TL494CN · PDIP-16

Selected package
Selected TL494 physical package
PropertyDetails
ManufacturerTexas Instruments
Part numberTL494CN
PackagePDIP-16
Connections16 pins
MountingThrough-hole
Lead pitch2.54 mm
Package codePDIP-16
Thermal referenceSee operating and package limits

Operating conditions

TL494C selected variants

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ParameterValueConditions / notes
Control supply7–40 V12 V bench circuit
Ambient temperature0 to +70°CC grade; I grade is a different ordering choice
Oscillator frequency1–300 kHzRecommended range
Timing resistor1.8–500 kΩRT to ground
Timing capacitor0.47–10000 nFCT to ground
Amplifier input common mode−0.3 V to VCC−2 VDo not exceed the valid range
Output currentUp to 200 mA per transistorCheck voltage drop, thermal conditions and external limits

Output current capability does not mean the IC includes a safe power-stage current limiter.

Reference and feedback

Specified test conditions

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ParameterValueConditions / notes
REF at 1 mA4.75–5.25 V; 5 V typicalSpecified supply and temperature conditions
Reference external loadUp to 10 mA available for biasIncludes the potentiometer and other external loads
Feedback input sink0.3 mA minimum, 0.7 mA typicalFEEDBACK = 0.7 V
PWM zero-duty threshold3.4 V typical, 4.5 V maximumFeedback control test
Error amplifier offset2 mV typical, 10 mV maximumSpecified electrical test
Error amplifier gain80 dB typical, 70 dB minimumSpecified load and output range

The reference is for control bias; it is not a general-purpose supply rail.

Output modes

Configure OUTPUT CTRL as a fixed logic level

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ParameterValueConditions / notes
Pin 13 to GNDSingle-ended / simultaneousBoth outputs can conduct during the same oscillator cycle
Pin 13 to REFPush-pull / alternatingEach output receives every other oscillator cycle
Single-ended frequencyfOUT ≈ fOSCSame period per channel
Push-pull frequencyfOUT ≈ fOSC / 2Twice the period per channel
Grounded DTCMaximum allowed conductionInternal blanking still prevents an ideal 100% duty
Increasing DTCShorter conduction pulsesAround 3.3 V can command zero duty under specified conditions

At the pulled-up C outputs used here, transistor conduction appears as a LOW pulse.

Resistor-loaded pulse circuit

No external power stage

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ParameterValueConditions / notes
VCC12 / GND7+12 V / common GND100 nF and local bulk bypass
REF14100 nF to GNDFeeds both inverting amplifier inputs and 10 kΩ pot
Amplifier inputs1 / 16 to GND; 2 / 15 to REFKeeps the error amplifiers from demanding shutdown
FEEDBACK3No external connectionInternal amplifier/bias network still determines its voltage
DTC4Potentiometer wiperPot ends REF and GND; start HIGH
CT5 / RT61 nF / 100 kΩ to GNDNominal 10 kHz design equation
Mode13GNDSimultaneous operation
OutputsE1-9 / E2-10 to GNDC1-8 and C2-11 each pull up to +12 V through 4.7 kΩ
MeasurementHigh-impedance two-channel scopeObserve each C output relative to GND

Do not attach a motor or transformer to this demonstration; output loads are deliberately small.

Frequency and example calculations

First-order design values

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ParameterValueConditions / notes
Oscillator1/(100000 Ω × 1 nF) = 10 kHzNominal approximation
Oscillator period100 µsInverse of 10 kHz
Single-ended output period100 µsSame as oscillator
Push-pull per-output period200 µs5 kHz on each output
Approximate pulled-up load12 V / 4.7 kΩ = 2.55 mAIgnoring switch voltage drop
Worst resistor power at continuous ON12² / 4700 ≈ 31 mWUse suitable voltage and power ratings
Potentiometer reference load5 V / 10 kΩ = 0.5 mAPlus other reference loads

Real timing varies with component tolerances and oscillator characteristics.

Layout and integration

Keep control wiring distinct from a power stage

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ParameterValueConditions / notes
Timing loopShort CT/RT ground returnKeep away from switching nodes
Reference bypassClose to REF14 and GND7Avoid loading the reference excessively
Supply bypassClose to VCC12 and GND7Add suitable local bulk capacitance
Feedback compensationApplication-specificNeeded for stable closed-loop regulation
Output polarityLOW at C when sinkingAn external follower connection has a different waveform
Power switch driveSeparate design taskCheck gate charge, edge speed and protection

A clear bench waveform alone does not validate a complete switching converter.

Package and stress limits

TL494CN · PDIP-16

Scroll sideways to see all columns.

ParameterValueConditions / notes
PDIPTL494CN · N package16 pins, 2.54 mm pitch
SOICTL494CDR · D package16 pins, 1.27 mm pitch
Supply stress41 V absolute maximumNormal operation maximum is 40 V
Output current stress250 mA absolute maximumRecommended current maximum is 200 mA with conditions
Storage−65 to +150°CUnpowered
Outputs C/EKeep the manufacturer pin namesThe current revision describes the switching output implementation separately from legacy terminology

Use the selected orderable and datasheet revision rather than mixing limits from different manufacturers.

Connections by function

Select a pin for its function, connection guidance and electrical notes.

Error amplifier inputs4 pins

PWM and mode control3 pins

Oscillator network2 pins

Ground1 pin

Uncommitted outputs4 pins

Supply1 pin

Bias reference1 pin

Read the conditions with every value

Typical values describe stated test conditions. Absolute maximum ratings are stress limits, not operating targets.

Official PDF datasheet

TL494 at a glance

Follow the labeled connections and functional stages

TL494 working principle: illustrated functional stages, basic circuit and connections
Select the diagram to read it at full resolution.

How it works

3 stages · Explore one step at a time

Step 1 / 3

Generate a timing ramp

RT6 and CT5 establish the sawtooth period. The first-order design equation is fOSC ≈ 1/(RT × CT).

Step 2 / 3

Limit pulse duration

The PWM and dead-time comparators suppress conduction when their control voltage exceeds the active timing ramp.

Step 3 / 3

Steer the outputs

Pin 13 chooses simultaneous pulses or alternating channels. Each C/E pair needs a suitable external connection and load.

TL494 in a circuit

A 12 V controller with low-current resistive loads.

TL494CN with12V supply,1nFCT,100kRT,REFpottoDTC,definederrorinputsandtwo4.7k resistorloadedoutputs.
Matching net labels connect; all grounds share the same return. Waveforms are illustrative.

Connect it, step by step

Follow the component values and pin connections

Set a nominal 10 kHz clock

Connect 1 nF to CT and 100 kΩ to RT, both returning to ground.

Adjust dead time

Turn the REF-powered potentiometer from HIGH toward LOW and observe the growing LOW pulses at C1/C2.

Compare modes

Power down before changing pin 13 from GND to REF. Push-pull mode alternates the channels and halves each output frequency.

Inside TL494

Timing, pulse control and output steering inside one controller.

Compact TL494 cutaway showing reference, oscillator, error amplifiers, PWM and dead-time comparators, steering and two output switches.
Functional cutaway; external timing and power components are outside the IC.

Explore the circuit

Select a stage to see its role and connections

Create a stable ramp

The reference and RC oscillator establish the timing waveform.

Compare control demands

Either error amplifier or DTC can reduce pulse duration.

Select the output pattern

The mode pin selects simultaneous or alternating output switching.

Selected packagePDIP-16TL494CN
Physical connections16 pinsPackage-specific numbering
Reference collection8 tables47 parameters & pin functions

Pin reference

Signal names, electrical functions and connection guidance

PDIP-16
Physical pin numbers16 pins

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TL494 pin functions and connections
PinSignalTypeFunction & connection
1IN+Error amplifier 1 noninverting inputA higher voltage than 1IN− demands shorter output pulses.
Connection guidance

Ground in the open-loop pulse example.

1IN−Error amplifier 1 inverting inputReference input for the first error amplifier.
Connection guidance

Connect to REF14 in the open-loop example.

FEEDBACKPWM feedback nodeShared error-amplifier output and PWM control node; increasing it suppresses pulses.
Connection guidance

Leave externally unconnected in this DTC-controlled demonstration.

Do not short this node to ground while an amplifier is trying to drive it HIGH.

DTCDead-time controlIncreasing this input shortens the conduction interval independently of the error amplifiers.
Connection guidance

Connect to the wiper of a 10 kΩ potentiometer between REF14 and GND.

Start with the wiper near REF for outputs OFF, then reduce it slowly.

CTOscillator capacitorCharges and discharges to form the internal timing ramp.
Connection guidance

Connect 1 nF to GND; keep the loop short.

RTOscillator resistorSets the timing capacitor charging current.
Connection guidance

Connect 100 kΩ to GND.

GNDCommon returnReference for control, oscillator and supply.
Connection guidance

Join bypass, timing and scope returns.

C1Output transistor 1 upper contactUncommitted output contact; the example uses it as a pulled-up switching output.
Connection guidance

Connect 4.7 kΩ to +12 V and a high-impedance scope channel.

Output goes LOW when its transistor conducts.

E1Output transistor 1 lower contactReturn-side contact of output transistor 1.
Connection guidance

Ground in this sinking-output example.

E2Output transistor 2 lower contactReturn-side contact of output transistor 2.
Connection guidance

Ground in this sinking-output example.

C2Output transistor 2 upper contactSecond uncommitted output contact.
Connection guidance

Connect its own 4.7 kΩ to +12 V and the second scope channel.

VCCControl supplySupplies the controller and reference regulator.
Connection guidance

Apply +12 V with 100 nF and local bulk decoupling to GND.

OUTPUT CTRLOutput mode selectionLOW selects simultaneous single-ended operation; REF selects alternating push-pull operation.
Connection guidance

Tie to GND in the main example. Change modes only with power removed.

This mode pin is not intended as a PWM switching input.

REFFive-volt reference outputRegulated reference for bias and control networks.
Connection guidance

Bypass with 100 nF; connect the control potentiometer and amplifier inverting inputs.

Reference current is limited; it does not supply motors or power loads.

2IN−Error amplifier 2 inverting inputReference input for the second amplifier.
Connection guidance

Connect to REF14 in the open-loop example.

2IN+Error amplifier 2 noninverting inputA higher voltage than 2IN− demands shorter pulses.
Connection guidance

Ground in the open-loop example.

PDIP-16 · Top view · Select a pin number to open its interactive pinout.

Operating conditions

TL494C selected variants

Manufacturer-referenced values7 parameters

Scroll within the table to see all columns and rows.

ParameterValueConditions / notes
Control supply7–40 V12 V bench circuit
Ambient temperature0 to +70°CC grade; I grade is a different ordering choice
Oscillator frequency1–300 kHzRecommended range
Timing resistor1.8–500 kΩRT to ground
Timing capacitor0.47–10000 nFCT to ground
Amplifier input common mode−0.3 V to VCC−2 VDo not exceed the valid range
Output currentUp to 200 mA per transistorCheck voltage drop, thermal conditions and external limits

Output current capability does not mean the IC includes a safe power-stage current limiter.

Reference and feedback

Specified test conditions

Manufacturer-referenced values6 parameters

Scroll within the table to see all columns and rows.

ParameterValueConditions / notes
REF at 1 mA4.75–5.25 V; 5 V typicalSpecified supply and temperature conditions
Reference external loadUp to 10 mA available for biasIncludes the potentiometer and other external loads
Feedback input sink0.3 mA minimum, 0.7 mA typicalFEEDBACK = 0.7 V
PWM zero-duty threshold3.4 V typical, 4.5 V maximumFeedback control test
Error amplifier offset2 mV typical, 10 mV maximumSpecified electrical test
Error amplifier gain80 dB typical, 70 dB minimumSpecified load and output range

The reference is for control bias; it is not a general-purpose supply rail.

Output modes

Configure OUTPUT CTRL as a fixed logic level

Manufacturer-referenced values6 parameters

Scroll within the table to see all columns and rows.

ParameterValueConditions / notes
Pin 13 to GNDSingle-ended / simultaneousBoth outputs can conduct during the same oscillator cycle
Pin 13 to REFPush-pull / alternatingEach output receives every other oscillator cycle
Single-ended frequencyfOUT ≈ fOSCSame period per channel
Push-pull frequencyfOUT ≈ fOSC / 2Twice the period per channel
Grounded DTCMaximum allowed conductionInternal blanking still prevents an ideal 100% duty
Increasing DTCShorter conduction pulsesAround 3.3 V can command zero duty under specified conditions

At the pulled-up C outputs used here, transistor conduction appears as a LOW pulse.

Resistor-loaded pulse circuit

No external power stage

Manufacturer-referenced values9 parameters

Scroll within the table to see all columns and rows.

ParameterValueConditions / notes
VCC12 / GND7+12 V / common GND100 nF and local bulk bypass
REF14100 nF to GNDFeeds both inverting amplifier inputs and 10 kΩ pot
Amplifier inputs1 / 16 to GND; 2 / 15 to REFKeeps the error amplifiers from demanding shutdown
FEEDBACK3No external connectionInternal amplifier/bias network still determines its voltage
DTC4Potentiometer wiperPot ends REF and GND; start HIGH
CT5 / RT61 nF / 100 kΩ to GNDNominal 10 kHz design equation
Mode13GNDSimultaneous operation
OutputsE1-9 / E2-10 to GNDC1-8 and C2-11 each pull up to +12 V through 4.7 kΩ
MeasurementHigh-impedance two-channel scopeObserve each C output relative to GND

Do not attach a motor or transformer to this demonstration; output loads are deliberately small.

Frequency and example calculations

First-order design values

Manufacturer-referenced values7 parameters

Scroll within the table to see all columns and rows.

ParameterValueConditions / notes
Oscillator1/(100000 Ω × 1 nF) = 10 kHzNominal approximation
Oscillator period100 µsInverse of 10 kHz
Single-ended output period100 µsSame as oscillator
Push-pull per-output period200 µs5 kHz on each output
Approximate pulled-up load12 V / 4.7 kΩ = 2.55 mAIgnoring switch voltage drop
Worst resistor power at continuous ON12² / 4700 ≈ 31 mWUse suitable voltage and power ratings
Potentiometer reference load5 V / 10 kΩ = 0.5 mAPlus other reference loads

Real timing varies with component tolerances and oscillator characteristics.

Layout and integration

Keep control wiring distinct from a power stage

Manufacturer-referenced values6 parameters

Scroll within the table to see all columns and rows.

ParameterValueConditions / notes
Timing loopShort CT/RT ground returnKeep away from switching nodes
Reference bypassClose to REF14 and GND7Avoid loading the reference excessively
Supply bypassClose to VCC12 and GND7Add suitable local bulk capacitance
Feedback compensationApplication-specificNeeded for stable closed-loop regulation
Output polarityLOW at C when sinkingAn external follower connection has a different waveform
Power switch driveSeparate design taskCheck gate charge, edge speed and protection

A clear bench waveform alone does not validate a complete switching converter.

Package and stress limits

TL494CN · PDIP-16

Manufacturer-referenced values6 parameters

Scroll within the table to see all columns and rows.

ParameterValueConditions / notes
PDIPTL494CN · N package16 pins, 2.54 mm pitch
SOICTL494CDR · D package16 pins, 1.27 mm pitch
Supply stress41 V absolute maximumNormal operation maximum is 40 V
Output current stress250 mA absolute maximumRecommended current maximum is 200 mA with conditions
Storage−65 to +150°CUnpowered
Outputs C/EKeep the manufacturer pin namesThe current revision describes the switching output implementation separately from legacy terminology

Use the selected orderable and datasheet revision rather than mixing limits from different manufacturers.

Read each value with its conditions

Typical values describe the stated test conditions. Absolute maximum ratings are stress limits, not operating targets.

Texas Instruments · SLVS074J · September 2026
Official PDF datasheet

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