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800 mA fixed-output linear regulator

TLV1117-33 Reference Tables

Search the TLV1117-33 pin reference and manufacturer-referenced specification tables.

Selected packageTO-252TLV1117-33IKVURG3
Physical connections3 pinsPackage-specific numbering
Reference collection7 tables38 parameters & pin functions

Pin reference

Signal names, electrical functions and connection guidance

TO-252
Physical pin numbers3 pins

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TLV1117-33 pin functions and connections
PinSignalTypeFunction & connection
GNDGround referenceReference and bias return for the fixed 3.3 V regulator.
Connection guidance

Join input return, capacitor returns and load ground locally.

Lead 1. The tab is OUTPUT, not ground.

OUTRegulated output and tabFixed 3.3 V output; also connected to the large exposed tab.
Connection guidance

Connect the load and output stability capacitor here.

Lead 2 and exposed thermal tab are one electrical node.

INSupply inputInput to the protected series-pass stage.
Connection guidance

Use +5 V with local ceramic bypass in the illustrated circuit.

Recommended 4.7–15 V for this output; allow dropout and ripple margin.

TO-252 · Front face · leads down · 1 GND, 2 OUT, 3 IN; tab OUT · Select a pin number to open its interactive pinout.

Exact order and silicon revision

One verified fixed-3.3 V package

Manufacturer-referenced values6 parameters

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ParameterValueConditions / notes
Selected orderTLV1117-33IKVURG3TO-252 KVU; industrial junction range
Package markingZF33Manufacturer marking plus traceability data
Physical electrical nodes1 GND; 2 OUT/tab; 3 INMetal tab must not be grounded
Legacy chip identifierCSO SFBUse legacy limits and stability guidance
New chip identifiersCSO RFB or FFABUse new fixed-output specifications
Through-hole optionNot offered on this pageNo matching fixed-3.3 V through-hole order verified in the selected order table

Package illustrations show identity; use the shipment label to distinguish silicon.

Operating range and accuracy

Selected I-grade device

Manufacturer-referenced values8 parameters

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ParameterValueConditions / notes
Recommended input4.7–15 VAdd ripple margin above worst-case dropout
Absolute maximum input16 VStress rating only
Output current0–800 mALimited by heat and source headroom
Recommended junction−40 to 125°CNot the ambient-temperature rating
Output at 25°C3.267–3.333 VVIN5 V, 10 mA load
I-grade output over specified range3.168–3.432 VVIN4.75–10 V; 0–800 mA; full temperature
I-grade line regulation1 mV typical; 10 mV maximumVIN4.75–15 V, no load
I-grade load regulation1 mV typical; 15 mV maximumVIN4.75 V; 0–800 mA

C-grade temperature and accuracy limits are not substituted.

Dropout: legacy versus new

I-grade limits; load matters

Manufacturer-referenced values6 parameters

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ParameterValueConditions / notes
Legacy at 100 mA1.1 V typical; 1.3 V maximumOutput dropout test
Legacy at 500 mA1.15 V typical; 1.35 V maximumOutput dropout test
Legacy at 800 mA1.2 V typical; 1.4 V maximumOutput dropout test
New fixed chip at 100 mA0.2 V typical; 0.4 V maximumNew-chip specification
New fixed chip at 500 mA0.5 V typical; 0.8 V maximumNew-chip specification
New fixed chip at 800 mA0.8 V typical; 1.2 V maximumNew-chip specification

The family operating input range still applies; dropout alone does not define the minimum permitted input.

Ground current and protection

Do not mix the silicon columns

Manufacturer-referenced values6 parameters

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ParameterValueConditions / notes
Legacy fixed-output ground current5 mA typical; 15 mA maximumVIN≤15 V
New fixed no-load ground current65 µA typical; 110 µA maximumVIN15 V; not a full-load bias specification
Legacy current limit0.8 A min.; 1.2 A typ.; 1.6 A max.5 V input/output differential, 25°C
New fixed current limit1.1 A typical; 1.6 A maximumVOUT=90% nominal; specified input headroom
New fixed short-circuit current150–350 mA; 250 mA typicalFoldback protection; not useful output power
New fixed thermal shutdown180°C typical; reset 160°C typicalProtection values, far above normal operating limits

Keep the junction below 125°C in normal service.

Capacitors and revision selection

The diagram targets new fixed-output silicon

Manufacturer-referenced values6 parameters

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ParameterValueConditions / notes
Illustrated input bypass10 µF ceramicClose to IN and GND; choose voltage rating and effective capacitance
Illustrated output capacitor1 µF effective ceramicTI new-chip example uses 1 µF
New fixed-output ESR2–500 mΩRecommended operating condition
Ceramic dielectricX7R or X5RAccount for tolerance, temperature and DC bias
Legacy output capacitorAt least 10 µF tantalumFollow the legacy stability guidance, not the new-chip example
Long input wiringUse local input capacitanceEspecially when source impedance exceeds 0.5 Ω

A nominal capacitor value does not guarantee its effective value under applied voltage.

Board cooling and calculated load

TO-252 soldered directly to a PCB

Manufacturer-referenced values6 parameters

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ParameterValueConditions / notes
New-chip KVU θJA67.2°C/WTI reference-board thermal metric
Legacy KVU θJA50.9°C/WDifferent silicon column and board-dependent metric
Example output load33 Ω →100 mA nominalLoad power 330 mW; use ≥1 W resistor
Example pass loss(5−3.3)×0.1=170 mWAdd VIN×actual ground current
Full 800 mA pass loss at 5 V1.36 WBefore bias term; large heat rise in small copper areas
Approximate rise at 1.36 W91°C using 67.2°C/WBoard-dependent estimate, not a guaranteed temperature

The headline 800 mA rating is not a promise at arbitrary input voltage and ambient.

Read each value with its conditions

Typical values describe the stated test conditions. Absolute maximum ratings are stress limits, not operating targets.

Texas Instruments · SLVS561O · June 2025
Official PDF datasheet

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