Real View
ATmega2560100-pin 8-bit AVR microcontroller
A large AVR with room for memory, ports and peripherals.
Manufacturer-referenced
Microchip Technology / Atmel · ATmega2560-16AU
TQFP-1002549Q–AVR · February 2014ATmega2560 is an eight-bit AVR microcontroller with 256 KB of Flash, 8 KB of SRAM and 4 KB of EEPROM. Its 100-pin package provides 86 programmable I/O lines, four USARTs, six timer/counters and a sixteen-channel ten-bit ADC. The physical chip pin numbers shown here are separate from Arduino Mega board header labels. The selected ATmega2560-16AU operates from 4.5 to 5.5 V at up to 16 MHz. Low-voltage ATmega2560V parts have different limits. Clock-source and divider fuses determine the real CPU speed; a factory-configured part normally starts from its internal 8 MHz RC oscillator divided by eight. The basic circuit uses regulated 5 V and the nominal 1 MHz factory clock, so it needs no crystal for this demonstration. Every supply and ground is connected, ISP remains accessible and an LED is limited by 1 kΩ on PB5. Firmware must match the clock and configure the chosen output before a timing result is meaningful.
Ports and alternate functionsAll digital and analog suppliesReset, ISP and JTAGSystem and timer clocksADC channels and reference
ATmega2560TQFP-100Top view
Click a lead or use the arrow keys. Top view
PIN 1 · Ports and alternate functions
GPIO / peripheralPG5 / OC0B
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 2 · Ports and alternate functions
GPIO / peripheralPE0 / RXD0 / PCINT8
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 3 · Ports and alternate functions
GPIO / peripheralPE1 / TXD0
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 4 · Ports and alternate functions
GPIO / peripheralPE2 / XCK0 / AIN0
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 5 · Ports and alternate functions
GPIO / peripheralPE3 / OC3A / AIN1
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 6 · Ports and alternate functions
GPIO / peripheralPE4 / OC3B / INT4
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 7 · Ports and alternate functions
GPIO / peripheralPE5 / OC3C / INT5
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 8 · Ports and alternate functions
GPIO / peripheralPE6 / T3 / INT6
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 9 · Ports and alternate functions
GPIO / peripheralPE7 / CLKO / ICP3 / INT7
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 10 · All digital and analog supplies
SupplyVCC
Function
Digital supply; all VCC pins must be connected.
How to connect
Regulated 5 V with a nearby 100 nF bypass capacitor at each supply.
PIN 11 · All digital and analog supplies
SupplyGND
Function
Ground return; connect every ground pad.
How to connect
Common ground plane.
PIN 12 · Ports and alternate functions
GPIO / peripheralPH0 / RXD2
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 13 · Ports and alternate functions
GPIO / peripheralPH1 / TXD2
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 14 · Ports and alternate functions
GPIO / peripheralPH2 / XCK2
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 15 · Ports and alternate functions
GPIO / peripheralPH3 / OC4A
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 16 · Ports and alternate functions
GPIO / peripheralPH4 / OC4B
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 17 · Ports and alternate functions
GPIO / peripheralPH5 / OC4C
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 18 · Ports and alternate functions
GPIO / peripheralPH6 / OC2B
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 19 · Ports and alternate functions
GPIO / peripheralPB0 / SS / PCINT0
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
Electrical note
Keep SS configured appropriately when SPI operates as a controller.
PIN 20 · Reset, ISP and JTAG
Program / debugPB1 / SCK / PCINT1
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Route to a compatible ISP programmer; keep external loads from fighting programming signals.
PIN 21 · Reset, ISP and JTAG
Program / debugPB2 / MOSI / PCINT2
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Route to a compatible ISP programmer; keep external loads from fighting programming signals.
PIN 22 · Reset, ISP and JTAG
Program / debugPB3 / MISO / PCINT3
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Route to a compatible ISP programmer; keep external loads from fighting programming signals.
PIN 23 · Ports and alternate functions
GPIO / peripheralPB4 / OC2A / PCINT4
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 24 · Ports and alternate functions
GPIO / peripheralPB5 / OC1A / PCINT5
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Example LED through 1 kΩ to ground.
PIN 25 · Ports and alternate functions
GPIO / peripheralPB6 / OC1B / PCINT6
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 26 · Ports and alternate functions
GPIO / peripheralPB7 / OC0A / OC1C / PCINT7
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 27 · Ports and alternate functions
GPIO / peripheralPH7 / T4
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 28 · System and timer clocks
Clock / GPIOPG3 / TOSC2
Function
Main oscillator or asynchronous timer oscillator connection, depending on the selected pin.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 29 · System and timer clocks
Clock / GPIOPG4 / TOSC1
Function
Main oscillator or asynchronous timer oscillator connection, depending on the selected pin.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 30 · Reset, ISP and JTAG
Program / debugRESET
Function
Active-low reset and serial-programming entry.
How to connect
10 kΩ pull-up to 5 V; route to ISP reset.
PIN 31 · All digital and analog supplies
SupplyVCC
Function
Digital supply; all VCC pins must be connected.
How to connect
Regulated 5 V with a nearby 100 nF bypass capacitor at each supply.
PIN 32 · All digital and analog supplies
SupplyGND
Function
Ground return; connect every ground pad.
How to connect
Common ground plane.
PIN 33 · System and timer clocks
Clock / GPIOXTAL2
Function
Main oscillator or asynchronous timer oscillator connection, depending on the selected pin.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 34 · System and timer clocks
Clock / GPIOXTAL1
Function
Main oscillator or asynchronous timer oscillator connection, depending on the selected pin.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 35 · Ports and alternate functions
GPIO / peripheralPL0 / ICP4
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 36 · Ports and alternate functions
GPIO / peripheralPL1 / ICP5
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 37 · Ports and alternate functions
GPIO / peripheralPL2 / T5
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 38 · Ports and alternate functions
GPIO / peripheralPL3 / OC5A
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 39 · Ports and alternate functions
GPIO / peripheralPL4 / OC5B
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 40 · Ports and alternate functions
GPIO / peripheralPL5 / OC5C
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 41 · Ports and alternate functions
GPIO / peripheralPL6
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 42 · Ports and alternate functions
GPIO / peripheralPL7
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 43 · Ports and alternate functions
GPIO / peripheralPD0 / SCL / INT0
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
Electrical note
Two-wire signals require external pull-ups to a compatible supply.
PIN 44 · Ports and alternate functions
GPIO / peripheralPD1 / SDA / INT1
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
Electrical note
Two-wire signals require external pull-ups to a compatible supply.
PIN 45 · Ports and alternate functions
GPIO / peripheralPD2 / RXD1 / INT2
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 46 · Ports and alternate functions
GPIO / peripheralPD3 / TXD1 / INT3
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 47 · Ports and alternate functions
GPIO / peripheralPD4 / ICP1
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 48 · Ports and alternate functions
GPIO / peripheralPD5 / XCK1
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 49 · Ports and alternate functions
GPIO / peripheralPD6 / T1
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 50 · Ports and alternate functions
GPIO / peripheralPD7 / T0
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 51 · Ports and alternate functions
GPIO / peripheralPG0 / WR
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 52 · Ports and alternate functions
GPIO / peripheralPG1 / RD
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 53 · Ports and alternate functions
GPIO / peripheralPC0 / A8
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 54 · Ports and alternate functions
GPIO / peripheralPC1 / A9
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 55 · Ports and alternate functions
GPIO / peripheralPC2 / A10
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 56 · Ports and alternate functions
GPIO / peripheralPC3 / A11
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 57 · Ports and alternate functions
GPIO / peripheralPC4 / A12
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 58 · Ports and alternate functions
GPIO / peripheralPC5 / A13
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 59 · Ports and alternate functions
GPIO / peripheralPC6 / A14
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 60 · Ports and alternate functions
GPIO / peripheralPC7 / A15
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 61 · All digital and analog supplies
SupplyVCC
Function
Digital supply; all VCC pins must be connected.
How to connect
Regulated 5 V with a nearby 100 nF bypass capacitor at each supply.
PIN 62 · All digital and analog supplies
SupplyGND
Function
Ground return; connect every ground pad.
How to connect
Common ground plane.
PIN 63 · Ports and alternate functions
GPIO / peripheralPJ0 / RXD3 / PCINT9
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 64 · Ports and alternate functions
GPIO / peripheralPJ1 / TXD3 / PCINT10
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 65 · Ports and alternate functions
GPIO / peripheralPJ2 / XCK3 / PCINT11
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 66 · Ports and alternate functions
GPIO / peripheralPJ3 / PCINT12
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 67 · Ports and alternate functions
GPIO / peripheralPJ4 / PCINT13
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 68 · Ports and alternate functions
GPIO / peripheralPJ5 / PCINT14
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 69 · Ports and alternate functions
GPIO / peripheralPJ6 / PCINT15
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 70 · Ports and alternate functions
GPIO / peripheralPG2 / ALE
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 71 · Ports and alternate functions
GPIO / peripheralPA7 / AD7
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 72 · Ports and alternate functions
GPIO / peripheralPA6 / AD6
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 73 · Ports and alternate functions
GPIO / peripheralPA5 / AD5
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 74 · Ports and alternate functions
GPIO / peripheralPA4 / AD4
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 75 · Ports and alternate functions
GPIO / peripheralPA3 / AD3
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 76 · Ports and alternate functions
GPIO / peripheralPA2 / AD2
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 77 · Ports and alternate functions
GPIO / peripheralPA1 / AD1
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 78 · Ports and alternate functions
GPIO / peripheralPA0 / AD0
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 79 · Ports and alternate functions
GPIO / peripheralPJ7
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 80 · All digital and analog supplies
SupplyVCC
Function
Digital supply; all VCC pins must be connected.
How to connect
Regulated 5 V with a nearby 100 nF bypass capacitor at each supply.
PIN 81 · All digital and analog supplies
SupplyGND
Function
Ground return; connect every ground pad.
How to connect
Common ground plane.
PIN 82 · ADC channels and reference
ADC / referencePK7 / ADC15 / PCINT23
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 83 · ADC channels and reference
ADC / referencePK6 / ADC14 / PCINT22
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 84 · ADC channels and reference
ADC / referencePK5 / ADC13 / PCINT21
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 85 · ADC channels and reference
ADC / referencePK4 / ADC12 / PCINT20
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 86 · ADC channels and reference
ADC / referencePK3 / ADC11 / PCINT19
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 87 · ADC channels and reference
ADC / referencePK2 / ADC10 / PCINT18
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 88 · ADC channels and reference
ADC / referencePK1 / ADC9 / PCINT17
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 89 · ADC channels and reference
ADC / referencePK0 / ADC8 / PCINT16
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 90 · ADC channels and reference
ADC / referencePF7 / ADC7 / TDI
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
Electrical note
JTAG can override GPIO/ADC functions on PF4–PF7; configure JTAG deliberately.
PIN 91 · ADC channels and reference
ADC / referencePF6 / ADC6 / TDO
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
Electrical note
JTAG can override GPIO/ADC functions on PF4–PF7; configure JTAG deliberately.
PIN 92 · ADC channels and reference
ADC / referencePF5 / ADC5 / TMS
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
Electrical note
JTAG can override GPIO/ADC functions on PF4–PF7; configure JTAG deliberately.
PIN 93 · ADC channels and reference
ADC / referencePF4 / ADC4 / TCK
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
Electrical note
JTAG can override GPIO/ADC functions on PF4–PF7; configure JTAG deliberately.
PIN 94 · ADC channels and reference
ADC / referencePF3 / ADC3
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 95 · ADC channels and reference
ADC / referencePF2 / ADC2
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 96 · ADC channels and reference
ADC / referencePF1 / ADC1
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 97 · ADC channels and reference
ADC / referencePF0 / ADC0
Function
Port pad shared with the named hardware functions. Configure direction and peripheral selection.
How to connect
Use voltage-compatible signals and define unused digital input levels.
PIN 98 · ADC channels and reference
ADC / referenceAREF
Function
ADC reference input or internal-reference decoupling, according to reference selection.
How to connect
Example: 100 nF to ground; select AVCC reference before using the ADC.
Electrical note
Do not drive AREF externally while an incompatible internal reference is enabled.
PIN 99 · All digital and analog supplies
SupplyGND
Function
Ground return; connect every ground pad.
How to connect
Common ground plane.
PIN 100 · All digital and analog supplies
SupplyAVCC
Function
Analog and associated port supply; connect even when the ADC is unused.
How to connect
Regulated 5 V with a nearby 100 nF bypass capacitor at each supply.
At a glance
100-pin 8-bit AVR microcontroller
The AVR core shares memory with timers, serial interfaces and analog conversion. Pin multiplexing determines which function is connected to the board.
256 KBProgram Flash
8 KBSRAM
86 linesDigital I/O
16 MHzMaximum clock
Operating profile
ATmega2560-16AU
Core and memory
Key parameters and their test conditions
- Program Flash
- 256 KBConditions / notes: 128K 16-bit instruction words
- SRAM
- 8 KBConditions / notes: 8192 bytes
- EEPROM
- 4 KBConditions / notes: 4096 bytes
- Register file
- 32 × 8-bit registersConditions / notes: AVR arithmetic operands
- Instruction set
- 135 instructionsConditions / notes: Many execute in one clock cycle
- Multiplier
- 8 × 8 bitsConditions / notes: Two-cycle hardware multiply
Package details
Follows the selected physical package
- Manufacturer
- Microchip Technology / Atmel
- Part number
- ATmega2560-16AU
- Package
- TQFP-100
- Connections
- 100 pins
- Mounting
- SMD
- Lead pitch
- 0.5 mm
- Package code
- TQFP-100
- Thermal reference
- See manufacturer operating limits
Connections by function
Select a pin to open its function, electrical notes and wiring guidance.
Ports and alternate functions65 pins
All digital and analog supplies10 pins
Reset, ISP and JTAG4 pins
System and timer clocks4 pins
ADC channels and reference17 pins
Connect all power
Include AVCC and every digital supply/ground pair.
Read clock fuses
Check CKSEL and CKDIV8 before assuming the CPU frequency.
Preserve ISP
Keep RESET, SCK, MOSI, MISO and supply reference accessible.
At a nominal 1 MHz CPU clock, Timer1 CTC with prescaler 64 and OCR1A = 7812 gives a 500.032 ms compare interval. Toggle PB5 each interval for approximately 0.999936 Hz.
Pin reference
Select a pin to explore its function and connection.
100 pins
| Pin | Signal | Type | Function |
|---|---|---|---|
| PG5 / OC0B | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PE0 / RXD0 / PCINT8 | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PE1 / TXD0 | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PE2 / XCK0 / AIN0 | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PE3 / OC3A / AIN1 | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PE4 / OC3B / INT4 | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PE5 / OC3C / INT5 | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PE6 / T3 / INT6 | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PE7 / CLKO / ICP3 / INT7 | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| VCC | Supply | Digital supply; all VCC pins must be connected. | |
| GND | Supply | Ground return; connect every ground pad. | |
| PH0 / RXD2 | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PH1 / TXD2 | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PH2 / XCK2 | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PH3 / OC4A | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PH4 / OC4B | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PH5 / OC4C | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PH6 / OC2B | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PB0 / SS / PCINT0 | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PB1 / SCK / PCINT1 | Program / debug | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PB2 / MOSI / PCINT2 | Program / debug | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PB3 / MISO / PCINT3 | Program / debug | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PB4 / OC2A / PCINT4 | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PB5 / OC1A / PCINT5 | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PB6 / OC1B / PCINT6 | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PB7 / OC0A / OC1C / PCINT7 | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PH7 / T4 | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PG3 / TOSC2 | Clock / GPIO | Main oscillator or asynchronous timer oscillator connection, depending on the selected pin. | |
| PG4 / TOSC1 | Clock / GPIO | Main oscillator or asynchronous timer oscillator connection, depending on the selected pin. | |
| RESET | Program / debug | Active-low reset and serial-programming entry. | |
| VCC | Supply | Digital supply; all VCC pins must be connected. | |
| GND | Supply | Ground return; connect every ground pad. | |
| XTAL2 | Clock / GPIO | Main oscillator or asynchronous timer oscillator connection, depending on the selected pin. | |
| XTAL1 | Clock / GPIO | Main oscillator or asynchronous timer oscillator connection, depending on the selected pin. | |
| PL0 / ICP4 | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PL1 / ICP5 | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PL2 / T5 | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PL3 / OC5A | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PL4 / OC5B | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PL5 / OC5C | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PL6 | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PL7 | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PD0 / SCL / INT0 | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PD1 / SDA / INT1 | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PD2 / RXD1 / INT2 | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PD3 / TXD1 / INT3 | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PD4 / ICP1 | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PD5 / XCK1 | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PD6 / T1 | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PD7 / T0 | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PG0 / WR | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PG1 / RD | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PC0 / A8 | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PC1 / A9 | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PC2 / A10 | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PC3 / A11 | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PC4 / A12 | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PC5 / A13 | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PC6 / A14 | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PC7 / A15 | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| VCC | Supply | Digital supply; all VCC pins must be connected. | |
| GND | Supply | Ground return; connect every ground pad. | |
| PJ0 / RXD3 / PCINT9 | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PJ1 / TXD3 / PCINT10 | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PJ2 / XCK3 / PCINT11 | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PJ3 / PCINT12 | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PJ4 / PCINT13 | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PJ5 / PCINT14 | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PJ6 / PCINT15 | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PG2 / ALE | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PA7 / AD7 | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PA6 / AD6 | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PA5 / AD5 | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PA4 / AD4 | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PA3 / AD3 | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PA2 / AD2 | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PA1 / AD1 | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PA0 / AD0 | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PJ7 | GPIO / peripheral | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| VCC | Supply | Digital supply; all VCC pins must be connected. | |
| GND | Supply | Ground return; connect every ground pad. | |
| PK7 / ADC15 / PCINT23 | ADC / reference | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PK6 / ADC14 / PCINT22 | ADC / reference | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PK5 / ADC13 / PCINT21 | ADC / reference | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PK4 / ADC12 / PCINT20 | ADC / reference | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PK3 / ADC11 / PCINT19 | ADC / reference | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PK2 / ADC10 / PCINT18 | ADC / reference | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PK1 / ADC9 / PCINT17 | ADC / reference | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PK0 / ADC8 / PCINT16 | ADC / reference | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PF7 / ADC7 / TDI | ADC / reference | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PF6 / ADC6 / TDO | ADC / reference | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PF5 / ADC5 / TMS | ADC / reference | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PF4 / ADC4 / TCK | ADC / reference | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PF3 / ADC3 | ADC / reference | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PF2 / ADC2 | ADC / reference | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PF1 / ADC1 | ADC / reference | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| PF0 / ADC0 | ADC / reference | Port pad shared with the named hardware functions. Configure direction and peripheral selection. | |
| AREF | ADC / reference | ADC reference input or internal-reference decoupling, according to reference selection. | |
| GND | Supply | Ground return; connect every ground pad. | |
| AVCC | Supply | Analog and associated port supply; connect even when the ADC is unused. |
No pins match. Try a signal name or choose All pins.
Core and memory
Selected ATmega2560
Manufacturer specifications 7 parameters
| Parameter | Value | Conditions / notes |
|---|---|---|
| Program Flash | 256 KB | 128K 16-bit instruction words |
| SRAM | 8 KB | 8192 bytes |
| EEPROM | 4 KB | 4096 bytes |
| Register file | 32 × 8-bit registers | AVR arithmetic operands |
| Instruction set | 135 instructions | Many execute in one clock cycle |
| Multiplier | 8 × 8 bits | Two-cycle hardware multiply |
| Maximum throughput | Up to 16 MIPS | At 16 MHz; instruction-dependent |
No specifications match. Try a parameter name or a unit.
Far program addresses and return-address width matter for firmware and bootloaders.
Supply and package
TQFP-100 selected orderable
Manufacturer specifications 7 parameters
| Parameter | Value | Conditions / notes |
|---|---|---|
| VCC range | 4.5–5.5 V | ATmega2560-16AU; not the V low-voltage variant |
| Digital VCC pins | 10, 31, 61, 80 | Bypass each locally |
| Ground pins | 11, 32, 62, 81, 99 | Connect all to common ground |
| AVCC pin100 | Analog and associated port supply | Connect even if ADC is unused |
| AREF pin98 | ADC reference connection | 100 nF to ground in the AVCC-reference example |
| Body / lead span | 14 × 14 mm / 16 × 16 mm nominal | 100A TQFP, 0.5 mm pitch |
| Industrial range | −40 to +85°C | Selected AU orderable |
No specifications match. Try a parameter name or a unit.
Verify the latest package drawing and production tolerances before PCB fabrication.
Clocks, reset and fuses
Check the actual configuration
Manufacturer specifications 7 parameters
| Parameter | Value | Conditions / notes |
|---|---|---|
| Factory clock source | Internal calibrated 8 MHz RC | Nominal frequency; tolerance applies |
| Factory CKDIV8 | Programmed | Initial divide-by-eight gives nominal 1 MHz |
| Clock prescaler | Software configurable | CLKPR timed-write sequence |
| Main oscillator pads | XTAL1-34 and XTAL2-33 | Use the selected crystal/clock configuration |
| Timer oscillator | TOSC1-29 and TOSC2-28 | Separate asynchronous Timer2 option |
| Reset pin30 | Active low | 10 kΩ pull-up and ISP access |
| Watchdog / brown-out | Fuse and register settings | Configure deliberately |
No specifications match. Try a parameter name or a unit.
A programmed fuse means a zero bit; do not infer fuse polarity from its name.
Timers and interfaces
Hardware blocks in this 100-pin device
Manufacturer specifications 8 parameters
| Parameter | Value | Conditions / notes |
|---|---|---|
| Timer0 / Timer2 | 8-bit | Compare and PWM functions |
| Timer1 / 3 / 4 / 5 | 16-bit | Compare, capture and waveform modes |
| USART0–3 | Four serial interfaces | TX/RX plus synchronous clock options |
| SPI | PB0 SS, PB1 SCK, PB2 MOSI, PB3 MISO | Physical pins19–22 |
| Two-wire interface | PD0 SCL43; PD1 SDA44 | External pull-ups required |
| ADC | 10-bit, 16 external channels | PF0–PF7 and PK0–PK7 |
| External memory | Multiplexed address/data interface | Ports A/C and PG control pins |
| JTAG | PF4–PF7 | Can override ordinary ADC/GPIO use |
No specifications match. Try a parameter name or a unit.
Alternative functions share pads; not every function can be active simultaneously.
Programming and digital ports
Physical chip connections
Manufacturer specifications 7 parameters
| Parameter | Value | Conditions / notes |
|---|---|---|
| ISP reset | RESET30 | Active-low programming entry |
| ISP clock / data | SCK20, MOSI21, MISO22 | Also connect VCC reference and GND |
| JTAG | TCK93, TMS92, TDO91, TDI90 | PF4–PF7 alternate functions |
| GPIO direction | DDRx bit1 output, bit0 input | Initialize PORTx before output enable |
| Input pull-up | PORTx=1 while input | Subject to global pull-up disable and peripheral overrides |
| Supply current limits | Observe per-pin, port and total limits | Absolute maximum is not a design target |
| Arduino numbering | Different from package pins | Use the board schematic when mapping header labels |
No specifications match. Try a parameter name or a unit.
Fuse changes can require a valid external clock or recovery programmer; review them before writing.
Minimal LED timing example
Factory-clock 5 V starting circuit
Manufacturer specifications 7 parameters
| Parameter | Value | Conditions / notes |
|---|---|---|
| Supply network | VCC10/31/61/80 and AVCC100 | 100 nF at every supply contact |
| Returns | GND11/32/62/81/99 | Common ground plane |
| Reset | RESET30 → 10 kΩ → 5 V | Preserve ISP access |
| LED output | PB5 physical24 → 1 kΩ → red LED → GND | About 3 mA for an ideal 2 V red LED |
| Timer1 setup | CTC, prescaler64, OCR1A=7812 | 7813 timer counts per compare |
| Compare interval | 64 × 7813 / 1 MHz = 500.032 ms | Toggle PB5 in the compare handler |
| Full blink frequency | Approximately 0.999936 Hz | Clock tolerance and firmware still apply |
No specifications match. Try a parameter name or a unit.
This illustration does not execute firmware; the values describe a configured example.
Multi-interface controllers
Connect several serial devices and large I/O groups.
Manufacturer application guideData acquisition
Sample sixteen analog channels with a reviewed reference.
Manufacturer application guideMotion and timing
Use several timers with external driver stages.
Manufacturer application guideTake it into ProTech
Find ATmega2560 in the Components Library to place its schematic symbol and connect its pins.
Reference page · circuit simulation model not yet availableOpen ProTech