ATtiny841 fuses & lock bits
The fuse bytes set the clock, start-up, brown-out and boot options; the lock bits protect flash and EEPROM. A fuse bit is programmed at 0 . Change a setting and the byte below updates; the starting values are the factory defaults.
CKDIV8 Divide clock by 8 internally 1 · unprogrammed 0 · programmed CKOUT Clock output on PORTC2 1 · unprogrammed 0 · programmed SUT_CKSEL Select Clock Source Ext. Clock; Start-up time PWRDWN/RESET: 6 CK/16 CK + 16 ms Int. RC Osc. 8 MHz; Start-up time PWRDWN/RESET: 6 CK/16 CK + 16 ms Int. ULP Osc.; Start-up time PWRDWN/RESET: 6 CK/16 CK + 16 ms Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 1K CK/16 CK + 16 ms Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 258 CK/16 CK + 16 ms Ext. Crystal Osc. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 16 K CK/16 CK + 16 ms Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 258 CK/16 CK + 16 ms Ext. Crystal Osc. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 16 K CK/16 CK + 16 ms Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 258 CK/16 CK + 16 ms Ext. Crystal Osc. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 16 K CK/16 CK + 16 ms Ext. Ceramic Res. 8.0- MHz; Start-up time PWRDWN/RESET: 258 CK/16 CK + 16 ms Ext. Crystal Osc. 8.0- MHz; Start-up time PWRDWN/RESET: 16 K CK/16 CK + 16 ms Ext. Low-Freq. Crystal; Start-up time PWRDWN/RESET: 32K CK/16 CK + 16 ms Ext. Ceramic Res. 0.4-0.9 MHz; Start-up time PWRDWN/RESET: 1K CK/16 CK + 16 ms Ext. Ceramic Res. 0.9-3.0 MHz; Start-up time PWRDWN/RESET: 1K CK/16 CK + 16 ms Ext. Ceramic Res. 3.0-8.0 MHz; Start-up time PWRDWN/RESET: 1K CK/16 CK + 16 ms Ext. Ceramic Res. 8.0- MHz; Start-up time PWRDWN/RESET: 1K CK/16 CK + 16 ms HIGH fuse 0xDF default 0xDF RSTDISBL Reset Disabled (Enable PC2 as i/o pin) 1 · unprogrammed 0 · programmed DWEN Debug Wire enable 1 · unprogrammed 0 · programmed SPIEN Serial program downloading (SPI) enabled 1 · unprogrammed 0 · programmed WDTON Watch-dog Timer always on 1 · unprogrammed 0 · programmed EESAVE Preserve EEPROM through the Chip Erase cycle 1 · unprogrammed 0 · programmed BODLEVEL Brown-out Detector trigger level Brown-out detection at VCC=4.3 V Brown-out detection at VCC=2.7 V Brown-out detection at VCC=1.8 V 7 (not named) EXTENDED fuse 0xFF default 0xFF ULPOSCSEL Frequency selection for internal ULP oscillator. The selection only affects system clock, watchdog and reset timeout always use 32 kHz clock. 512 kHz 256 kHz 128 kHz 64 kHz 32 kHz BODPD BOD mode of operation when the device is in sleep mode Sampled Enabled Disabled BODACT BOD mode of operation when the device is active or idle Sampled Enabled Disabled SELFPRGEN Self Programming enable 1 · unprogrammed 0 · programmed Lock bits 0xFF default 0xFF LB Memory Lock Further programming and verification disabled Further programming disabled No memory lock features enabled