BETAINDF0
- Address
0x00- Reset
x (not fixed at power-on)- Access
- read/write
- 7INDF07
- 6INDF06
- 5INDF05
- 4INDF04
- 3INDF03
- 2INDF02
- 1INDF01
- 0INDF00
1 field
| Field | Bits | What it does |
|---|---|---|
| INDF0 | 7:0 |
PIC16F15313 registers
All 228 registers by peripheral, at their data-memory address as the register file map gives it (bank and offset), with their reset value and every bit.
CPU CPU core
INDF1
- Address
0x01- Reset
x (not fixed at power-on)- Access
- read/write
- 7INDF17
- 6INDF16
- 5INDF15
- 4INDF14
- 3INDF13
- 2INDF12
- 1INDF11
- 0INDF10
1 field
| Field | Bits | What it does |
|---|---|---|
| INDF1 | 7:0 |
PCL
- Address
0x02- Reset
x (not fixed at power-on)- Access
- read/write
- 7PCL7
- 6PCL6
- 5PCL5
- 4PCL4
- 3PCL3
- 2PCL2
- 1PCL1
- 0PCL0
1 field
| Field | Bits | What it does |
|---|---|---|
| PCL | 7:0 |
STATUS
- Address
0x03- Reset
0x18- Access
- read/write
- 7–
- 6–
- 5–
- 4nTO
- 3nPD
- 2Z
- 1DC
- 0C
5 fields
| Field | Bits | What it does |
|---|---|---|
| nTO | 4 | |
| nPD | 3 | |
| Z | 2 | |
| DC | 1 | |
| C | 0 |
FSR0L
- Address
0x04- Reset
0x00- Access
- read/write
- 7FSR0L7
- 6FSR0L6
- 5FSR0L5
- 4FSR0L4
- 3FSR0L3
- 2FSR0L2
- 1FSR0L1
- 0FSR0L0
1 field
| Field | Bits | What it does |
|---|---|---|
| FSR0L | 7:0 |
FSR0H
- Address
0x05- Reset
0x00- Access
- read/write
- 7FSR0H7
- 6FSR0H6
- 5FSR0H5
- 4FSR0H4
- 3FSR0H3
- 2FSR0H2
- 1FSR0H1
- 0FSR0H0
1 field
| Field | Bits | What it does |
|---|---|---|
| FSR0H | 7:0 |
FSR1L
- Address
0x06- Reset
0x00- Access
- read/write
- 7FSR1L7
- 6FSR1L6
- 5FSR1L5
- 4FSR1L4
- 3FSR1L3
- 2FSR1L2
- 1FSR1L1
- 0FSR1L0
1 field
| Field | Bits | What it does |
|---|---|---|
| FSR1L | 7:0 |
FSR1H
- Address
0x07- Reset
0x00- Access
- read/write
- 7FSR1H7
- 6FSR1H6
- 5FSR1H5
- 4FSR1H4
- 3FSR1H3
- 2FSR1H2
- 1FSR1H1
- 0FSR1H0
1 field
| Field | Bits | What it does |
|---|---|---|
| FSR1H | 7:0 |
BSR
- Address
0x08- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5BSR5
- 4BSR4
- 3BSR3
- 2BSR2
- 1BSR1
- 0BSR0
1 field
| Field | Bits | What it does |
|---|---|---|
| BSR | 5:0 |
WREG
- Address
0x09- Reset
0x00- Access
- read/write
- 7WREG07
- 6WREG06
- 5WREG05
- 4WREG04
- 3WREG03
- 2WREG02
- 1WREG01
- 0WREG00
1 field
| Field | Bits | What it does |
|---|---|---|
| WREG0 | 7:0 |
PCLATH
- Address
0x0A- Reset
0x00- Access
- read/write
- 7–
- 6PCLATH6
- 5PCLATH5
- 4PCLATH4
- 3PCLATH3
- 2PCLATH2
- 1PCLATH1
- 0PCLATH0
1 field
| Field | Bits | What it does |
|---|---|---|
| PCLATH | 6:0 |
STATUS_SHAD
- Address
0x1FE4- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2STATUS_SHAD2
- 1STATUS_SHAD1
- 0STATUS_SHAD0
1 field
| Field | Bits | What it does |
|---|---|---|
| STATUS_SHAD | 2:0 |
WREG_SHAD
- Address
0x1FE5- Reset
x (not fixed at power-on)- Access
- read/write
- 7WREG_SHAD7
- 6WREG_SHAD6
- 5WREG_SHAD5
- 4WREG_SHAD4
- 3WREG_SHAD3
- 2WREG_SHAD2
- 1WREG_SHAD1
- 0WREG_SHAD0
1 field
| Field | Bits | What it does |
|---|---|---|
| WREG_SHAD | 7:0 |
BSR_SHAD
- Address
0x1FE6- Reset
x (not fixed at power-on)- Access
- read/write
- 7BSR_SHAD7
- 6BSR_SHAD6
- 5BSR_SHAD5
- 4BSR_SHAD4
- 3BSR_SHAD3
- 2BSR_SHAD2
- 1BSR_SHAD1
- 0BSR_SHAD0
1 field
| Field | Bits | What it does |
|---|---|---|
| BSR_SHAD | 7:0 |
PCLATH_SHAD
- Address
0x1FE7- Reset
x (not fixed at power-on)- Access
- read/write
- 7PCLATH_SHAD7
- 6PCLATH_SHAD6
- 5PCLATH_SHAD5
- 4PCLATH_SHAD4
- 3PCLATH_SHAD3
- 2PCLATH_SHAD2
- 1PCLATH_SHAD1
- 0PCLATH_SHAD0
1 field
| Field | Bits | What it does |
|---|---|---|
| PCLATH_SHAD | 7:0 |
FSR0L_SHAD
- Address
0x1FE8- Reset
x (not fixed at power-on)- Access
- read/write
- 7FSR0L_SHAD7
- 6FSR0L_SHAD6
- 5FSR0L_SHAD5
- 4FSR0L_SHAD4
- 3FSR0L_SHAD3
- 2FSR0L_SHAD2
- 1FSR0L_SHAD1
- 0FSR0L_SHAD0
1 field
| Field | Bits | What it does |
|---|---|---|
| FSR0L_SHAD | 7:0 |
FSR0H_SHAD
- Address
0x1FE9- Reset
x (not fixed at power-on)- Access
- read/write
- 7FSR0H_SHAD7
- 6FSR0H_SHAD6
- 5FSR0H_SHAD5
- 4FSR0H_SHAD4
- 3FSR0H_SHAD3
- 2FSR0H_SHAD2
- 1FSR0H_SHAD1
- 0FSR0H_SHAD0
1 field
| Field | Bits | What it does |
|---|---|---|
| FSR0H_SHAD | 7:0 |
FSR1L_SHAD
- Address
0x1FEA- Reset
x (not fixed at power-on)- Access
- read/write
- 7FSR1L_SHAD7
- 6FSR1L_SHAD6
- 5FSR1L_SHAD5
- 4FSR1L_SHAD4
- 3FSR1L_SHAD3
- 2FSR1L_SHAD2
- 1FSR1L_SHAD1
- 0FSR1L_SHAD0
1 field
| Field | Bits | What it does |
|---|---|---|
| FSR1L_SHAD | 7:0 |
FSR1H_SHAD
- Address
0x1FEB- Reset
x (not fixed at power-on)- Access
- read/write
- 7FSR1H_SHAD7
- 6FSR1H_SHAD6
- 5FSR1H_SHAD5
- 4FSR1H_SHAD4
- 3FSR1H_SHAD3
- 2FSR1H_SHAD2
- 1FSR1H_SHAD1
- 0FSR1H_SHAD0
1 field
| Field | Bits | What it does |
|---|---|---|
| FSR1H_SHAD | 7:0 |
STKPTR
- Address
0x1FED- Reset
0x1F- Access
- read/write
- 7–
- 6–
- 5–
- 4STKPTR4
- 3STKPTR3
- 2STKPTR2
- 1STKPTR1
- 0STKPTR0
5 fields
| Field | Bits | What it does |
|---|---|---|
| STKPTR4 | 4 | |
| STKPTR3 | 3 | |
| STKPTR2 | 2 | |
| STKPTR1 | 1 | |
| STKPTR0 | 0 |
TOSL
- Address
0x1FEE- Reset
x (not fixed at power-on)- Access
- read/write
- 7TOSL7
- 6TOSL6
- 5TOSL5
- 4TOSL4
- 3TOSL3
- 2TOSL2
- 1TOSL1
- 0TOSL0
1 field
| Field | Bits | What it does |
|---|---|---|
| TOSL | 7:0 |
TOSH
- Address
0x1FEF- Reset
x (not fixed at power-on)- Access
- read/write
- 7TOSH7
- 6TOSH6
- 5TOSH5
- 4TOSH4
- 3TOSH3
- 2TOSH2
- 1TOSH1
- 0TOSH0
1 field
| Field | Bits | What it does |
|---|---|---|
| TOSH | 7:0 |
INTERRUPT Interrupts
INTCON
- Address
0x0B- Reset
0x01- Access
- read/write
- 7GIE
- 6PEIE
- 5–
- 4–
- 3–
- 2–
- 1–
- 0INTEDG
3 fields
| Field | Bits | What it does |
|---|---|---|
| GIE | 7 | |
| PEIE | 6 | |
| INTEDG | 0 |
PIR0
- Address
0x70C- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5TMR0IF
- 4IOCIF
- 3–
- 2–
- 1–
- 0INTF
3 fields
| Field | Bits | What it does |
|---|---|---|
| TMR0IF | 5 | |
| IOCIF | 4 | |
| INTF | 0 |
PIR1
- Address
0x70D- Reset
0x00- Access
- read/write
- 7OSFIF
- 6CSWIF
- 5–
- 4–
- 3–
- 2–
- 1ADTIF
- 0ADIF
4 fields
| Field | Bits | What it does |
|---|---|---|
| OSFIF | 7 | |
| CSWIF | 6 | |
| ADTIF | 1 | |
| ADIF | 0 |
PIR2
- Address
0x70E- Reset
0x00- Access
- read/write
- 7–
- 6ZCDIF
- 5–
- 4–
- 3–
- 2–
- 1–
- 0C1IF
2 fields
| Field | Bits | What it does |
|---|---|---|
| ZCDIF | 6 | |
| C1IF | 0 |
PIR3
- Address
0x70F- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5RC1IF
- 4TX1IF
- 3–
- 2–
- 1BCL1IF
- 0SSP1IF
4 fields
| Field | Bits | What it does |
|---|---|---|
| RC1IF | 5 | |
| TX1IF | 4 | |
| BCL1IF | 1 | |
| SSP1IF | 0 |
PIR4
- Address
0x710- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2–
- 1TMR2IF
- 0TMR1IF
2 fields
| Field | Bits | What it does |
|---|---|---|
| TMR2IF | 1 | |
| TMR1IF | 0 |
PIR5
- Address
0x711- Reset
0x00- Access
- read/write
- 7CLC4IF
- 6CLC3IF
- 5CLC2IF
- 4CLC1IF
- 3–
- 2–
- 1–
- 0TMR1GIF
5 fields
| Field | Bits | What it does |
|---|---|---|
| CLC4IF | 7 | |
| CLC3IF | 6 | |
| CLC2IF | 5 | |
| CLC1IF | 4 | |
| TMR1GIF | 0 |
PIR6
- Address
0x712- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2–
- 1CCP2IF
- 0CCP1IF
2 fields
| Field | Bits | What it does |
|---|---|---|
| CCP2IF | 1 | |
| CCP1IF | 0 |
PIR7
- Address
0x713- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5NVMIF
- 4NCO1IF
- 3–
- 2–
- 1–
- 0CWG1IF
3 fields
| Field | Bits | What it does |
|---|---|---|
| NVMIF | 5 | |
| NCO1IF | 4 | |
| CWG1IF | 0 |
PIE0
- Address
0x716- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5TMR0IE
- 4IOCIE
- 3–
- 2–
- 1–
- 0INTE
3 fields
| Field | Bits | What it does |
|---|---|---|
| TMR0IE | 5 | |
| IOCIE | 4 | |
| INTE | 0 |
PIE1
- Address
0x717- Reset
0x00- Access
- read/write
- 7OSFIE
- 6CSWIE
- 5–
- 4–
- 3–
- 2–
- 1–
- 0ADIE
3 fields
| Field | Bits | What it does |
|---|---|---|
| OSFIE | 7 | |
| CSWIE | 6 | |
| ADIE | 0 |
PIE2
- Address
0x718- Reset
0x00- Access
- read/write
- 7–
- 6ZCDIE
- 5–
- 4–
- 3–
- 2–
- 1–
- 0C1IE
2 fields
| Field | Bits | What it does |
|---|---|---|
| ZCDIE | 6 | |
| C1IE | 0 |
PIE3
- Address
0x719- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5RC1IE
- 4TX1IE
- 3–
- 2–
- 1BCL1IE
- 0SSP1IE
4 fields
| Field | Bits | What it does |
|---|---|---|
| RC1IE | 5 | |
| TX1IE | 4 | |
| BCL1IE | 1 | |
| SSP1IE | 0 |
PIE4
- Address
0x71A- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2–
- 1TMR2IE
- 0TMR1IE
2 fields
| Field | Bits | What it does |
|---|---|---|
| TMR2IE | 1 | |
| TMR1IE | 0 |
PIE5
- Address
0x71B- Reset
0x00- Access
- read/write
- 7CLC4IE
- 6CLC3IE
- 5CLC2IE
- 4CLC1IE
- 3–
- 2–
- 1–
- 0TMR1GIE
5 fields
| Field | Bits | What it does |
|---|---|---|
| CLC4IE | 7 | |
| CLC3IE | 6 | |
| CLC2IE | 5 | |
| CLC1IE | 4 | |
| TMR1GIE | 0 |
PIE6
- Address
0x71C- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2–
- 1CCP2IE
- 0CCP1IE
2 fields
| Field | Bits | What it does |
|---|---|---|
| CCP2IE | 1 | |
| CCP1IE | 0 |
PIE7
- Address
0x71D- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5NVMIE
- 4NCO1IE
- 3–
- 2–
- 1–
- 0CWG1IE
3 fields
| Field | Bits | What it does |
|---|---|---|
| NVMIE | 5 | |
| NCO1IE | 4 | |
| CWG1IE | 0 |
PORTA I/O port A
PORTA
- Address
0x0C- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5RA5
- 4RA4
- 3RA3
- 2RA2
- 1RA1
- 0RA0
6 fields
| Field | Bits | What it does |
|---|---|---|
| RA5 | 5 | |
| RA4 | 4 | |
| RA3 | 3 | |
| RA2 | 2 | |
| RA1 | 1 | |
| RA0 | 0 |
TRISAPORTA Data Direction Control Register
- Address
0x12- Reset
0x37- Access
- read/write
- 7–
- 6–
- 5TRISA5
- 4TRISA4
- 3–
- 2TRISA2
- 1TRISA1
- 0TRISA0
5 fields
| Field | Bits | What it does |
|---|---|---|
| TRISA5 | 5 | |
| TRISA4 | 4 | |
| TRISA2 | 2 | |
| TRISA1 | 1 | |
| TRISA0 | 0 |
LATA
- Address
0x18- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5LATA5
- 4LATA4
- 3–
- 2LATA2
- 1LATA1
- 0LATA0
5 fields
| Field | Bits | What it does |
|---|---|---|
| LATA5 | 5 | |
| LATA4 | 4 | |
| LATA2 | 2 | |
| LATA1 | 1 | |
| LATA0 | 0 |
ANSELA
- Address
0x1F38- Reset
0x37- Access
- read/write
- 7–
- 6–
- 5ANSA5
- 4ANSA4
- 3–
- 2ANSA2
- 1ANSA1
- 0ANSA0
5 fields
| Field | Bits | What it does |
|---|---|---|
| ANSA5 | 5 | |
| ANSA4 | 4 | |
| ANSA2 | 2 | |
| ANSA1 | 1 | |
| ANSA0 | 0 |
WPUA
- Address
0x1F39- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5WPUA5
- 4WPUA4
- 3WPUA3
- 2WPUA2
- 1WPUA1
- 0WPUA0
6 fields
| Field | Bits | What it does |
|---|---|---|
| WPUA5 | 5 | |
| WPUA4 | 4 | |
| WPUA3 | 3 | |
| WPUA2 | 2 | |
| WPUA1 | 1 | |
| WPUA0 | 0 |
ODCONA
- Address
0x1F3A- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5ODCA5
- 4ODCA4
- 3–
- 2ODCA2
- 1ODCA1
- 0ODCA0
5 fields
| Field | Bits | What it does |
|---|---|---|
| ODCA5 | 5 | |
| ODCA4 | 4 | |
| ODCA2 | 2 | |
| ODCA1 | 1 | |
| ODCA0 | 0 |
SLRCONA
- Address
0x1F3B- Reset
0x37- Access
- read/write
- 7–
- 6–
- 5SLRA5
- 4SLRA4
- 3–
- 2SLRA2
- 1SLRA1
- 0SLRA0
5 fields
| Field | Bits | What it does |
|---|---|---|
| SLRA5 | 5 | |
| SLRA4 | 4 | |
| SLRA2 | 2 | |
| SLRA1 | 1 | |
| SLRA0 | 0 |
INLVLA
- Address
0x1F3C- Reset
0x3F- Access
- read/write
- 7–
- 6–
- 5INLVLA5
- 4INLVLA4
- 3INLVLA3
- 2INLVLA2
- 1INLVLA1
- 0INLVLA0
6 fields
| Field | Bits | What it does |
|---|---|---|
| INLVLA5 | 5 | |
| INLVLA4 | 4 | |
| INLVLA3 | 3 | |
| INLVLA2 | 2 | |
| INLVLA1 | 1 | |
| INLVLA0 | 0 |
ADC Analog-to-digital converter
ADRESL
- Address
0x9B- Reset
x (not fixed at power-on)- Access
- read/write
- 7ADRESL7
- 6ADRESL6
- 5ADRESL5
- 4ADRESL4
- 3ADRESL3
- 2ADRESL2
- 1ADRESL1
- 0ADRESL0
1 field
| Field | Bits | What it does |
|---|---|---|
| ADRESL | 7:0 |
ADRESH
- Address
0x9C- Reset
x (not fixed at power-on)- Access
- read/write
- 7ADRESH7
- 6ADRESH6
- 5ADRESH5
- 4ADRESH4
- 3ADRESH3
- 2ADRESH2
- 1ADRESH1
- 0ADRESH0
1 field
| Field | Bits | What it does |
|---|---|---|
| ADRESH | 7:0 |
ADCON0
- Address
0x9D- Reset
0x00- Access
- read/write
- 7CHS5
- 6CHS4
- 5CHS3
- 4CHS2
- 3CHS1
- 2CHS0
- 1GOnDONE
- 0ADON
8 fields
| Field | Bits | What it does |
|---|---|---|
| CHS5 | 7 | |
| CHS4 | 6 | |
| CHS3 | 5 | |
| CHS2 | 4 | |
| CHS1 | 3 | |
| CHS0 | 2 | |
| GOnDONE | 1 | |
| ADON | 0 |
ADCON1
- Address
0x9E- Reset
0x00- Access
- read/write
- 7ADFM
- 6ADCS2
- 5ADCS1
- 4ADCS0
- 3–
- 2–
- 1ADPREF1
- 0ADPREF0
6 fields
| Field | Bits | What it does |
|---|---|---|
| ADFM | 7 | |
| ADCS2 | 6 | |
| ADCS1 | 5 | |
| ADCS0 | 4 | |
| ADPREF1 | 1 | |
| ADPREF0 | 0 |
ADACT
- Address
0x9F- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5–
- 4ADACT4
- 3ADACT3
- 2ADACT2
- 1ADACT1
- 0ADACT0
5 fields
| Field | Bits | What it does |
|---|---|---|
| ADACT4 | 4 | |
| ADACT3 | 3 | |
| ADACT2 | 2 | |
| ADACT1 | 1 | |
| ADACT0 | 0 |
EUSART USART
RC1REG
- Address
0x119- Reset
0x00- Access
- read only
- 7RC1REG7
- 6RC1REG6
- 5RC1REG5
- 4RC1REG4
- 3RC1REG3
- 2RC1REG2
- 1RC1REG1
- 0RC1REG0
1 field
| Field | Bits | What it does |
|---|---|---|
| RC1REG | 7:0 |
TX1REG
- Address
0x11A- Reset
0x00- Access
- read/write
- 7TX1REG7
- 6TX1REG6
- 5TX1REG5
- 4TX1REG4
- 3TX1REG3
- 2TX1REG2
- 1TX1REG1
- 0TX1REG0
1 field
| Field | Bits | What it does |
|---|---|---|
| TX1REG | 7:0 |
SP1BRGL
- Address
0x11B- Reset
0x00- Access
- read/write
- 7SP1BRGL7
- 6SP1BRGL6
- 5SP1BRGL5
- 4SP1BRGL4
- 3SP1BRGL3
- 2SP1BRGL2
- 1SP1BRGL1
- 0SP1BRGL0
1 field
| Field | Bits | What it does |
|---|---|---|
| SP1BRGL | 7:0 |
SP1BRGH
- Address
0x11C- Reset
0x00- Access
- read/write
- 7SP1BRGH7
- 6SP1BRGH6
- 5SP1BRGH5
- 4SP1BRGH4
- 3SP1BRGH3
- 2SP1BRGH2
- 1SP1BRGH1
- 0SP1BRGH0
1 field
| Field | Bits | What it does |
|---|---|---|
| SP1BRGH | 7:0 |
RC1STA
- Address
0x11D- Reset
0x00- Access
- read/write
- 7SPEN
- 6RX9
- 5SREN
- 4CREN
- 3ADDEN
- 2FERR
- 1OERR
- 0RX9D
8 fields
| Field | Bits | What it does |
|---|---|---|
| SPEN | 7 | |
| RX9 | 6 | |
| SREN | 5 | |
| CREN | 4 | |
| ADDEN | 3 | |
| FERR | 2 | |
| OERR | 1 | |
| RX9D | 0 |
TX1STA
- Address
0x11E- Reset
0x02- Access
- read/write
- 7CSRC
- 6TX9
- 5TXEN
- 4SYNC
- 3SENDB
- 2BRGH
- 1TRMT
- 0TX9D
8 fields
| Field | Bits | What it does |
|---|---|---|
| CSRC | 7 | |
| TX9 | 6 | |
| TXEN | 5 | |
| SYNC | 4 | |
| SENDB | 3 | |
| BRGH | 2 | |
| TRMT | 1 | |
| TX9D | 0 |
BAUD1CON
- Address
0x11F- Reset
0x40- Access
- read/write
- 7ABDOVF
- 6RCIDL
- 5–
- 4SCKP
- 3BRG16
- 2–
- 1WUE
- 0ABDEN
6 fields
| Field | Bits | What it does |
|---|---|---|
| ABDOVF | 7 | |
| RCIDL | 6 | |
| SCKP | 4 | |
| BRG16 | 3 | |
| WUE | 1 | |
| ABDEN | 0 |
MSSP Master synchronous serial port (SPI, I²C)
SSP1BUF
- Address
0x18C- Reset
x (not fixed at power-on)- Access
- read/write
- 7SSPBUF7
- 6SSPBUF6
- 5SSPBUF5
- 4SSPBUF4
- 3SSPBUF3
- 2SSPBUF2
- 1SSPBUF1
- 0SSPBUF0
1 field
| Field | Bits | What it does |
|---|---|---|
| SSPBUF | 7:0 |
SSP1ADD
- Address
0x18D- Reset
0x00- Access
- read/write
- 7SSPADD7
- 6SSPADD6
- 5SSPADD5
- 4SSPADD4
- 3SSPADD3
- 2SSPADD2
- 1SSPADD1
- 0SSPADD0
1 field
| Field | Bits | What it does |
|---|---|---|
| SSPADD | 7:0 |
SSP1MSK
- Address
0x18E- Reset
0xFF- Access
- read/write
- 7SSPMSK7
- 6SSPMSK6
- 5SSPMSK5
- 4SSPMSK4
- 3SSPMSK3
- 2SSPMSK2
- 1SSPMSK1
- 0SSPMSK0
1 field
| Field | Bits | What it does |
|---|---|---|
| SSPMSK | 7:0 |
SSP1STATMSSP1 STATUS REGISTER
- Address
0x18F- Reset
0x00- Access
- read/write
- 7SMP
- 6CKE
- 5D_nA
- 4P
- 3S
- 2R_nW
- 1UA
- 0BF
8 fields
| Field | Bits | What it does |
|---|---|---|
| SMP | 7 | SPI Data Input Sample Phase bit |
| CKE | 6 | SPI Clock Edge Select bit |
| D_nA | 5 | Data/Address bit |
| P | 4 | Stop bit |
| S | 3 | Start bit |
| R_nW | 2 | Read/Write Information bit |
| UA | 1 | Update Address bit |
| BF | 0 | Buffer Full Status bit (Receive mode only) |
SSP1CON1
- Address
0x190- Reset
0x00- Access
- read/write
- 7WCOL
- 6SSPOV
- 5SSPEN
- 4CKP
- 3SSPM3
- 2SSPM2
- 1SSPM1
- 0SSPM0
5 fields
| Field | Bits | What it does |
|---|---|---|
| WCOL | 7 | Write Collision Detect bit (Transmit mode only) |
| SSPOV | 6 | Receive Overflow Indicator bit |
| SSPEN | 5 | Synchronous Serial Port Enable bit |
| CKP | 4 | Clock Polarity Select bit |
| SSPM | 3:0 | Synchronous Serial Port Mode Select bits |
SSP1CON2
- Address
0x191- Reset
0x00- Access
- read/write
- 7GCEN
- 6ACKSTAT
- 5ACKDT
- 4ACKEN
- 3RCEN
- 2PEN
- 1RSEN
- 0SEN
8 fields
| Field | Bits | What it does |
|---|---|---|
| GCEN | 7 | General Call Enable bit (Slave mode only) |
| ACKSTAT | 6 | Acknowledge Status bit (Transmission only) |
| ACKDT | 5 | Acknowledge Data bit (Receive mode only) |
| ACKEN | 4 | Acknowledge Sequence Enable bit (Master Receive mode only) |
| RCEN | 3 | Receive Enable bit (Master mode only) |
| PEN | 2 | Stop Condition Enable bit (Master mode only) |
| RSEN | 1 | Repeated Start Condition Enable bit (Master mode only) |
| SEN | 0 | Start Condition Enable/Stretch Enable bit |
SSP1CON3
- Address
0x192- Reset
0x00- Access
- read/write
- 7ACKTIM
- 6PCIE
- 5SCIE
- 4BOEN
- 3SDAHT
- 2SBCDE
- 1AHEN
- 0DHEN
8 fields
| Field | Bits | What it does |
|---|---|---|
| ACKTIM | 7 | |
| PCIE | 6 | |
| SCIE | 5 | |
| BOEN | 4 | |
| SDAHT | 3 | |
| SBCDE | 2 | |
| AHEN | 1 | |
| DHEN | 0 |
SSP1CLKPPS
- Address
0x1EC5- Reset
0x01- Access
- read/write
- 7–
- 6–
- 5SSP1CLKPPS5
- 4SSP1CLKPPS4
- 3SSP1CLKPPS3
- 2SSP1CLKPPS2
- 1SSP1CLKPPS1
- 0SSP1CLKPPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| SSP1CLKPPS | 5:0 |
SSP1DATPPS
- Address
0x1EC6- Reset
0x02- Access
- read/write
- 7–
- 6–
- 5SSP1DATPPS5
- 4SSP1DATPPS4
- 3SSP1DATPPS3
- 2SSP1DATPPS2
- 1SSP1DATPPS1
- 0SSP1DATPPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| SSP1DATPPS | 5:0 |
SSP1SSPPS
- Address
0x1EC7- Reset
0x03- Access
- read/write
- 7–
- 6–
- 5SSP1SSPPS5
- 4SSP1SSPPS4
- 3SSP1SSPPS3
- 2SSP1SSPPS2
- 1SSP1SSPPS1
- 0SSP1SSPPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| SSP1SSPPS | 5:0 |
TMR1 Timer1
TMR1L
- Address
0x20C- Reset
x (not fixed at power-on)- Access
- read/write
- 7TMR1L7
- 6TMR1L6
- 5TMR1L5
- 4TMR1L4
- 3TMR1L3
- 2TMR1L2
- 1TMR1L1
- 0TMR1L0
8 fields
| Field | Bits | What it does |
|---|---|---|
| TMR1L7 | 7 | |
| TMR1L6 | 6 | |
| TMR1L5 | 5 | |
| TMR1L4 | 4 | |
| TMR1L3 | 3 | |
| TMR1L2 | 2 | |
| TMR1L1 | 1 | |
| TMR1L0 | 0 |
TMR1H
- Address
0x20D- Reset
x (not fixed at power-on)- Access
- read/write
- 7TMR1H7
- 6TMR1H6
- 5TMR1H5
- 4TMR1H4
- 3TMR1H3
- 2TMR1H2
- 1TMR1H1
- 0TMR1H0
8 fields
| Field | Bits | What it does |
|---|---|---|
| TMR1H7 | 7 | |
| TMR1H6 | 6 | |
| TMR1H5 | 5 | |
| TMR1H4 | 4 | |
| TMR1H3 | 3 | |
| TMR1H2 | 2 | |
| TMR1H1 | 1 | |
| TMR1H0 | 0 |
T1CON
- Address
0x20E- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5CKPS1
- 4CKPS0
- 3–
- 2nSYNC
- 1RD16
- 0ON
4 fields
| Field | Bits | What it does |
|---|---|---|
| CKPS | 5:4 | |
| nSYNC | 2 | |
| RD16 | 1 | |
| ON | 0 |
T1GCON
- Address
0x20F- Reset
x (not fixed at power-on)- Access
- read/write
- 7GE
- 6GPOL
- 5GTM
- 4GSPM
- 3GGO_nDONE
- 2GVAL
- 1–
- 0–
6 fields
| Field | Bits | What it does |
|---|---|---|
| GE | 7 | |
| GPOL | 6 | |
| GTM | 5 | |
| GSPM | 4 | |
| GGO_nDONE | 3 | |
| GVAL | 2 |
T1GATE8-bit period timer
- Address
0x210- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4GSS4
- 3GSS3
- 2GSS2
- 1GSS1
- 0GSS0
1 field
| Field | Bits | What it does |
|---|---|---|
| GSS | 4:0 |
T1CLK
- Address
0x211- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3CS3
- 2CS2
- 1CS1
- 0CS0
1 field
| Field | Bits | What it does |
|---|---|---|
| CS | 3:0 |
TMR2 Timer2
T2TMR8-bit period timer
- Address
0x28C- Reset
0x00- Access
- read/write
- 7TMR7
- 6TMR6
- 5TMR5
- 4TMR4
- 3TMR3
- 2TMR2
- 1TMR1
- 0TMR0
1 field
| Field | Bits | What it does |
|---|---|---|
| TMR | 7:0 |
T2PR
- Address
0x28D- Reset
0xFF- Access
- read/write
- 7PR7
- 6PR6
- 5PR5
- 4PR4
- 3PR3
- 2PR2
- 1PR1
- 0PR0
1 field
| Field | Bits | What it does |
|---|---|---|
| PR | 7:0 |
T2CON
- Address
0x28E- Reset
0x00- Access
- read/write
- 7ON
- 6CKPS2
- 5CKPS1
- 4CKPS0
- 3OUTPS3
- 2OUTPS2
- 1OUTPS1
- 0OUTPS0
3 fields
| Field | Bits | What it does |
|---|---|---|
| ON | 7 | |
| CKPS | 6:4 | |
| OUTPS | 3:0 |
T2HLT
- Address
0x28F- Reset
0x00- Access
- read/write
- 7PSYNC
- 6CKPOL
- 5CKSYNC
- 4MODE4
- 3MODE3
- 2MODE2
- 1MODE1
- 0MODE0
4 fields
| Field | Bits | What it does |
|---|---|---|
| PSYNC | 7 | |
| CKPOL | 6 | |
| CKSYNC | 5 | |
| MODE | 4:0 |
T2CLKCON
- Address
0x290- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3CS3
- 2CS2
- 1CS1
- 0CS0
1 field
| Field | Bits | What it does |
|---|---|---|
| CS | 3:0 |
T2RST
- Address
0x291- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3RSEL3
- 2RSEL2
- 1RSEL1
- 0RSEL0
1 field
| Field | Bits | What it does |
|---|---|---|
| RSEL | 3:0 |
CCP1 Capture/compare/PWM 1
CCPR1L
- Address
0x30C- Reset
x (not fixed at power-on)- Access
- read/write
- 7RL7
- 6RL6
- 5RL5
- 4RL4
- 3RL3
- 2RL2
- 1RL1
- 0RL0
1 field
| Field | Bits | What it does |
|---|---|---|
| RL | 7:0 |
CCPR1H
- Address
0x30D- Reset
x (not fixed at power-on)- Access
- read/write
- 7RH7
- 6RH6
- 5RH5
- 4RH4
- 3RH3
- 2RH2
- 1RH1
- 0RH0
1 field
| Field | Bits | What it does |
|---|---|---|
| RH | 7:0 |
CCP1CON
- Address
0x30E- Reset
0x00- Access
- read/write
- 7EN
- 6–
- 5OUT
- 4FMT
- 3MODE3
- 2MODE2
- 1MODE1
- 0MODE0
4 fields
| Field | Bits | What it does |
|---|---|---|
| EN | 7 | |
| OUT | 5 | |
| FMT | 4 | |
| MODE | 3:0 |
CCP1CAP
- Address
0x30F- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2CTS2
- 1CTS1
- 0CTS0
1 field
| Field | Bits | What it does |
|---|---|---|
| CTS | 2:0 |
CCP1PPS
- Address
0x1EA1- Reset
0x05- Access
- read/write
- 7–
- 6–
- 5CCP1PPS5
- 4CCP1PPS4
- 3CCP1PPS3
- 2CCP1PPS2
- 1CCP1PPS1
- 0CCP1PPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| CCP1PPS | 5:0 |
CCP2 Capture/compare/PWM 2
CCPR2L
- Address
0x310- Reset
x (not fixed at power-on)- Access
- read/write
- 7RL7
- 6RL6
- 5RL5
- 4RL4
- 3RL3
- 2RL2
- 1RL1
- 0RL0
1 field
| Field | Bits | What it does |
|---|---|---|
| RL | 7:0 |
CCPR2H
- Address
0x311- Reset
x (not fixed at power-on)- Access
- read/write
- 7RH7
- 6RH6
- 5RH5
- 4RH4
- 3RH3
- 2RH2
- 1RH1
- 0RH0
1 field
| Field | Bits | What it does |
|---|---|---|
| RH | 7:0 |
CCP2CON
- Address
0x312- Reset
0x00- Access
- read/write
- 7EN
- 6–
- 5OUT
- 4FMT
- 3MODE3
- 2MODE2
- 1MODE1
- 0MODE0
4 fields
| Field | Bits | What it does |
|---|---|---|
| EN | 7 | |
| OUT | 5 | |
| FMT | 4 | |
| MODE | 3:0 |
CCP2CAP
- Address
0x313- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2CTS2
- 1CTS1
- 0CTS0
1 field
| Field | Bits | What it does |
|---|---|---|
| CTS | 2:0 |
CCP2PPS
- Address
0x1EA2- Reset
0x05- Access
- read/write
- 7–
- 6–
- 5CCP2PPS5
- 4CCP2PPS4
- 3CCP2PPS3
- 2CCP2PPS2
- 1CCP2PPS1
- 0CCP2PPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| CCP2PPS | 5:0 |
ECCP3 Enhanced capture/compare/PWM 3
PWM3DCL
- Address
0x314- Reset
x (not fixed at power-on)- Access
- read/write
- 7DC1
- 6DC0
- 5–
- 4–
- 3–
- 2–
- 1–
- 0–
1 field
| Field | Bits | What it does |
|---|---|---|
| DC | 7:6 |
PWM3DCH
- Address
0x315- Reset
x (not fixed at power-on)- Access
- read/write
- 7DC7
- 6DC6
- 5DC5
- 4DC4
- 3DC3
- 2DC2
- 1DC1
- 0DC0
1 field
| Field | Bits | What it does |
|---|---|---|
| DC | 7:0 |
PWM3CON
- Address
0x316- Reset
0x00- Access
- read/write
- 7EN
- 6–
- 5OUT
- 4POL
- 3–
- 2–
- 1–
- 0–
3 fields
| Field | Bits | What it does |
|---|---|---|
| EN | 7 | |
| OUT | 5 | |
| POL | 4 |
ECCP4 Enhanced capture/compare/PWM 4
PWM4DCL
- Address
0x318- Reset
x (not fixed at power-on)- Access
- read/write
- 7DC1
- 6DC0
- 5–
- 4–
- 3–
- 2–
- 1–
- 0–
1 field
| Field | Bits | What it does |
|---|---|---|
| DC | 7:6 |
PWM4DCH
- Address
0x319- Reset
x (not fixed at power-on)- Access
- read/write
- 7DC7
- 6DC6
- 5DC5
- 4DC4
- 3DC3
- 2DC2
- 1DC1
- 0DC0
1 field
| Field | Bits | What it does |
|---|---|---|
| DC | 7:0 |
PWM4CON
- Address
0x31A- Reset
0x00- Access
- read/write
- 7EN
- 6–
- 5OUT
- 4POL
- 3–
- 2–
- 1–
- 0–
3 fields
| Field | Bits | What it does |
|---|---|---|
| EN | 7 | |
| OUT | 5 | |
| POL | 4 |
ECCP5 Enhanced capture/compare/PWM 5
PWM5DCL
- Address
0x31C- Reset
x (not fixed at power-on)- Access
- read/write
- 7DC1
- 6DC0
- 5–
- 4–
- 3–
- 2–
- 1–
- 0–
1 field
| Field | Bits | What it does |
|---|---|---|
| DC | 7:6 |
PWM5DCH
- Address
0x31D- Reset
x (not fixed at power-on)- Access
- read/write
- 7DC7
- 6DC6
- 5DC5
- 4DC4
- 3DC3
- 2DC2
- 1DC1
- 0DC0
1 field
| Field | Bits | What it does |
|---|---|---|
| DC | 7:0 |
PWM5CON
- Address
0x31E- Reset
0x00- Access
- read/write
- 7EN
- 6–
- 5OUT
- 4POL
- 3–
- 2–
- 1–
- 0–
3 fields
| Field | Bits | What it does |
|---|---|---|
| EN | 7 | |
| OUT | 5 | |
| POL | 4 |
ECCP6 Enhanced capture/compare/PWM 6
PWM6DCL
- Address
0x38C- Reset
x (not fixed at power-on)- Access
- read/write
- 7DC1
- 6DC0
- 5–
- 4–
- 3–
- 2–
- 1–
- 0–
1 field
| Field | Bits | What it does |
|---|---|---|
| DC | 7:6 |
PWM6DCH
- Address
0x38D- Reset
x (not fixed at power-on)- Access
- read/write
- 7DC7
- 6DC6
- 5DC5
- 4DC4
- 3DC3
- 2DC2
- 1DC1
- 0DC0
1 field
| Field | Bits | What it does |
|---|---|---|
| DC | 7:0 |
PWM6CON
- Address
0x38E- Reset
0x00- Access
- read/write
- 7EN
- 6–
- 5OUT
- 4POL
- 3–
- 2–
- 1–
- 0–
3 fields
| Field | Bits | What it does |
|---|---|---|
| EN | 7 | |
| OUT | 5 | |
| POL | 4 |
NCO1 Numerically controlled oscillator 1
NCO1ACCL
- Address
0x58C- Reset
0x00- Access
- read/write
- 7NCO1ACC7
- 6NCO1ACC6
- 5NCO1ACC5
- 4NCO1ACC4
- 3NCO1ACC3
- 2NCO1ACC2
- 1NCO1ACC1
- 0NCO1ACC0
1 field
| Field | Bits | What it does |
|---|---|---|
| NCO1ACC | 7:0 |
NCO1ACCH
- Address
0x58D- Reset
0x00- Access
- read/write
- 7NCO1ACC7
- 6NCO1ACC6
- 5NCO1ACC5
- 4NCO1ACC4
- 3NCO1ACC3
- 2NCO1ACC2
- 1NCO1ACC1
- 0NCO1ACC0
1 field
| Field | Bits | What it does |
|---|---|---|
| NCO1ACC | 7:0 |
NCO1ACCU
- Address
0x58E- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3NCO1ACC3
- 2NCO1ACC2
- 1NCO1ACC1
- 0NCO1ACC0
1 field
| Field | Bits | What it does |
|---|---|---|
| NCO1ACC | 3:0 |
NCO1INCL
- Address
0x58F- Reset
0x01- Access
- read/write
- 7NCO1INC7
- 6NCO1INC6
- 5NCO1INC5
- 4NCO1INC4
- 3NCO1INC3
- 2NCO1INC2
- 1NCO1INC1
- 0NCO1INC0
1 field
| Field | Bits | What it does |
|---|---|---|
| NCO1INC | 7:0 |
NCO1INCH
- Address
0x590- Reset
0x00- Access
- read/write
- 7NCO1INC7
- 6NCO1INC6
- 5NCO1INC5
- 4NCO1INC4
- 3NCO1INC3
- 2NCO1INC2
- 1NCO1INC1
- 0NCO1INC0
1 field
| Field | Bits | What it does |
|---|---|---|
| NCO1INC | 7:0 |
NCO1INCU
- Address
0x591- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3NCO1INC3
- 2NCO1INC2
- 1NCO1INC1
- 0NCO1INC0
1 field
| Field | Bits | What it does |
|---|---|---|
| NCO1INC | 3:0 |
NCO1CONConfigurable logic cell control
- Address
0x592- Reset
0x00- Access
- read/write
- 7N1EN
- 6–
- 5N1OUT
- 4N1POL
- 3–
- 2–
- 1–
- 0N1PFM
4 fields
| Field | Bits | What it does |
|---|---|---|
| N1EN | 7 | |
| N1OUT | 5 | |
| N1POL | 4 | |
| N1PFM | 0 |
NCO1CLK
- Address
0x593- Reset
0x00- Access
- read/write
- 7N1PWS2
- 6N1PWS1
- 5N1PWS0
- 4–
- 3N1CKS3
- 2N1CKS2
- 1N1CKS1
- 0N1CKS0
2 fields
| Field | Bits | What it does |
|---|---|---|
| N1PWS | 7:5 | |
| N1CKS | 3:0 |
TMR0 Timer0
TMR0L
- Address
0x59C- Reset
0x00- Access
- read/write
- 7TMR0L7
- 6TMR0L6
- 5TMR0L5
- 4TMR0L4
- 3TMR0L3
- 2TMR0L2
- 1TMR0L1
- 0TMR0L0
1 field
| Field | Bits | What it does |
|---|---|---|
| TMR0L | 7:0 |
TMR0H
- Address
0x59D- Reset
0xFF- Access
- read/write
- 7TMR0H7
- 6TMR0H6
- 5TMR0H5
- 4TMR0H4
- 3TMR0H3
- 2TMR0H2
- 1TMR0H1
- 0TMR0H0
1 field
| Field | Bits | What it does |
|---|---|---|
| TMR0H | 7:0 |
T0CON0
- Address
0x59E- Reset
0x00- Access
- read/write
- 7T0EN
- 6–
- 5T0OUT
- 4T016BIT
- 3T0OUTPS3
- 2T0OUTPS2
- 1T0OUTPS1
- 0T0OUTPS0
4 fields
| Field | Bits | What it does |
|---|---|---|
| T0EN | 7 | |
| T0OUT | 5 | |
| T016BIT | 4 | |
| T0OUTPS | 3:0 |
T0CON1
- Address
0x59F- Reset
0x00- Access
- read/write
- 7T0CS2
- 6T0CS1
- 5T0CS0
- 4T0ASYNC
- 3T0CKPS3
- 2T0CKPS2
- 1T0CKPS1
- 0T0CKPS0
3 fields
| Field | Bits | What it does |
|---|---|---|
| T0CS | 7:5 | |
| T0ASYNC | 4 | |
| T0CKPS | 3:0 |
CWG1 Complementary waveform generator 1
CWG1CLKCON
- Address
0x60C- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2–
- 1–
- 0CS
1 field
| Field | Bits | What it does |
|---|---|---|
| CS | 0 |
CWG1DAT
- Address
0x60D- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3DAT3
- 2DAT2
- 1DAT1
- 0DAT0
1 field
| Field | Bits | What it does |
|---|---|---|
| DAT | 3:0 |
CWG1DBR
- Address
0x60E- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5DBR5
- 4DBR4
- 3DBR3
- 2DBR2
- 1DBR1
- 0DBR0
1 field
| Field | Bits | What it does |
|---|---|---|
| DBR | 5:0 |
CWG1DBF
- Address
0x60F- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5DBF5
- 4DBF4
- 3DBF3
- 2DBF2
- 1DBF1
- 0DBF0
1 field
| Field | Bits | What it does |
|---|---|---|
| DBF | 5:0 |
CWG1CON0
- Address
0x610- Reset
0x00- Access
- read/write
- 7EN
- 6LD
- 5–
- 4–
- 3–
- 2MODE2
- 1MODE1
- 0MODE0
3 fields
| Field | Bits | What it does |
|---|---|---|
| EN | 7 | |
| LD | 6 | |
| MODE | 2:0 |
CWG1CON1
- Address
0x611- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5IN
- 4–
- 3POLD
- 2POLC
- 1POLB
- 0POLA
5 fields
| Field | Bits | What it does |
|---|---|---|
| IN | 5 | |
| POLD | 3 | |
| POLC | 2 | |
| POLB | 1 | |
| POLA | 0 |
CWG1AS0
- Address
0x612- Reset
0x14- Access
- read/write
- 7SHUTDOWN
- 6REN
- 5LSBD1
- 4LSBD0
- 3LSAC1
- 2LSAC0
- 1–
- 0–
4 fields
| Field | Bits | What it does |
|---|---|---|
| SHUTDOWN | 7 | |
| REN | 6 | |
| LSBD | 5:4 | |
| LSAC | 3:2 |
CWG1AS1
- Address
0x613- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4AS4E
- 3AS3E
- 2AS2E
- 1AS1E
- 0AS0E
5 fields
| Field | Bits | What it does |
|---|---|---|
| AS4E | 4 | |
| AS3E | 3 | |
| AS2E | 2 | |
| AS1E | 1 | |
| AS0E | 0 |
CWG1STR
- Address
0x614- Reset
0x00- Access
- read/write
- 7OVRD
- 6OVRC
- 5OVRB
- 4OVRA
- 3STRD
- 2STRC
- 1STRB
- 0STRA
8 fields
| Field | Bits | What it does |
|---|---|---|
| OVRD | 7 | |
| OVRC | 6 | |
| OVRB | 5 | |
| OVRA | 4 | |
| STRD | 3 | |
| STRC | 2 | |
| STRB | 1 | |
| STRA | 0 |
PMD Peripheral module disable
PMD0
- Address
0x796- Reset
0x00- Access
- read/write
- 7SYSCMD
- 6FVRMD
- 5–
- 4–
- 3–
- 2NVMMD
- 1CLKRMD
- 0IOCMD
5 fields
| Field | Bits | What it does |
|---|---|---|
| SYSCMD | 7 | |
| FVRMD | 6 | |
| NVMMD | 2 | |
| CLKRMD | 1 | |
| IOCMD | 0 |
PMD1
- Address
0x797- Reset
0x00- Access
- read/write
- 7DDS1MD
- 6–
- 5–
- 4–
- 3–
- 2TMR2MD
- 1TMR1MD
- 0TMR0MD
4 fields
| Field | Bits | What it does |
|---|---|---|
| DDS1MD | 7 | |
| TMR2MD | 2 | |
| TMR1MD | 1 | |
| TMR0MD | 0 |
PMD2
- Address
0x798- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6DAC1MD
- 5ADCMD
- 4–
- 3–
- 2–
- 1CMP1MD
- 0ZCDMD
4 fields
| Field | Bits | What it does |
|---|---|---|
| DAC1MD | 6 | |
| ADCMD | 5 | |
| CMP1MD | 1 | |
| ZCDMD | 0 |
PMD3
- Address
0x799- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5PWM6MD
- 4PWM5MD
- 3PWM4MD
- 2PWM3MD
- 1CCP2MD
- 0CCP1MD
6 fields
| Field | Bits | What it does |
|---|---|---|
| PWM6MD | 5 | |
| PWM5MD | 4 | |
| PWM4MD | 3 | |
| PWM3MD | 2 | |
| CCP2MD | 1 | |
| CCP1MD | 0 |
PMD4
- Address
0x79A- Reset
0x00- Access
- read/write
- 7–
- 6UART1MD
- 5–
- 4MSSP1MD
- 3–
- 2–
- 1–
- 0CWG1MD
3 fields
| Field | Bits | What it does |
|---|---|---|
| UART1MD | 6 | |
| MSSP1MD | 4 | |
| CWG1MD | 0 |
PMD5
- Address
0x79B- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4CLC4MD
- 3CLC3MD
- 2CLC2MD
- 1CLC1MD
- 0–
4 fields
| Field | Bits | What it does |
|---|---|---|
| CLC4MD | 4 | |
| CLC3MD | 3 | |
| CLC2MD | 2 | |
| CLC1MD | 1 |
OSCILLATOR Oscillator, power control and watchdog
WDTCON0
- Address
0x80C- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5WDTPS4
- 4WDTPS3
- 3WDTPS2
- 2WDTPS1
- 1WDTPS0
- 0SEN
2 fields
| Field | Bits | What it does |
|---|---|---|
| WDTPS | 5:1 | |
| SEN | 0 |
WDTCON1
- Address
0x80D- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6WDTCS2
- 5WDTCS1
- 4WDTCS0
- 3–
- 2WINDOW2
- 1WINDOW1
- 0WINDOW0
2 fields
| Field | Bits | What it does |
|---|---|---|
| WDTCS | 6:4 | |
| WINDOW | 2:0 |
BORCON
- Address
0x811- Reset
x (not fixed at power-on)- Access
- read/write
- 7SBOREN
- 6–
- 5–
- 4–
- 3–
- 2–
- 1–
- 0BORRDY
2 fields
| Field | Bits | What it does |
|---|---|---|
| SBOREN | 7 | Software Brown out Reset Enable bit |
| BORRDY | 0 | Bown out reset circuit ready status bit |
VREGCON
- Address
0x812- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2–
- 1VREGPM
- 0–
1 field
| Field | Bits | What it does |
|---|---|---|
| VREGPM | 1 |
PCON0
- Address
0x813- Reset
x (not fixed at power-on)- Access
- read/write
- 7STKOVF
- 6STKUNF
- 5nWDTWV
- 4nRWDT
- 3nRMCLR
- 2nRI
- 1nPOR
- 0nBOR
8 fields
| Field | Bits | What it does |
|---|---|---|
| STKOVF | 7 | |
| STKUNF | 6 | |
| nWDTWV | 5 | |
| nRWDT | 4 | |
| nRMCLR | 3 | |
| nRI | 2 | |
| nPOR | 1 | |
| nBOR | 0 |
PCON1
- Address
0x814- Reset
0x02- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2–
- 1nMEMV
- 0–
1 field
| Field | Bits | What it does |
|---|---|---|
| nMEMV | 1 |
CPUDOZE
- Address
0x88C- Reset
0x00- Access
- read/write
- 7IDLEN
- 6DOZEN
- 5ROI
- 4DOE
- 3–
- 2DOZE2
- 1DOZE1
- 0DOZE0
5 fields
| Field | Bits | What it does |
|---|---|---|
| IDLEN | 7 | |
| DOZEN | 6 | |
| ROI | 5 | |
| DOE | 4 | |
| DOZE | 2:0 |
OSCCON1
- Address
0x88D- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6NOSC2
- 5NOSC1
- 4NOSC0
- 3NDIV3
- 2NDIV2
- 1NDIV1
- 0NDIV0
2 fields
| Field | Bits | What it does |
|---|---|---|
| NOSC | 6:4 | |
| NDIV | 3:0 |
OSCCON2
- Address
0x88E- Reset
x (not fixed at power-on)- Access
- read only
- 7–
- 6COSC2
- 5COSC1
- 4COSC0
- 3CDIV3
- 2CDIV2
- 1CDIV1
- 0CDIV0
2 fields
| Field | Bits | What it does |
|---|---|---|
| COSC | 6:4 | |
| CDIV | 3:0 |
OSCCON3
- Address
0x88F- Reset
0x00- Access
- read/write
- 7CSWHOLD
- 6–
- 5–
- 4ORDY
- 3NOSCR
- 2–
- 1–
- 0–
3 fields
| Field | Bits | What it does |
|---|---|---|
| CSWHOLD | 7 | |
| ORDY | 4 | |
| NOSCR | 3 |
OSCSTAT
- Address
0x890- Reset
x (not fixed at power-on)- Access
- read only
- 7EXTOR
- 6HFOR
- 5MFOR
- 4LFOR
- 3–
- 2ADOR
- 1–
- 0PLLR
6 fields
| Field | Bits | What it does |
|---|---|---|
| EXTOR | 7 | |
| HFOR | 6 | |
| MFOR | 5 | |
| LFOR | 4 | |
| ADOR | 2 | |
| PLLR | 0 |
OSCEN
- Address
0x891- Reset
0x00- Access
- read/write
- 7EXTOEN
- 6HFOEN
- 5MFOEN
- 4LFOEN
- 3–
- 2ADOEN
- 1–
- 0–
5 fields
| Field | Bits | What it does |
|---|---|---|
| EXTOEN | 7 | |
| HFOEN | 6 | |
| MFOEN | 5 | |
| LFOEN | 4 | |
| ADOEN | 2 |
OSCTUNE
- Address
0x892- Reset
0x20- Access
- read/write
- 7–
- 6–
- 5HFTUN5
- 4HFTUN4
- 3HFTUN3
- 2HFTUN2
- 1HFTUN1
- 0HFTUN0
1 field
| Field | Bits | What it does |
|---|---|---|
| HFTUN | 5:0 |
OSCFRQ
- Address
0x893- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2HFFRQ2
- 1HFFRQ1
- 0HFFRQ0
1 field
| Field | Bits | What it does |
|---|---|---|
| HFFRQ | 2:0 |
CLKRCON
- Address
0x895- Reset
x (not fixed at power-on)- Access
- read/write
- 7CLKREN
- 6–
- 5–
- 4CLKRDC1
- 3CLKRDC0
- 2CLKRDIV2
- 1CLKRDIV1
- 0CLKRDIV0
3 fields
| Field | Bits | What it does |
|---|---|---|
| CLKREN | 7 | |
| CLKRDC | 4:3 | |
| CLKRDIV | 2:0 |
CLKRCLK
- Address
0x896- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3CLKRCLK3
- 2CLKRCLK2
- 1CLKRCLK1
- 0CLKRCLK0
1 field
| Field | Bits | What it does |
|---|---|---|
| CLKRCLK | 3:0 |
WDT Watchdog timer
WDTPSL
- Address
0x80E- Reset
0x00- Access
- read only
- 7PSCNT7
- 6PSCNT6
- 5PSCNT5
- 4PSCNT4
- 3PSCNT3
- 2PSCNT2
- 1PSCNT1
- 0PSCNT0
1 field
| Field | Bits | What it does |
|---|---|---|
| PSCNT | 7:0 |
WDTPSH
- Address
0x80F- Reset
0x00- Access
- read only
- 7PSCNT7
- 6PSCNT6
- 5PSCNT5
- 4PSCNT4
- 3PSCNT3
- 2PSCNT2
- 1PSCNT1
- 0PSCNT0
1 field
| Field | Bits | What it does |
|---|---|---|
| PSCNT | 7:0 |
WDTTMR
- Address
0x810- Reset
x (not fixed at power-on)- Access
- read only
- 7–
- 6WDTTMR3
- 5WDTTMR2
- 4WDTTMR1
- 3WDTTMR0
- 2STATE
- 1PSCNT17
- 0PSCNT16
4 fields
| Field | Bits | What it does |
|---|---|---|
| WDTTMR | 6:3 | |
| STATE | 2 | |
| PSCNT17 | 1 | |
| PSCNT16 | 0 |
NVM Data EEPROM and flash program memory
NVMADRL
- Address
0x81A- Reset
x (not fixed at power-on)- Access
- read/write
- 7NVMADRL7
- 6NVMADRL6
- 5NVMADRL5
- 4NVMADRL4
- 3NVMADRL3
- 2NVMADRL2
- 1NVMADRL1
- 0NVMADRL0
8 fields
| Field | Bits | What it does |
|---|---|---|
| NVMADRL7 | 7 | |
| NVMADRL6 | 6 | |
| NVMADRL5 | 5 | |
| NVMADRL4 | 4 | |
| NVMADRL3 | 3 | |
| NVMADRL2 | 2 | |
| NVMADRL1 | 1 | |
| NVMADRL0 | 0 |
NVMADRH
- Address
0x81B- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6NVMADRH6
- 5NVMADRH5
- 4NVMADRH4
- 3NVMADRH3
- 2NVMADRH2
- 1NVMADRH1
- 0NVMADRH0
7 fields
| Field | Bits | What it does |
|---|---|---|
| NVMADRH6 | 6 | |
| NVMADRH5 | 5 | |
| NVMADRH4 | 4 | |
| NVMADRH3 | 3 | |
| NVMADRH2 | 2 | |
| NVMADRH1 | 1 | |
| NVMADRH0 | 0 |
NVMDATL
- Address
0x81C- Reset
x (not fixed at power-on)- Access
- read/write
- 7NVMDATL7
- 6NVMDATL6
- 5NVMDATL5
- 4NVMDATL4
- 3NVMDATL3
- 2NVMDATL2
- 1NVMDATL1
- 0NVMDATL0
8 fields
| Field | Bits | What it does |
|---|---|---|
| NVMDATL7 | 7 | |
| NVMDATL6 | 6 | |
| NVMDATL5 | 5 | |
| NVMDATL4 | 4 | |
| NVMDATL3 | 3 | |
| NVMDATL2 | 2 | |
| NVMDATL1 | 1 | |
| NVMDATL0 | 0 |
NVMDATH
- Address
0x81D- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5NVMDATH5
- 4NVMDATH4
- 3NVMDATH3
- 2NVMDATH2
- 1NVMDATH1
- 0NVMDATH0
6 fields
| Field | Bits | What it does |
|---|---|---|
| NVMDATH5 | 5 | |
| NVMDATH4 | 4 | |
| NVMDATH3 | 3 | |
| NVMDATH2 | 2 | |
| NVMDATH1 | 1 | |
| NVMDATH0 | 0 |
NVMCON1
- Address
0x81E- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6NVMREGS
- 5LWLO
- 4FREE
- 3WRERR
- 2WREN
- 1WR
- 0RD
7 fields
| Field | Bits | What it does |
|---|---|---|
| NVMREGS | 6 | |
| LWLO | 5 | |
| FREE | 4 | |
| WRERR | 3 | |
| WREN | 2 | |
| WR | 1 | Write Control bit |
| RD | 0 | Read control bit |
NVMCON2
- Address
0x81F- Reset
x (not fixed at power-on)- Access
- read/write
- 7NVMCON27
- 6NVMCON26
- 5NVMCON25
- 4NVMCON24
- 3NVMCON23
- 2NVMCON22
- 1NVMCON21
- 0NVMCON20
1 field
| Field | Bits | What it does |
|---|---|---|
| NVMCON2 | 7:0 |
FVR Fixed voltage reference
FVRCON
- Address
0x90C- Reset
x (not fixed at power-on)- Access
- read/write
- 7FVREN
- 6FVRRDY
- 5TSEN
- 4TSRNG
- 3CDAFVR1
- 2CDAFVR0
- 1ADFVR1
- 0ADFVR0
6 fields
| Field | Bits | What it does |
|---|---|---|
| FVREN | 7 | Fixed voltage Reference Enable |
| FVRRDY | 6 | |
| TSEN | 5 | Temperature sensor enable |
| TSRNG | 4 | Temperature sensor range select |
| CDAFVR | 3:2 | |
| ADFVR | 1:0 |
DAC1 Digital-to-analog converter 1
DAC1CON0
- Address
0x90E- Reset
0x00- Access
- read/write
- 7EN
- 6–
- 5OE1
- 4OE2
- 3PSS1
- 2PSS0
- 1–
- 0NSS
5 fields
| Field | Bits | What it does |
|---|---|---|
| EN | 7 | |
| OE1 | 5 | |
| OE2 | 4 | |
| PSS | 3:2 | |
| NSS | 0 |
DAC1CON1
- Address
0x90F- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5–
- 4DAC1R4
- 3DAC1R3
- 2DAC1R2
- 1DAC1R1
- 0DAC1R0
1 field
| Field | Bits | What it does |
|---|---|---|
| DAC1R | 4:0 |
ZCD Zero-cross detector
ZCDCON
- Address
0x91F- Reset
x (not fixed at power-on)- Access
- read/write
- 7ZCDSEN
- 6–
- 5ZCDOUT
- 4ZCDPOL
- 3–
- 2–
- 1ZCDINTP
- 0ZCDINTN
5 fields
| Field | Bits | What it does |
|---|---|---|
| ZCDSEN | 7 | |
| ZCDOUT | 5 | |
| ZCDPOL | 4 | |
| ZCDINTP | 1 | |
| ZCDINTN | 0 |
COMPARATOR Comparators and voltage reference
CMOUT
- Address
0x98F- Reset
0x00- Access
- read only
- 7–
- 6–
- 5–
- 4–
- 3–
- 2–
- 1MC2OUT
- 0MC1OUT
2 fields
| Field | Bits | What it does |
|---|---|---|
| MC2OUT | 1 | |
| MC1OUT | 0 |
CM1CON0COMPARATOR CONTROL REGISTER 0
- Address
0x990- Reset
0x00- Access
- read/write
- 7EN
- 6OUT
- 5–
- 4POL
- 3–
- 2–
- 1HYS
- 0SYNC
5 fields
| Field | Bits | What it does |
|---|---|---|
| EN | 7 | Comparator Enable bit |
| OUT | 6 | Comparator Output bit |
| POL | 4 | Comparator Output Polarity Select bit |
| HYS | 1 | Comparator Hysteresis Enable bit |
| SYNC | 0 | Comparator Output Synchronous Mode bit |
CM1CON1COMPARATOR CONTROL REGISTER 1
- Address
0x991- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2–
- 1INTP
- 0INTN
2 fields
| Field | Bits | What it does |
|---|---|---|
| INTP | 1 | Comparator Interrupt on Positive going edge Enable bits |
| INTN | 0 | Comparator Interrupt on Negative going edge Enable bits |
CM1NCHCOMPARATOR INVERTING CHANNEL SELECT REGISTER
- Address
0x992- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2NCH2
- 1NCH1
- 0NCH0
1 field
| Field | Bits | What it does |
|---|---|---|
| NCH | 2:0 | Comparator Inverting Input Channel Select bits |
CM1PCHCOMPARATOR NON-INVERTING CHANNEL SELECT REGISTER
- Address
0x993- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2PCH2
- 1PCH1
- 0PCH0
1 field
| Field | Bits | What it does |
|---|---|---|
| PCH | 2:0 | Comparator Non-Inverting Input Channel Select bits |
CLC Configurable logic cell
CLCDATA
- Address
0x1E0F- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3MLC4OUT
- 2MLC3OUT
- 1MLC2OUT
- 0MLC1OUT
4 fields
| Field | Bits | What it does |
|---|---|---|
| MLC4OUT | 3 | |
| MLC3OUT | 2 | |
| MLC2OUT | 1 | |
| MLC1OUT | 0 |
CLC1CONConfigurable logic cell control
- Address
0x1E10- Reset
0x00- Access
- read/write
- 7LC1EN
- 6–
- 5LC1OUT
- 4LC1INTP
- 3LC1INTN
- 2LC1MODE2
- 1LC1MODE1
- 0LC1MODE0
5 fields
| Field | Bits | What it does |
|---|---|---|
| LC1EN | 7 | |
| LC1OUT | 5 | |
| LC1INTP | 4 | |
| LC1INTN | 3 | |
| LC1MODE | 2:0 |
CLC1POLPolarity control
- Address
0x1E11- Reset
x (not fixed at power-on)- Access
- read/write
- 7LC1POL
- 6–
- 5–
- 4–
- 3LC1G4POL
- 2LC1G3POL
- 1LC1G2POL
- 0LC1G1POL
5 fields
| Field | Bits | What it does |
|---|---|---|
| LC1POL | 7 | |
| LC1G4POL | 3 | |
| LC1G3POL | 2 | |
| LC1G2POL | 1 | |
| LC1G1POL | 0 |
CLC1SEL0Input select register 1
- Address
0x1E12- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5LC1D1S5
- 4LC1D1S4
- 3LC1D1S3
- 2LC1D1S2
- 1LC1D1S1
- 0LC1D1S0
1 field
| Field | Bits | What it does |
|---|---|---|
| LC1D1S | 5:0 |
CLC1SEL1Input select register 1
- Address
0x1E13- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5LC1D2S5
- 4LC1D2S4
- 3LC1D2S3
- 2LC1D2S2
- 1LC1D2S1
- 0LC1D2S0
1 field
| Field | Bits | What it does |
|---|---|---|
| LC1D2S | 5:0 |
CLC1SEL2Input select register 2
- Address
0x1E14- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5LC1D3S5
- 4LC1D3S4
- 3LC1D3S3
- 2LC1D3S2
- 1LC1D3S1
- 0LC1D3S0
1 field
| Field | Bits | What it does |
|---|---|---|
| LC1D3S | 5:0 |
CLC1SEL3Input select register 3
- Address
0x1E15- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5LC1D4S5
- 4LC1D4S4
- 3LC1D4S3
- 2LC1D4S2
- 1LC1D4S1
- 0LC1D4S0
1 field
| Field | Bits | What it does |
|---|---|---|
| LC1D4S | 5:0 |
CLC1GLS0Gate logic select register 0
- Address
0x1E16- Reset
x (not fixed at power-on)- Access
- read/write
- 7LC1G1D4T
- 6LC1G1D4N
- 5LC1G1D3T
- 4LC1G1D3N
- 3LC1G1D2T
- 2LC1G1D2N
- 1LC1G1D1T
- 0LC1G1D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| LC1G1D4T | 7 | |
| LC1G1D4N | 6 | |
| LC1G1D3T | 5 | |
| LC1G1D3N | 4 | |
| LC1G1D2T | 3 | |
| LC1G1D2N | 2 | |
| LC1G1D1T | 1 | |
| LC1G1D1N | 0 |
CLC1GLS1Gate logic select register 1
- Address
0x1E17- Reset
x (not fixed at power-on)- Access
- read/write
- 7LC1G2D4T
- 6LC1G2D4N
- 5LC1G2D3T
- 4LC1G2D3N
- 3LC1G2D2T
- 2LC1G2D2N
- 1LC1G2D1T
- 0LC1G2D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| LC1G2D4T | 7 | |
| LC1G2D4N | 6 | |
| LC1G2D3T | 5 | |
| LC1G2D3N | 4 | |
| LC1G2D2T | 3 | |
| LC1G2D2N | 2 | |
| LC1G2D1T | 1 | |
| LC1G2D1N | 0 |
CLC1GLS2Gate logic select register 2
- Address
0x1E18- Reset
x (not fixed at power-on)- Access
- read/write
- 7LC1G3D4T
- 6LC1G3D4N
- 5LC1G3D3T
- 4LC1G3D3N
- 3LC1G3D2T
- 2LC1G3D2N
- 1LC1G3D1T
- 0LC1G3D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| LC1G3D4T | 7 | |
| LC1G3D4N | 6 | |
| LC1G3D3T | 5 | |
| LC1G3D3N | 4 | |
| LC1G3D2T | 3 | |
| LC1G3D2N | 2 | |
| LC1G3D1T | 1 | |
| LC1G3D1N | 0 |
CLC1GLS3Gate logic select register 3
- Address
0x1E19- Reset
x (not fixed at power-on)- Access
- read/write
- 7LC1G4D4T
- 6LC1G4D4N
- 5LC1G4D3T
- 4LC1G4D3N
- 3LC1G4D2T
- 2LC1G4D2N
- 1LC1G4D1T
- 0LC1G4D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| LC1G4D4T | 7 | |
| LC1G4D4N | 6 | |
| LC1G4D3T | 5 | |
| LC1G4D3N | 4 | |
| LC1G4D2T | 3 | |
| LC1G4D2N | 2 | |
| LC1G4D1T | 1 | |
| LC1G4D1N | 0 |
CLC2CONConfigurable logic cell control
- Address
0x1E1A- Reset
0x00- Access
- read/write
- 7LC2EN
- 6–
- 5LC2OUT
- 4LC2INTP
- 3LC2INTN
- 2LC2MODE2
- 1LC2MODE1
- 0LC2MODE0
5 fields
| Field | Bits | What it does |
|---|---|---|
| LC2EN | 7 | |
| LC2OUT | 5 | |
| LC2INTP | 4 | |
| LC2INTN | 3 | |
| LC2MODE | 2:0 |
CLC2POLPolarity control
- Address
0x1E1B- Reset
x (not fixed at power-on)- Access
- read/write
- 7LC2POL
- 6–
- 5–
- 4–
- 3LC2G4POL
- 2LC2G3POL
- 1LC2G2POL
- 0LC2G1POL
5 fields
| Field | Bits | What it does |
|---|---|---|
| LC2POL | 7 | |
| LC2G4POL | 3 | |
| LC2G3POL | 2 | |
| LC2G2POL | 1 | |
| LC2G1POL | 0 |
CLC2SEL0Input select register 1
- Address
0x1E1C- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5LC2D1S5
- 4LC2D1S4
- 3LC2D1S3
- 2LC2D1S2
- 1LC2D1S1
- 0LC2D1S0
1 field
| Field | Bits | What it does |
|---|---|---|
| LC2D1S | 5:0 |
CLC2SEL1Input select register 1
- Address
0x1E1D- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5LC2D2S5
- 4LC2D2S4
- 3LC2D2S3
- 2LC2D2S2
- 1LC2D2S1
- 0LC2D2S0
1 field
| Field | Bits | What it does |
|---|---|---|
| LC2D2S | 5:0 |
CLC2SEL2Input select register 2
- Address
0x1E1E- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5LC2D3S5
- 4LC2D3S4
- 3LC2D3S3
- 2LC2D3S2
- 1LC2D3S1
- 0LC2D3S0
1 field
| Field | Bits | What it does |
|---|---|---|
| LC2D3S | 5:0 |
CLC2SEL3Input select register 3
- Address
0x1E1F- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5LC2D4S5
- 4LC2D4S4
- 3LC2D4S3
- 2LC2D4S2
- 1LC2D4S1
- 0LC2D4S0
1 field
| Field | Bits | What it does |
|---|---|---|
| LC2D4S | 5:0 |
CLC2GLS0Gate logic select register 0
- Address
0x1E20- Reset
x (not fixed at power-on)- Access
- read/write
- 7LC2G1D4T
- 6LC2G1D4N
- 5LC2G1D3T
- 4LC2G1D3N
- 3LC2G1D2T
- 2LC2G1D2N
- 1LC2G1D1T
- 0LC2G1D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| LC2G1D4T | 7 | |
| LC2G1D4N | 6 | |
| LC2G1D3T | 5 | |
| LC2G1D3N | 4 | |
| LC2G1D2T | 3 | |
| LC2G1D2N | 2 | |
| LC2G1D1T | 1 | |
| LC2G1D1N | 0 |
CLC2GLS1Gate logic select register 1
- Address
0x1E21- Reset
x (not fixed at power-on)- Access
- read/write
- 7LC2G2D4T
- 6LC2G2D4N
- 5LC2G2D3T
- 4LC2G2D3N
- 3LC2G2D2T
- 2LC2G2D2N
- 1LC2G2D1T
- 0LC2G2D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| LC2G2D4T | 7 | |
| LC2G2D4N | 6 | |
| LC2G2D3T | 5 | |
| LC2G2D3N | 4 | |
| LC2G2D2T | 3 | |
| LC2G2D2N | 2 | |
| LC2G2D1T | 1 | |
| LC2G2D1N | 0 |
CLC2GLS2Gate logic select register 2
- Address
0x1E22- Reset
x (not fixed at power-on)- Access
- read/write
- 7LC2G3D4T
- 6LC2G3D4N
- 5LC2G3D3T
- 4LC2G3D3N
- 3LC2G3D2T
- 2LC2G3D2N
- 1LC2G3D1T
- 0LC2G3D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| LC2G3D4T | 7 | |
| LC2G3D4N | 6 | |
| LC2G3D3T | 5 | |
| LC2G3D3N | 4 | |
| LC2G3D2T | 3 | |
| LC2G3D2N | 2 | |
| LC2G3D1T | 1 | |
| LC2G3D1N | 0 |
CLC2GLS3Gate logic select register 3
- Address
0x1E23- Reset
x (not fixed at power-on)- Access
- read/write
- 7LC2G4D4T
- 6LC2G4D4N
- 5LC2G4D3T
- 4LC2G4D3N
- 3LC2G4D2T
- 2LC2G4D2N
- 1LC2G4D1T
- 0LC2G4D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| LC2G4D4T | 7 | |
| LC2G4D4N | 6 | |
| LC2G4D3T | 5 | |
| LC2G4D3N | 4 | |
| LC2G4D2T | 3 | |
| LC2G4D2N | 2 | |
| LC2G4D1T | 1 | |
| LC2G4D1N | 0 |
CLC3CONConfigurable logic cell control
- Address
0x1E24- Reset
0x00- Access
- read/write
- 7LC3EN
- 6–
- 5LC3OUT
- 4LC3INTP
- 3LC3INTN
- 2LC3MODE2
- 1LC3MODE1
- 0LC3MODE0
5 fields
| Field | Bits | What it does |
|---|---|---|
| LC3EN | 7 | |
| LC3OUT | 5 | |
| LC3INTP | 4 | |
| LC3INTN | 3 | |
| LC3MODE | 2:0 |
CLC3POLPolarity control
- Address
0x1E25- Reset
x (not fixed at power-on)- Access
- read/write
- 7LC3POL
- 6–
- 5–
- 4–
- 3LC3G4POL
- 2LC3G3POL
- 1LC3G2POL
- 0LC3G1POL
5 fields
| Field | Bits | What it does |
|---|---|---|
| LC3POL | 7 | |
| LC3G4POL | 3 | |
| LC3G3POL | 2 | |
| LC3G2POL | 1 | |
| LC3G1POL | 0 |
CLC3SEL0Input select register 1
- Address
0x1E26- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5LC3D1S5
- 4LC3D1S4
- 3LC3D1S3
- 2LC3D1S2
- 1LC3D1S1
- 0LC3D1S0
1 field
| Field | Bits | What it does |
|---|---|---|
| LC3D1S | 5:0 |
CLC3SEL1Input select register 1
- Address
0x1E27- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5LC3D2S5
- 4LC3D2S4
- 3LC3D2S3
- 2LC3D2S2
- 1LC3D2S1
- 0LC3D2S0
1 field
| Field | Bits | What it does |
|---|---|---|
| LC3D2S | 5:0 |
CLC3SEL2Input select register 2
- Address
0x1E28- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5LC3D3S5
- 4LC3D3S4
- 3LC3D3S3
- 2LC3D3S2
- 1LC3D3S1
- 0LC3D3S0
1 field
| Field | Bits | What it does |
|---|---|---|
| LC3D3S | 5:0 |
CLC3SEL3Input select register 3
- Address
0x1E29- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5LC3D4S5
- 4LC3D4S4
- 3LC3D4S3
- 2LC3D4S2
- 1LC3D4S1
- 0LC3D4S0
1 field
| Field | Bits | What it does |
|---|---|---|
| LC3D4S | 5:0 |
CLC3GLS0Gate logic select register 0
- Address
0x1E2A- Reset
x (not fixed at power-on)- Access
- read/write
- 7LC3G1D4T
- 6LC3G1D4N
- 5LC3G1D3T
- 4LC3G1D3N
- 3LC3G1D2T
- 2LC3G1D2N
- 1LC3G1D1T
- 0LC3G1D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| LC3G1D4T | 7 | |
| LC3G1D4N | 6 | |
| LC3G1D3T | 5 | |
| LC3G1D3N | 4 | |
| LC3G1D2T | 3 | |
| LC3G1D2N | 2 | |
| LC3G1D1T | 1 | |
| LC3G1D1N | 0 |
CLC3GLS1Gate logic select register 1
- Address
0x1E2B- Reset
x (not fixed at power-on)- Access
- read/write
- 7LC3G2D4T
- 6LC3G2D4N
- 5LC3G2D3T
- 4LC3G2D3N
- 3LC3G2D2T
- 2LC3G2D2N
- 1LC3G2D1T
- 0LC3G2D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| LC3G2D4T | 7 | |
| LC3G2D4N | 6 | |
| LC3G2D3T | 5 | |
| LC3G2D3N | 4 | |
| LC3G2D2T | 3 | |
| LC3G2D2N | 2 | |
| LC3G2D1T | 1 | |
| LC3G2D1N | 0 |
CLC3GLS2Gate logic select register 2
- Address
0x1E2C- Reset
x (not fixed at power-on)- Access
- read/write
- 7LC3G3D4T
- 6LC3G3D4N
- 5LC3G3D3T
- 4LC3G3D3N
- 3LC3G3D2T
- 2LC3G3D2N
- 1LC3G3D1T
- 0LC3G3D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| LC3G3D4T | 7 | |
| LC3G3D4N | 6 | |
| LC3G3D3T | 5 | |
| LC3G3D3N | 4 | |
| LC3G3D2T | 3 | |
| LC3G3D2N | 2 | |
| LC3G3D1T | 1 | |
| LC3G3D1N | 0 |
CLC3GLS3Gate logic select register 3
- Address
0x1E2D- Reset
x (not fixed at power-on)- Access
- read/write
- 7LC3G4D4T
- 6LC3G4D4N
- 5LC3G4D3T
- 4LC3G4D3N
- 3LC3G4D2T
- 2LC3G4D2N
- 1LC3G4D1T
- 0LC3G4D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| LC3G4D4T | 7 | |
| LC3G4D4N | 6 | |
| LC3G4D3T | 5 | |
| LC3G4D3N | 4 | |
| LC3G4D2T | 3 | |
| LC3G4D2N | 2 | |
| LC3G4D1T | 1 | |
| LC3G4D1N | 0 |
CLC4CONConfigurable logic cell control
- Address
0x1E2E- Reset
0x00- Access
- read/write
- 7LC4EN
- 6–
- 5LC4OUT
- 4LC4INTP
- 3LC4INTN
- 2LC4MODE2
- 1LC4MODE1
- 0LC4MODE0
5 fields
| Field | Bits | What it does |
|---|---|---|
| LC4EN | 7 | |
| LC4OUT | 5 | |
| LC4INTP | 4 | |
| LC4INTN | 3 | |
| LC4MODE | 2:0 |
CLC4POLPolarity control
- Address
0x1E2F- Reset
x (not fixed at power-on)- Access
- read/write
- 7LC4POL
- 6–
- 5–
- 4–
- 3LC4G4POL
- 2LC4G3POL
- 1LC4G2POL
- 0LC4G1POL
5 fields
| Field | Bits | What it does |
|---|---|---|
| LC4POL | 7 | |
| LC4G4POL | 3 | |
| LC4G3POL | 2 | |
| LC4G2POL | 1 | |
| LC4G1POL | 0 |
CLC4SEL0Input select register 1
- Address
0x1E30- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5LC4D1S5
- 4LC4D1S4
- 3LC4D1S3
- 2LC4D1S2
- 1LC4D1S1
- 0LC4D1S0
1 field
| Field | Bits | What it does |
|---|---|---|
| LC4D1S | 5:0 |
CLC4SEL1Input select register 1
- Address
0x1E31- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5LC4D2S5
- 4LC4D2S4
- 3LC4D2S3
- 2LC4D2S2
- 1LC4D2S1
- 0LC4D2S0
1 field
| Field | Bits | What it does |
|---|---|---|
| LC4D2S | 5:0 |
CLC4SEL2Input select register 2
- Address
0x1E32- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5LC4D3S5
- 4LC4D3S4
- 3LC4D3S3
- 2LC4D3S2
- 1LC4D3S1
- 0LC4D3S0
1 field
| Field | Bits | What it does |
|---|---|---|
| LC4D3S | 5:0 |
CLC4SEL3Input select register 3
- Address
0x1E33- Reset
x (not fixed at power-on)- Access
- read/write
- 7–
- 6–
- 5LC4D4S5
- 4LC4D4S4
- 3LC4D4S3
- 2LC4D4S2
- 1LC4D4S1
- 0LC4D4S0
1 field
| Field | Bits | What it does |
|---|---|---|
| LC4D4S | 5:0 |
CLC4GLS0Gate logic select register 0
- Address
0x1E34- Reset
x (not fixed at power-on)- Access
- read/write
- 7LC4G1D4T
- 6LC4G1D4N
- 5LC4G1D3T
- 4LC4G1D3N
- 3LC4G1D2T
- 2LC4G1D2N
- 1LC4G1D1T
- 0LC4G1D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| LC4G1D4T | 7 | |
| LC4G1D4N | 6 | |
| LC4G1D3T | 5 | |
| LC4G1D3N | 4 | |
| LC4G1D2T | 3 | |
| LC4G1D2N | 2 | |
| LC4G1D1T | 1 | |
| LC4G1D1N | 0 |
CLC4GLS1Gate logic select register 1
- Address
0x1E35- Reset
x (not fixed at power-on)- Access
- read/write
- 7LC4G2D4T
- 6LC4G2D4N
- 5LC4G2D3T
- 4LC4G2D3N
- 3LC4G2D2T
- 2LC4G2D2N
- 1LC4G2D1T
- 0LC4G2D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| LC4G2D4T | 7 | |
| LC4G2D4N | 6 | |
| LC4G2D3T | 5 | |
| LC4G2D3N | 4 | |
| LC4G2D2T | 3 | |
| LC4G2D2N | 2 | |
| LC4G2D1T | 1 | |
| LC4G2D1N | 0 |
CLC4GLS2Gate logic select register 2
- Address
0x1E36- Reset
x (not fixed at power-on)- Access
- read/write
- 7LC4G3D4T
- 6LC4G3D4N
- 5LC4G3D3T
- 4LC4G3D3N
- 3LC4G3D2T
- 2LC4G3D2N
- 1LC4G3D1T
- 0LC4G3D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| LC4G3D4T | 7 | |
| LC4G3D4N | 6 | |
| LC4G3D3T | 5 | |
| LC4G3D3N | 4 | |
| LC4G3D2T | 3 | |
| LC4G3D2N | 2 | |
| LC4G3D1T | 1 | |
| LC4G3D1N | 0 |
CLC4GLS3Gate logic select register 3
- Address
0x1E37- Reset
x (not fixed at power-on)- Access
- read/write
- 7LC4G4D4T
- 6LC4G4D4N
- 5LC4G4D3T
- 4LC4G4D3N
- 3LC4G4D2T
- 2LC4G4D2N
- 1LC4G4D1T
- 0LC4G4D1N
8 fields
| Field | Bits | What it does |
|---|---|---|
| LC4G4D4T | 7 | |
| LC4G4D4N | 6 | |
| LC4G4D3T | 5 | |
| LC4G4D3N | 4 | |
| LC4G4D2T | 3 | |
| LC4G4D2N | 2 | |
| LC4G4D1T | 1 | |
| LC4G4D1N | 0 |
PPS Peripheral pin select
PPSLOCK
- Address
0x1E8F- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4–
- 3–
- 2–
- 1–
- 0PPSLOCKED
1 field
| Field | Bits | What it does |
|---|---|---|
| PPSLOCKED | 0 |
INTPPS
- Address
0x1E90- Reset
0x02- Access
- read/write
- 7–
- 6–
- 5INTPPS5
- 4INTPPS4
- 3INTPPS3
- 2INTPPS2
- 1INTPPS1
- 0INTPPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| INTPPS | 5:0 |
T0CKIPPS
- Address
0x1E91- Reset
0x02- Access
- read/write
- 7–
- 6–
- 5T0CKIPPS5
- 4T0CKIPPS4
- 3T0CKIPPS3
- 2T0CKIPPS2
- 1T0CKIPPS1
- 0T0CKIPPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| T0CKIPPS | 5:0 |
T1CKIPPS
- Address
0x1E92- Reset
0x05- Access
- read/write
- 7–
- 6–
- 5T1CKIPPS5
- 4T1CKIPPS4
- 3T1CKIPPS3
- 2T1CKIPPS2
- 1T1CKIPPS1
- 0T1CKIPPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| T1CKIPPS | 5:0 |
T1GPPS
- Address
0x1E93- Reset
0x04- Access
- read/write
- 7–
- 6–
- 5T1GPPS5
- 4T1GPPS4
- 3T1GPPS3
- 2T1GPPS2
- 1T1GPPS1
- 0T1GPPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| T1GPPS | 5:0 |
T2INPPS
- Address
0x1E9C- Reset
0x05- Access
- read/write
- 7–
- 6–
- 5T2INPPS5
- 4T2INPPS4
- 3T2INPPS3
- 2T2INPPS2
- 1T2INPPS1
- 0T2INPPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| T2INPPS | 5:0 |
CWG1PPS
- Address
0x1EB1- Reset
0x02- Access
- read/write
- 7–
- 6–
- 5CWG1PPS5
- 4CWG1PPS4
- 3CWG1PPS3
- 2CWG1PPS2
- 1CWG1PPS1
- 0CWG1PPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| CWG1PPS | 5:0 |
CLCIN0PPS
- Address
0x1EBB- Reset
0x03- Access
- read/write
- 7–
- 6–
- 5CLCIN0PPS5
- 4CLCIN0PPS4
- 3CLCIN0PPS3
- 2CLCIN0PPS2
- 1CLCIN0PPS1
- 0CLCIN0PPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| CLCIN0PPS | 5:0 |
CLCIN1PPS
- Address
0x1EBC- Reset
0x05- Access
- read/write
- 7–
- 6–
- 5CLCIN1PPS5
- 4CLCIN1PPS4
- 3CLCIN1PPS3
- 2CLCIN1PPS2
- 1CLCIN1PPS1
- 0CLCIN1PPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| CLCIN1PPS | 5:0 |
CLCIN2PPS
- Address
0x1EBD- Reset
0x01- Access
- read/write
- 7–
- 6–
- 5CLCIN2PPS5
- 4CLCIN2PPS4
- 3CLCIN2PPS3
- 2CLCIN2PPS2
- 1CLCIN2PPS1
- 0CLCIN2PPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| CLCIN2PPS | 5:0 |
CLCIN3PPS
- Address
0x1EBE- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5CLCIN3PPS5
- 4CLCIN3PPS4
- 3CLCIN3PPS3
- 2CLCIN3PPS2
- 1CLCIN3PPS1
- 0CLCIN3PPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| CLCIN3PPS | 5:0 |
ADACTPPS
- Address
0x1EC3- Reset
0x05- Access
- read/write
- 7–
- 6–
- 5ADACTPPS5
- 4ADACTPPS4
- 3ADACTPPS3
- 2ADACTPPS2
- 1ADACTPPS1
- 0ADACTPPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| ADACTPPS | 5:0 |
RX1DTPPS
- Address
0x1ECB- Reset
0x01- Access
- read/write
- 7–
- 6–
- 5RX1DTPPS5
- 4RX1DTPPS4
- 3RX1DTPPS3
- 2RX1DTPPS2
- 1RX1DTPPS1
- 0RX1DTPPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| RX1DTPPS | 5:0 |
TX1CKPPS
- Address
0x1ECC- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5TX1CKPPS5
- 4TX1CKPPS4
- 3TX1CKPPS3
- 2TX1CKPPS2
- 1TX1CKPPS1
- 0TX1CKPPS0
1 field
| Field | Bits | What it does |
|---|---|---|
| TX1CKPPS | 5:0 |
RA0PPS
- Address
0x1F10- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4RA0PPS4
- 3RA0PPS3
- 2RA0PPS2
- 1RA0PPS1
- 0RA0PPS0
5 fields
| Field | Bits | What it does |
|---|---|---|
| RA0PPS4 | 4 | |
| RA0PPS3 | 3 | |
| RA0PPS2 | 2 | |
| RA0PPS1 | 1 | |
| RA0PPS0 | 0 |
RA1PPS
- Address
0x1F11- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4RA1PPS4
- 3RA1PPS3
- 2RA1PPS2
- 1RA1PPS1
- 0RA1PPS0
5 fields
| Field | Bits | What it does |
|---|---|---|
| RA1PPS4 | 4 | |
| RA1PPS3 | 3 | |
| RA1PPS2 | 2 | |
| RA1PPS1 | 1 | |
| RA1PPS0 | 0 |
RA2PPS
- Address
0x1F12- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4RA2PPS4
- 3RA2PPS3
- 2RA2PPS2
- 1RA2PPS1
- 0RA2PPS0
5 fields
| Field | Bits | What it does |
|---|---|---|
| RA2PPS4 | 4 | |
| RA2PPS3 | 3 | |
| RA2PPS2 | 2 | |
| RA2PPS1 | 1 | |
| RA2PPS0 | 0 |
RA3PPS
- Address
0x1F13- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4RA3PPS4
- 3RA3PPS3
- 2RA3PPS2
- 1RA3PPS1
- 0RA3PPS0
5 fields
| Field | Bits | What it does |
|---|---|---|
| RA3PPS4 | 4 | |
| RA3PPS3 | 3 | |
| RA3PPS2 | 2 | |
| RA3PPS1 | 1 | |
| RA3PPS0 | 0 |
RA4PPS
- Address
0x1F14- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4RA4PPS4
- 3RA4PPS3
- 2RA4PPS2
- 1RA4PPS1
- 0RA4PPS0
5 fields
| Field | Bits | What it does |
|---|---|---|
| RA4PPS4 | 4 | |
| RA4PPS3 | 3 | |
| RA4PPS2 | 2 | |
| RA4PPS1 | 1 | |
| RA4PPS0 | 0 |
RA5PPS
- Address
0x1F15- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5–
- 4RA5PPS4
- 3RA5PPS3
- 2RA5PPS2
- 1RA5PPS1
- 0RA5PPS0
5 fields
| Field | Bits | What it does |
|---|---|---|
| RA5PPS4 | 4 | |
| RA5PPS3 | 3 | |
| RA5PPS2 | 2 | |
| RA5PPS1 | 1 | |
| RA5PPS0 | 0 |
IOC Interrupt-on-change
IOCAP
- Address
0x1F3D- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5IOCAP5
- 4IOCAP4
- 3IOCAP3
- 2IOCAP2
- 1IOCAP1
- 0IOCAP0
6 fields
| Field | Bits | What it does |
|---|---|---|
| IOCAP5 | 5 | |
| IOCAP4 | 4 | |
| IOCAP3 | 3 | |
| IOCAP2 | 2 | |
| IOCAP1 | 1 | |
| IOCAP0 | 0 |
IOCAN
- Address
0x1F3E- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5IOCAN5
- 4IOCAN4
- 3IOCAN3
- 2IOCAN2
- 1IOCAN1
- 0IOCAN0
6 fields
| Field | Bits | What it does |
|---|---|---|
| IOCAN5 | 5 | |
| IOCAN4 | 4 | |
| IOCAN3 | 3 | |
| IOCAN2 | 2 | |
| IOCAN1 | 1 | |
| IOCAN0 | 0 |
IOCAF
- Address
0x1F3F- Reset
0x00- Access
- read/write
- 7–
- 6–
- 5IOCAF5
- 4IOCAF4
- 3IOCAF3
- 2IOCAF2
- 1IOCAF1
- 0IOCAF0
6 fields
| Field | Bits | What it does |
|---|---|---|
| IOCAF5 | 5 | |
| IOCAF4 | 4 | |
| IOCAF3 | 3 | |
| IOCAF2 | 2 | |
| IOCAF1 | 1 | |
| IOCAF0 | 0 |