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PIC16F877A8-bit PIC microcontroller with 40/44-pin packages

A classic controller for digital, analog and serial interfaces.

Manufacturer-referenced

Microchip Technology · PIC16F877A-I/P

PDIP-40DS39582C · 2013

PIC16F877A is an eight-bit PIC microcontroller with a fourteen-bit instruction word, 8K words of Flash program memory and 33 I/O lines. Its five ports connect to timers, an eight-channel ADC, serial interfaces and two capture/compare/PWM modules. The PDIP and TQFP versions carry the same functional signals at different lead numbers. The selected PIC16F877A operates from 4.0 to 5.5 V and requires a configured external oscillator or clock source. Most instructions take four oscillator cycles; a 20 MHz clock therefore gives up to five million instruction cycles per second. Its Flash capacity is 8K instruction words, not simply 8 KB of byte-addressed program storage. The example uses 5 V, a 4 MHz crystal, an ICSP header and a current-limited LED on RB0. Firmware must configure analog selections, direction registers and oscillator configuration before ordinary GPIO behavior can be expected. All supply pins and the reset/programming path are included in the reference.

3D View

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Real View

PIC16F877A-I/P black PDIP-40 package with silver contacts and readable marking.
PIC16F877A-I/P · PDIP-40Package illustration

Pinout

PIC16F877A-I/PPDIP-40Top view
Select a pin to see its functionPDIP-40 · 40 pins

PCB Footprint

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Finding PDIP-40 packageTop view · mm
Reset / program voltageAnalog and digital multiplexingAll supply and return pinsExternal oscillatorGPIO and digital peripheralsUnconnected TQFP leads
PIC16F877A-I/PPDIP-40Top view

Click a lead or use the arrow keys. Top view

1
PIN 1 · Reset / program voltage

MCLR / VPP

Reset / programming

Function

Active-low reset and high-voltage programming entry.

How to connect

10 kΩ pull-up to 5 V; route to ICSP VPP.

At a glance

8-bit PIC microcontroller with 40/44-pin packages

The CPU executes from Flash while ports, timers and analog logic expose controlled connections to the board.

8K × 14-bit wordsProgram memory
368 bytesData RAM
20 MHzMaximum clock
10-bit 8 inputsADC

Operating profile

PIC16F877A-I/P

Package
PDIP-40PIC16F877A-I/P
Selected F-device supply
4.0–5.5 VLF-device limits are different
Industrial range
−40–85°CSelected I temperature grade

CPU and memories

Key parameters and their test conditions

Program Flash
8192 × 14-bit wordsConditions / notes: Harvard program memory
Data RAM
368 bytesConditions / notes: Banked register address space
Data EEPROM
256 bytesConditions / notes: Nonvolatile application data
CPU instruction set
35 instructionsConditions / notes: Most take one instruction cycle
Instruction clock
FOSC / 4Conditions / notes: Branches normally take two instruction cycles
Maximum oscillator
20 MHzConditions / notes: Up to 5 million instruction cycles per second

Package details

Follows the selected physical package

Manufacturer
Microchip Technology
Part number
PIC16F877A-I/P
Package
PDIP-40
Connections
40 pins
Mounting
Through-hole
Lead pitch
2.54 mm
Package code
PDIP-40
Thermal reference
See operating and package limits

Connections by function

Select a pin to open its function, electrical notes and wiring guidance.

Reset / program voltage1 pins

Analog and digital multiplexing9 pins

All supply and return pins4 pins

External oscillator2 pins

GPIO and digital peripherals24 pins

Values apply to the stated grade and conditions. Absolute maximum ratings are stress limits.DS39582C · 2013

Connect all supplies

Both VDD and both VSS pins must be wired.

Provide a clock

Match the oscillator configuration to the crystal or clock source.

Program and configure

Use ICSP, then set port and analog functions explicitly.

FOSC = 4 MHz gives a nominal instruction clock of 1 MHz. A 500 ms output toggle produces a 1 Hz full blink cycle.

PIC16F877ACPUmemoriesanalogtimersportsandserialfunctionalcutaway.
Original teaching illustration; matching named nodes join.
PIC16F877APDIPwithsupplypairsclockresetICSPandresistorlimitedLED.
Original teaching illustration; matching named nodes join.

Pin reference

Select a pin to explore its function and connection.

40 pins
PinSignalTypeFunction
MCLR / VPPReset / programmingActive-low reset and high-voltage programming entry.
RA0 / AN0GPIO / peripheralMultiplexed GPIO and the named peripheral functions; configure direction and peripheral selection.
RA1 / AN1GPIO / peripheralMultiplexed GPIO and the named peripheral functions; configure direction and peripheral selection.
RA2 / AN2 / VREF−GPIO / peripheralMultiplexed GPIO and the named peripheral functions; configure direction and peripheral selection.
RA3 / AN3 / VREF+GPIO / peripheralMultiplexed GPIO and the named peripheral functions; configure direction and peripheral selection.
RA4 / T0CKIGPIO / peripheralMultiplexed GPIO and the named peripheral functions; configure direction and peripheral selection.
RA5 / AN4 / SSGPIO / peripheralMultiplexed GPIO and the named peripheral functions; configure direction and peripheral selection.
RE0 / AN5 / RDGPIO / peripheralMultiplexed GPIO and the named peripheral functions; configure direction and peripheral selection.
RE1 / AN6 / WRGPIO / peripheralMultiplexed GPIO and the named peripheral functions; configure direction and peripheral selection.
RE2 / AN7 / CSGPIO / peripheralMultiplexed GPIO and the named peripheral functions; configure direction and peripheral selection.
VDDSupplyPositive supply; both VDD contacts must be connected.
VSSSupplyGround return; both VSS contacts must be connected.
OSC1 / CLKIClockExternal crystal, resonator or clock connection selected by configuration bits.
OSC2 / CLKOClockExternal crystal, resonator or clock connection selected by configuration bits.
RC0 / T1OSOGPIO / peripheralMultiplexed GPIO and the named peripheral functions; configure direction and peripheral selection.
RC1 / T1OSI / CCP2GPIO / peripheralMultiplexed GPIO and the named peripheral functions; configure direction and peripheral selection.
RC2 / CCP1GPIO / peripheralMultiplexed GPIO and the named peripheral functions; configure direction and peripheral selection.
RC3 / SCK / SCLGPIO / peripheralMultiplexed GPIO and the named peripheral functions; configure direction and peripheral selection.
RD0 / PSP0GPIO / peripheralMultiplexed GPIO and the named peripheral functions; configure direction and peripheral selection.
RD1 / PSP1GPIO / peripheralMultiplexed GPIO and the named peripheral functions; configure direction and peripheral selection.
RD2 / PSP2GPIO / peripheralMultiplexed GPIO and the named peripheral functions; configure direction and peripheral selection.
RD3 / PSP3GPIO / peripheralMultiplexed GPIO and the named peripheral functions; configure direction and peripheral selection.
RC4 / SDI / SDAGPIO / peripheralMultiplexed GPIO and the named peripheral functions; configure direction and peripheral selection.
RC5 / SDOGPIO / peripheralMultiplexed GPIO and the named peripheral functions; configure direction and peripheral selection.
RC6 / TX / CKGPIO / peripheralMultiplexed GPIO and the named peripheral functions; configure direction and peripheral selection.
RC7 / RX / DTGPIO / peripheralMultiplexed GPIO and the named peripheral functions; configure direction and peripheral selection.
RD4 / PSP4GPIO / peripheralMultiplexed GPIO and the named peripheral functions; configure direction and peripheral selection.
RD5 / PSP5GPIO / peripheralMultiplexed GPIO and the named peripheral functions; configure direction and peripheral selection.
RD6 / PSP6GPIO / peripheralMultiplexed GPIO and the named peripheral functions; configure direction and peripheral selection.
RD7 / PSP7GPIO / peripheralMultiplexed GPIO and the named peripheral functions; configure direction and peripheral selection.
VSSSupplyGround return; both VSS contacts must be connected.
VDDSupplyPositive supply; both VDD contacts must be connected.
RB0 / INTGPIO / peripheralMultiplexed GPIO and the named peripheral functions; configure direction and peripheral selection.
RB1GPIO / peripheralMultiplexed GPIO and the named peripheral functions; configure direction and peripheral selection.
RB2GPIO / peripheralMultiplexed GPIO and the named peripheral functions; configure direction and peripheral selection.
RB3 / PGMGPIO / peripheralMultiplexed GPIO and the named peripheral functions; configure direction and peripheral selection.
RB4GPIO / peripheralMultiplexed GPIO and the named peripheral functions; configure direction and peripheral selection.
RB5GPIO / peripheralMultiplexed GPIO and the named peripheral functions; configure direction and peripheral selection.
RB6 / PGCGPIO / peripheralMultiplexed GPIO and the named peripheral functions; configure direction and peripheral selection.
RB7 / PGDGPIO / peripheralMultiplexed GPIO and the named peripheral functions; configure direction and peripheral selection.
PDIP-40 · Top view · Select a pin number to inspect its connection.

CPU and memories

Selected PIC16F877A

ParameterValueConditions / notes
Program Flash8192 × 14-bit wordsHarvard program memory
Data RAM368 bytesBanked register address space
Data EEPROM256 bytesNonvolatile application data
CPU instruction set35 instructionsMost take one instruction cycle
Instruction clockFOSC / 4Branches normally take two instruction cycles
Maximum oscillator20 MHzUp to 5 million instruction cycles per second

Account for bank selection and read-modify-write behavior in low-level code.

Supply and reset

F variant, industrial grade

ParameterValueConditions / notes
VDD4.0–5.5 VUse regulated 5 V
PDIP supply pinsVDD11/32; VSS12/31Connect and bypass both pairs
TQFP supply pinsVDD7/28; VSS6/29Different lead numbers
MCLR / VPPPDIP1; TQFP18Reset pull-up and ICSP entry
Reset sourcePower-on, brown-out, watchdog, MCLRConfiguration and operating conditions apply
Temperature−40 to +85°CI-grade orderables

Do not substitute PIC16LF877A low-voltage specifications.

GPIO details that matter

Peripheral selection changes pin behavior

ParameterValueConditions / notes
Ports A/B/C/D/E6 / 8 / 8 / 8 / 3 lines33 I/O lines total
TRIS bit1 input, 0 outputInitialize the output latch before enabling output
RA4Open-drain outputExternal pull-up required for HIGH
RA5Input-only digital functionAlso AN4 / SS / comparator output function
PORTA / PORTEAnalog functions after resetConfigure ADCON1 for digital use
ComparatorsCMCON controls modeCMCON = 0x07 disables comparators
PORTB pull-upsSoftware-enabled weak pull-upsFor input-configured pins

The special comparator alternate function does not make RA5 a normal digital output.

ADC and analog configuration

10-bit successive approximation ADC

ParameterValueConditions / notes
ChannelsAN0–AN7Pins multiplexed with ports A and E
ReferenceVDD/VSS or external referencesSelected by ADCON1
AcquisitionAllow input capacitor to settleDepends on source impedance and conditions
Conversion clockChoose a valid TADDepends on FOSC and ADC clock selection
All-digital exampleADCON1 = 0x06No external analog reference in the LED example
Result registersADRESH / ADRESLJustification is configurable

Resolution is not the same as accuracy; stay within input/reference limits.

Timers and communication

Hardware functions

ParameterValueConditions / notes
Timer08-bitPrescaler and external T0CKI option
Timer116-bitExternal oscillator / clock options
Timer28-bit plus period registerPWM timebase
CCP1 / CCP2Capture, compare and PWMRC2 / RC1 default functions
MSSPSPI or I²CShared serial pins
USARTSynchronous / asynchronousRC6 TX/CK and RC7 RX/DT
Parallel slave portPORTD with PORTE controlsNot active during ordinary GPIO use

Select one compatible function for each shared pin.

Programming and configuration

ICSP wiring and startup choices

ParameterValueConditions / notes
PDIP ICSPVPP1, PGC39, PGD40Also VDD and VSS
TQFP ICSPVPP18, PGC16, PGD17Same functions, different numbers
Low-voltage program pinRB3 / PGMDefine its level or disable LVP deliberately
4 MHz crystal exampleXT oscillator modeLoad capacitors depend on the crystal
WatchdogEnable or disable intentionallyAn unserviced enabled watchdog resets the application
No internal system RCExternal clock hardware requiredDo not copy a newer PIC internal-oscillator setup

Use a compatible programmer; VPP is a programming voltage, not an ordinary logic input.

Minimal LED example

PDIP-40, 5 V, 4 MHz

ParameterValueConditions / notes
VDD / VSS11 and 32 / 12 and 31100 nF at each supply pair
MCLR110 kΩ pull-up to 5 VPreserve ICSP access
Crystal4 MHz between OSC1-13 and OSC2-14Example load capacitors 22 pF each; calculate for the crystal
RB0 pin 331 kΩ then red LED to groundNominal 3 mA at ideal 5 V and 2 V LED
Firmware setupADCON1 0x06; CMCON 0x07TRISB0 output, known latch state
BlinkToggle every 500 ms1 Hz full cycle with correct clock configuration

The circuit needs firmware; the displayed readings are illustrative.

Take it into ProTech

Find PIC16F877A in the Components Library to place its schematic symbol and connect its pins.

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