PIC16LF1507 configuration bits The configuration words set the oscillator, the watchdog, the power-up timer, brown-out reset, low-voltage programming and code protection. Pick a setting and the word below updates; the starting values are the defaults in Microchip's device file. In XC8 each setting is a #pragma config NAME = SETTING line.
CONFIG1 · 0x8007 0x3FFF default 0x3FFF CLKOUTEN Clock Out Enable CLKOUT function is enabled on the CLKOUT pin CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin BOREN Brown-out Reset Enable Brown-out Reset disabled Brown-out Reset controlled by the SBOREN bit in the BORCON register Brown-out Reset enabled while running and disabled in Sleep Brown-out Reset enabled CP Flash Program Memory Code Protection Program memory code protection is enabled Program memory code protection is disabled MCLRE MCLR Pin Function Select MCLR/VPP pin function is digital input MCLR/VPP pin function is MCLR PWRTE Power-up Timer Enable PWRT enabled PWRT disabled WDTE Watchdog Timer Enable WDT disabled WDT controlled by the SWDTEN bit in the WDTCON register WDT enabled while running and disabled in Sleep WDT enabled FOSC Oscillator Selection Bits Internal Oscillator, I/O function on OSC1 External Clock, Low Power Mode External Clock, Medium Power Mode External Clock, High Power Mode CONFIG2 · 0x8008 0x3FFF default 0x3FFF LVP Low-Voltage Programming Enable High-voltage on MCLR/VPP must be used for programming Low-voltage programming enabled LPBOR Low-Power Brown Out Reset Low-Power BOR is enabled Low-Power BOR is disabled BORV Brown-out Reset Voltage Selection Brown-out Reset Voltage (Vbor), high trip point selected. Brown-out Reset Voltage (Vbor), low trip point selected. STVREN Stack Overflow/Underflow Reset Enable Stack Overflow or Underflow will not cause a Reset Stack Overflow or Underflow will cause a Reset WRT Flash Memory Self-Write Protection 000h to 1FFFh write protected, no addresses may be modified by EECON control 000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control 000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control Write protection off 
BETA